LXR qemu/accel/tcg/ldst

   1/*
   2 * Routines common to user and system emulation of load/store.
   3 *
   4 *  Copyright (c) 2003 Fabrice Bellard
   5 *
   6 * SPDX-License-Identifier: GPL-2.0-or-later
   7 *
   8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
   9 * See the COPYING file in the top-level directory.
  10 */
  11
  12uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  13                            int mmu_idx, uintptr_t ra)
  14{
  15    MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
  16    return cpu_ldb_mmu(env, addr, oi, ra);
  17}
  18
  19int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  20                       int mmu_idx, uintptr_t ra)
  21{
  22    return (int8_t)cpu_ldub_mmuidx_ra(env, addr, mmu_idx, ra);
  23}
  24
  25uint32_t cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  26                               int mmu_idx, uintptr_t ra)
  27{
  28    MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
  29    return cpu_ldw_be_mmu(env, addr, oi, ra);
  30}
  31
  32int cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  33                          int mmu_idx, uintptr_t ra)
  34{
  35    return (int16_t)cpu_lduw_be_mmuidx_ra(env, addr, mmu_idx, ra);
  36}
  37
  38uint32_t cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  39                              int mmu_idx, uintptr_t ra)
  40{
  41    MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
  42    return cpu_ldl_be_mmu(env, addr, oi, ra);
  43}
  44
  45uint64_t cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  46                              int mmu_idx, uintptr_t ra)
  47{
  48    MemOpIdx oi = make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx);
  49    return cpu_ldq_be_mmu(env, addr, oi, ra);
  50}
  51
  52uint32_t cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  53                               int mmu_idx, uintptr_t ra)
  54{
  55    MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
  56    return cpu_ldw_le_mmu(env, addr, oi, ra);
  57}
  58
  59int cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  60                          int mmu_idx, uintptr_t ra)
  61{
  62    return (int16_t)cpu_lduw_le_mmuidx_ra(env, addr, mmu_idx, ra);
  63}
  64
  65uint32_t cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  66                              int mmu_idx, uintptr_t ra)
  67{
  68    MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
  69    return cpu_ldl_le_mmu(env, addr, oi, ra);
  70}
  71
  72uint64_t cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
  73                              int mmu_idx, uintptr_t ra)
  74{
  75    MemOpIdx oi = make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx);
  76    return cpu_ldq_le_mmu(env, addr, oi, ra);
  77}
  78
  79void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
  80                       int mmu_idx, uintptr_t ra)
  81{
  82    MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
  83    cpu_stb_mmu(env, addr, val, oi, ra);
  84}
  85
  86void cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
  87                          int mmu_idx, uintptr_t ra)
  88{
  89    MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
  90    cpu_stw_be_mmu(env, addr, val, oi, ra);
  91}
  92
  93void cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
  94                          int mmu_idx, uintptr_t ra)
  95{
  96    MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
  97    cpu_stl_be_mmu(env, addr, val, oi, ra);
  98}
  99
 100void cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
 101                          int mmu_idx, uintptr_t ra)
 102{
 103    MemOpIdx oi = make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx);
 104    cpu_stq_be_mmu(env, addr, val, oi, ra);
 105}
 106
 107void cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
 108                          int mmu_idx, uintptr_t ra)
 109{
 110    MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
 111    cpu_stw_le_mmu(env, addr, val, oi, ra);
 112}
 113
 114void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
 115                          int mmu_idx, uintptr_t ra)
 116{
 117    MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
 118    cpu_stl_le_mmu(env, addr, val, oi, ra);
 119}
 120
 121void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
 122                          int mmu_idx, uintptr_t ra)
 123{
 124    MemOpIdx oi = make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx);
 125    cpu_stq_le_mmu(env, addr, val, oi, ra);
 126}
 127
 128/*--------------------------*/
 129
 130uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 131{
 132    return cpu_ldub_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
 133}
 134
 135int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 136{
 137    return (int8_t)cpu_ldub_data_ra(env, addr, ra);
 138}
 139
 140uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 141{
 142    return cpu_lduw_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
 143}
 144
 145int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 146{
 147    return (int16_t)cpu_lduw_be_data_ra(env, addr, ra);
 148}
 149
 150uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 151{
 152    return cpu_ldl_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
 153}
 154
 155uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 156{
 157    return cpu_ldq_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
 158}
 159
 160uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 161{
 162    return cpu_lduw_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
 163}
 164
 165int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 166{
 167    return (int16_t)cpu_lduw_le_data_ra(env, addr, ra);
 168}
 169
 170uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 171{
 172    return cpu_ldl_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
 173}
 174
 175uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
 176{
 177    return cpu_ldq_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
 178}
 179
 180void cpu_stb_data_ra(CPUArchState *env, abi_ptr addr,
 181                     uint32_t val, uintptr_t ra)
 182{
 183    cpu_stb_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
 184}
 185
 186void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr,
 187                        uint32_t val, uintptr_t ra)
 188{
 189    cpu_stw_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
 190}
 191
 192void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr,
 193                        uint32_t val, uintptr_t ra)
 194{
 195    cpu_stl_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
 196}
 197
 198void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr,
 199                        uint64_t val, uintptr_t ra)
 200{
 201    cpu_stq_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
 202}
 203
 204void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr,
 205                        uint32_t val, uintptr_t ra)
 206{
 207    cpu_stw_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
 208}
 209
 210void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr,
 211                        uint32_t val, uintptr_t ra)
 212{
 213    cpu_stl_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
 214}
 215
 216void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr,
 217                        uint64_t val, uintptr_t ra)
 218{
 219    cpu_stq_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
 220}
 221
 222/*--------------------------*/
 223
 224uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr addr)
 225{
 226    return cpu_ldub_data_ra(env, addr, 0);
 227}
 228
 229int cpu_ldsb_data(CPUArchState *env, abi_ptr addr)
 230{
 231    return (int8_t)cpu_ldub_data(env, addr);
 232}
 233
 234uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr addr)
 235{
 236    return cpu_lduw_be_data_ra(env, addr, 0);
 237}
 238
 239int cpu_ldsw_be_data(CPUArchState *env, abi_ptr addr)
 240{
 241    return (int16_t)cpu_lduw_be_data(env, addr);
 242}
 243
 244uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr addr)
 245{
 246    return cpu_ldl_be_data_ra(env, addr, 0);
 247}
 248
 249uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr addr)
 250{
 251    return cpu_ldq_be_data_ra(env, addr, 0);
 252}
 253
 254uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr addr)
 255{
 256    return cpu_lduw_le_data_ra(env, addr, 0);
 257}
 258
 259int cpu_ldsw_le_data(CPUArchState *env, abi_ptr addr)
 260{
 261    return (int16_t)cpu_lduw_le_data(env, addr);
 262}
 263
 264uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr addr)
 265{
 266    return cpu_ldl_le_data_ra(env, addr, 0);
 267}
 268
 269uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr addr)
 270{
 271    return cpu_ldq_le_data_ra(env, addr, 0);
 272}
 273
 274void cpu_stb_data(CPUArchState *env, abi_ptr addr, uint32_t val)
 275{
 276    cpu_stb_data_ra(env, addr, val, 0);
 277}
 278
 279void cpu_stw_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
 280{
 281    cpu_stw_be_data_ra(env, addr, val, 0);
 282}
 283
 284void cpu_stl_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
 285{
 286    cpu_stl_be_data_ra(env, addr, val, 0);
 287}
 288
 289void cpu_stq_be_data(CPUArchState *env, abi_ptr addr, uint64_t val)
 290{
 291    cpu_stq_be_data_ra(env, addr, val, 0);
 292}
 293
 294void cpu_stw_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
 295{
 296    cpu_stw_le_data_ra(env, addr, val, 0);
 297}
 298
 299void cpu_stl_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
 300{
 301    cpu_stl_le_data_ra(env, addr, val, 0);
 302}
 303
 304void cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
 305{
 306    cpu_stq_le_data_ra(env, addr, val, 0);
 307}
 308