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19#include "qemu/osdep.h"
20#include "qemu/cutils.h"
21#include "qemu/error-report.h"
22#include "qemu/guest-random.h"
23#include "qapi/error.h"
24#include "hw/loader.h"
25#include "hw/rx/rx62n.h"
26#include "sysemu/qtest.h"
27#include "sysemu/device_tree.h"
28#include "hw/boards.h"
29#include "qom/object.h"
30
31
32#define SDRAM_BASE EXT_CS_BASE
33
34struct RxGdbSimMachineClass {
35
36 MachineClass parent_class;
37
38 const char *mcu_name;
39 uint32_t xtal_freq_hz;
40};
41typedef struct RxGdbSimMachineClass RxGdbSimMachineClass;
42
43struct RxGdbSimMachineState {
44
45 MachineState parent_obj;
46
47 RX62NState mcu;
48};
49typedef struct RxGdbSimMachineState RxGdbSimMachineState;
50
51#define TYPE_RX_GDBSIM_MACHINE MACHINE_TYPE_NAME("rx62n-common")
52
53DECLARE_OBJ_CHECKERS(RxGdbSimMachineState, RxGdbSimMachineClass,
54 RX_GDBSIM_MACHINE, TYPE_RX_GDBSIM_MACHINE)
55
56
57static void rx_load_image(RXCPU *cpu, const char *filename,
58 uint32_t start, uint32_t size)
59{
60 static uint32_t extable[32];
61 long kernel_size;
62 int i;
63
64 kernel_size = load_image_targphys(filename, start, size);
65 if (kernel_size < 0) {
66 fprintf(stderr, "qemu: could not load kernel '%s'\n", filename);
67 exit(1);
68 }
69 cpu->env.pc = start;
70
71
72
73 for (i = 0; i < ARRAY_SIZE(extable); i++) {
74 extable[i] = cpu_to_le32(0x10 + i * 4);
75 }
76 rom_add_blob_fixed("extable", extable, sizeof(extable), VECTOR_TABLE_BASE);
77}
78
79static void rx_gdbsim_init(MachineState *machine)
80{
81 MachineClass *mc = MACHINE_GET_CLASS(machine);
82 RxGdbSimMachineState *s = RX_GDBSIM_MACHINE(machine);
83 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_GET_CLASS(machine);
84 MemoryRegion *sysmem = get_system_memory();
85 const char *kernel_filename = machine->kernel_filename;
86 const char *dtb_filename = machine->dtb;
87 uint8_t rng_seed[32];
88
89 if (machine->ram_size < mc->default_ram_size) {
90 char *sz = size_to_str(mc->default_ram_size);
91 error_report("Invalid RAM size, should be more than %s", sz);
92 g_free(sz);
93 exit(1);
94 }
95
96
97 memory_region_add_subregion(sysmem, SDRAM_BASE, machine->ram);
98
99
100 object_initialize_child(OBJECT(machine), "mcu", &s->mcu, rxc->mcu_name);
101 object_property_set_link(OBJECT(&s->mcu), "main-bus", OBJECT(sysmem),
102 &error_abort);
103 object_property_set_uint(OBJECT(&s->mcu), "xtal-frequency-hz",
104 rxc->xtal_freq_hz, &error_abort);
105 object_property_set_bool(OBJECT(&s->mcu), "load-kernel",
106 kernel_filename != NULL, &error_abort);
107
108 if (!kernel_filename) {
109 if (machine->firmware) {
110 rom_add_file_fixed(machine->firmware, RX62N_CFLASH_BASE, 0);
111 } else if (!qtest_enabled()) {
112 error_report("No bios or kernel specified");
113 exit(1);
114 }
115 }
116
117 qdev_realize(DEVICE(&s->mcu), NULL, &error_abort);
118
119
120 if (kernel_filename) {
121 ram_addr_t kernel_offset;
122
123
124
125
126
127 kernel_offset = machine->ram_size / 2;
128 rx_load_image(RX_CPU(first_cpu), kernel_filename,
129 SDRAM_BASE + kernel_offset, kernel_offset);
130 if (dtb_filename) {
131 ram_addr_t dtb_offset;
132 int dtb_size;
133 g_autofree void *dtb = load_device_tree(dtb_filename, &dtb_size);
134
135 if (dtb == NULL) {
136 error_report("Couldn't open dtb file %s", dtb_filename);
137 exit(1);
138 }
139 if (machine->kernel_cmdline &&
140 qemu_fdt_setprop_string(dtb, "/chosen", "bootargs",
141 machine->kernel_cmdline) < 0) {
142 error_report("Couldn't set /chosen/bootargs");
143 exit(1);
144 }
145 qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
146 qemu_fdt_setprop(dtb, "/chosen", "rng-seed", rng_seed, sizeof(rng_seed));
147
148 dtb_offset = ROUND_DOWN(machine->ram_size - dtb_size, 16);
149 rom_add_blob_fixed("dtb", dtb, dtb_size,
150 SDRAM_BASE + dtb_offset);
151
152 RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset;
153 }
154 }
155}
156
157static void rx_gdbsim_class_init(ObjectClass *oc, void *data)
158{
159 MachineClass *mc = MACHINE_CLASS(oc);
160
161 mc->init = rx_gdbsim_init;
162 mc->default_cpu_type = TYPE_RX62N_CPU;
163 mc->default_ram_size = 16 * MiB;
164 mc->default_ram_id = "ext-sdram";
165}
166
167static void rx62n7_class_init(ObjectClass *oc, void *data)
168{
169 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc);
170 MachineClass *mc = MACHINE_CLASS(oc);
171
172 rxc->mcu_name = TYPE_R5F562N7_MCU;
173 rxc->xtal_freq_hz = 12 * 1000 * 1000;
174 mc->desc = "gdb simulator (R5F562N7 MCU and external RAM)";
175};
176
177static void rx62n8_class_init(ObjectClass *oc, void *data)
178{
179 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc);
180 MachineClass *mc = MACHINE_CLASS(oc);
181
182 rxc->mcu_name = TYPE_R5F562N8_MCU;
183 rxc->xtal_freq_hz = 12 * 1000 * 1000;
184 mc->desc = "gdb simulator (R5F562N8 MCU and external RAM)";
185};
186
187static const TypeInfo rx_gdbsim_types[] = {
188 {
189 .name = MACHINE_TYPE_NAME("gdbsim-r5f562n7"),
190 .parent = TYPE_RX_GDBSIM_MACHINE,
191 .class_init = rx62n7_class_init,
192 }, {
193 .name = MACHINE_TYPE_NAME("gdbsim-r5f562n8"),
194 .parent = TYPE_RX_GDBSIM_MACHINE,
195 .class_init = rx62n8_class_init,
196 }, {
197 .name = TYPE_RX_GDBSIM_MACHINE,
198 .parent = TYPE_MACHINE,
199 .instance_size = sizeof(RxGdbSimMachineState),
200 .class_size = sizeof(RxGdbSimMachineClass),
201 .class_init = rx_gdbsim_class_init,
202 .abstract = true,
203 }
204};
205
206DEFINE_TYPES(rx_gdbsim_types)
207