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26#ifndef HW_SERIAL_H
27#define HW_SERIAL_H
28
29#include "chardev/char-fe.h"
30#include "exec/memory.h"
31#include "qemu/fifo8.h"
32#include "chardev/char.h"
33#include "hw/sysbus.h"
34#include "qom/object.h"
35
36#define UART_FIFO_LENGTH 16
37
38struct SerialState {
39 DeviceState parent;
40
41 uint16_t divider;
42 uint8_t rbr;
43 uint8_t thr;
44 uint8_t tsr;
45 uint8_t ier;
46 uint8_t iir;
47 uint8_t lcr;
48 uint8_t mcr;
49 uint8_t lsr;
50 uint8_t msr;
51 uint8_t scr;
52 uint8_t fcr;
53 uint8_t fcr_vmstate;
54
55
56
57 int thr_ipending;
58 qemu_irq irq;
59 CharBackend chr;
60 int last_break_enable;
61 uint32_t baudbase;
62 uint32_t tsr_retry;
63 guint watch_tag;
64 bool wakeup;
65
66
67 uint64_t last_xmit_ts;
68 Fifo8 recv_fifo;
69 Fifo8 xmit_fifo;
70
71 uint8_t recv_fifo_itl;
72
73 QEMUTimer *fifo_timeout_timer;
74 int timeout_ipending;
75
76 uint64_t char_transmit_time;
77 int poll_msl;
78
79 QEMUTimer *modem_status_poll;
80 MemoryRegion io;
81};
82typedef struct SerialState SerialState;
83
84struct SerialMM {
85 SysBusDevice parent;
86
87 SerialState serial;
88
89 uint8_t regshift;
90 uint8_t endianness;
91};
92
93extern const VMStateDescription vmstate_serial;
94extern const MemoryRegionOps serial_io_ops;
95
96void serial_set_frequency(SerialState *s, uint32_t frequency);
97
98#define TYPE_SERIAL "serial"
99OBJECT_DECLARE_SIMPLE_TYPE(SerialState, SERIAL)
100
101#define TYPE_SERIAL_MM "serial-mm"
102OBJECT_DECLARE_SIMPLE_TYPE(SerialMM, SERIAL_MM)
103
104SerialMM *serial_mm_init(MemoryRegion *address_space,
105 hwaddr base, int regshift,
106 qemu_irq irq, int baudbase,
107 Chardev *chr, enum device_endian end);
108
109
110
111#define MAX_ISA_SERIAL_PORTS 4
112
113#define TYPE_ISA_SERIAL "isa-serial"
114void serial_hds_isa_init(ISABus *bus, int from, int to);
115
116#endif
117