1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25#ifndef TCG_TCG_OP_H
26#define TCG_TCG_OP_H
27
28#include "tcg/tcg.h"
29#include "exec/helper-proto.h"
30#include "exec/helper-gen.h"
31
32
33
34void tcg_gen_op1(TCGOpcode, TCGArg);
35void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
36void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
37void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
38void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
39void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
40
41void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
42void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
43void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
44
45static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
46{
47 tcg_gen_op1(opc, tcgv_i32_arg(a1));
48}
49
50static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
51{
52 tcg_gen_op1(opc, tcgv_i64_arg(a1));
53}
54
55static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
56{
57 tcg_gen_op1(opc, a1);
58}
59
60static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
61{
62 tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
63}
64
65static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
66{
67 tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
68}
69
70static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
71{
72 tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
73}
74
75static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
76{
77 tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
78}
79
80static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
81{
82 tcg_gen_op2(opc, a1, a2);
83}
84
85static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
86 TCGv_i32 a2, TCGv_i32 a3)
87{
88 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
89}
90
91static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
92 TCGv_i64 a2, TCGv_i64 a3)
93{
94 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
95}
96
97static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
98 TCGv_i32 a2, TCGArg a3)
99{
100 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
101}
102
103static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
104 TCGv_i64 a2, TCGArg a3)
105{
106 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
107}
108
109static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
110 TCGv_ptr base, TCGArg offset)
111{
112 tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
113}
114
115static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
116 TCGv_ptr base, TCGArg offset)
117{
118 tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
119}
120
121static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
122 TCGv_i32 a3, TCGv_i32 a4)
123{
124 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
125 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
126}
127
128static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
129 TCGv_i64 a3, TCGv_i64 a4)
130{
131 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
132 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
133}
134
135static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
136 TCGv_i32 a3, TCGArg a4)
137{
138 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
139 tcgv_i32_arg(a3), a4);
140}
141
142static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
143 TCGv_i64 a3, TCGArg a4)
144{
145 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
146 tcgv_i64_arg(a3), a4);
147}
148
149static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
150 TCGArg a3, TCGArg a4)
151{
152 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
153}
154
155static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
156 TCGArg a3, TCGArg a4)
157{
158 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
159}
160
161static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
162 TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
163{
164 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
165 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
166}
167
168static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
169 TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
170{
171 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
172 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
173}
174
175static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
176 TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
177{
178 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
179 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
180}
181
182static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
183 TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
184{
185 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
186 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
187}
188
189static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
190 TCGv_i32 a3, TCGArg a4, TCGArg a5)
191{
192 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
193 tcgv_i32_arg(a3), a4, a5);
194}
195
196static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
197 TCGv_i64 a3, TCGArg a4, TCGArg a5)
198{
199 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
200 tcgv_i64_arg(a3), a4, a5);
201}
202
203static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
204 TCGv_i32 a3, TCGv_i32 a4,
205 TCGv_i32 a5, TCGv_i32 a6)
206{
207 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
208 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
209 tcgv_i32_arg(a6));
210}
211
212static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
213 TCGv_i64 a3, TCGv_i64 a4,
214 TCGv_i64 a5, TCGv_i64 a6)
215{
216 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
217 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
218 tcgv_i64_arg(a6));
219}
220
221static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
222 TCGv_i32 a3, TCGv_i32 a4,
223 TCGv_i32 a5, TCGArg a6)
224{
225 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
226 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
227}
228
229static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
230 TCGv_i64 a3, TCGv_i64 a4,
231 TCGv_i64 a5, TCGArg a6)
232{
233 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
234 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
235}
236
237static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
238 TCGv_i32 a3, TCGv_i32 a4,
239 TCGArg a5, TCGArg a6)
240{
241 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
242 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
243}
244
245static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
246 TCGv_i64 a3, TCGv_i64 a4,
247 TCGArg a5, TCGArg a6)
248{
249 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
250 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
251}
252
253
254
255
256static inline void gen_set_label(TCGLabel *l)
257{
258 l->present = 1;
259 tcg_gen_op1(INDEX_op_set_label, label_arg(l));
260}
261
262static inline void tcg_gen_br(TCGLabel *l)
263{
264 l->refs++;
265 tcg_gen_op1(INDEX_op_br, label_arg(l));
266}
267
268void tcg_gen_mb(TCGBar);
269
270
271
272
273
274void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg);
275void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
276void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
277void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
278void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
279void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
280void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
281void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
282void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
283void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
284void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
285void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
286void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
287void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
288void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
289void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
290void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
291void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
292void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
293void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
294void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
295void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
296void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
297void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
298void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
299void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
300void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
301void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
302void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
303void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
304void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
305 unsigned int ofs, unsigned int len);
306void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
307 unsigned int ofs, unsigned int len);
308void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
309 unsigned int ofs, unsigned int len);
310void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
311 unsigned int ofs, unsigned int len);
312void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah,
313 unsigned int ofs);
314void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
315void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
316void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
317 TCGv_i32 arg1, TCGv_i32 arg2);
318void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
319 TCGv_i32 arg1, int32_t arg2);
320void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
321 TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
322void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
323 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
324void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
325 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
326void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
327void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
328void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
329void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
330void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
331void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
332void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
333void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg, int flags);
334void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
335void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg);
336void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
337void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
338void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
339void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
340void tcg_gen_abs_i32(TCGv_i32, TCGv_i32);
341
342
343void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in);
344
345static inline void tcg_gen_discard_i32(TCGv_i32 arg)
346{
347 tcg_gen_op1_i32(INDEX_op_discard, arg);
348}
349
350static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
351{
352 if (ret != arg) {
353 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
354 }
355}
356
357static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
358 tcg_target_long offset)
359{
360 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
361}
362
363static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
364 tcg_target_long offset)
365{
366 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
367}
368
369static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
370 tcg_target_long offset)
371{
372 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
373}
374
375static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
376 tcg_target_long offset)
377{
378 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
379}
380
381static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
382 tcg_target_long offset)
383{
384 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
385}
386
387static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
388 tcg_target_long offset)
389{
390 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
391}
392
393static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
394 tcg_target_long offset)
395{
396 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
397}
398
399static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
400 tcg_target_long offset)
401{
402 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
403}
404
405static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
406{
407 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
408}
409
410static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
411{
412 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
413}
414
415static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
416{
417 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
418}
419
420static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
421{
422 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
423}
424
425static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
426{
427 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
428}
429
430static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
431{
432 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
433}
434
435static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
436{
437 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
438}
439
440static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
441{
442 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
443}
444
445static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
446{
447 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
448}
449
450static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
451{
452 if (TCG_TARGET_HAS_neg_i32) {
453 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
454 } else {
455 tcg_gen_subfi_i32(ret, 0, arg);
456 }
457}
458
459static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
460{
461 if (TCG_TARGET_HAS_not_i32) {
462 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
463 } else {
464 tcg_gen_xori_i32(ret, arg, -1);
465 }
466}
467
468
469
470void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
471void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
472void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
473void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
474void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
475void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
476void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
477void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
478void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
479void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
480void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
481void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
482void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
483void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
484void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
485void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
486void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
487void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
488void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
489void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
490void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
491void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
492void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
493void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
494void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
495void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
496void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
497void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
498void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
499void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
500void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
501 unsigned int ofs, unsigned int len);
502void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
503 unsigned int ofs, unsigned int len);
504void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
505 unsigned int ofs, unsigned int len);
506void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
507 unsigned int ofs, unsigned int len);
508void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah,
509 unsigned int ofs);
510void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
511void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
512void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
513 TCGv_i64 arg1, TCGv_i64 arg2);
514void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
515 TCGv_i64 arg1, int64_t arg2);
516void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
517 TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
518void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
519 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
520void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
521 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
522void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
523void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
524void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
525void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
526void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
527void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
528void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
529void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
530void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
531void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
532void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
533void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
534void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
535void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg);
536void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg);
537void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
538void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
539void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
540void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
541void tcg_gen_abs_i64(TCGv_i64, TCGv_i64);
542
543
544void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in);
545
546#if TCG_TARGET_REG_BITS == 64
547static inline void tcg_gen_discard_i64(TCGv_i64 arg)
548{
549 tcg_gen_op1_i64(INDEX_op_discard, arg);
550}
551
552static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
553{
554 if (ret != arg) {
555 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
556 }
557}
558
559static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
560 tcg_target_long offset)
561{
562 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
563}
564
565static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
566 tcg_target_long offset)
567{
568 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
569}
570
571static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
572 tcg_target_long offset)
573{
574 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
575}
576
577static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
578 tcg_target_long offset)
579{
580 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
581}
582
583static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
584 tcg_target_long offset)
585{
586 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
587}
588
589static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
590 tcg_target_long offset)
591{
592 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
593}
594
595static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
596 tcg_target_long offset)
597{
598 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
599}
600
601static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
602 tcg_target_long offset)
603{
604 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
605}
606
607static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
608 tcg_target_long offset)
609{
610 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
611}
612
613static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
614 tcg_target_long offset)
615{
616 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
617}
618
619static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
620 tcg_target_long offset)
621{
622 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
623}
624
625static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
626{
627 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
628}
629
630static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
631{
632 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
633}
634
635static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
636{
637 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
638}
639
640static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
641{
642 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
643}
644
645static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
646{
647 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
648}
649
650static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
651{
652 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
653}
654
655static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
656{
657 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
658}
659
660static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
661{
662 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
663}
664
665static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
666{
667 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
668}
669#else
670static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
671 tcg_target_long offset)
672{
673 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
674}
675
676static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
677 tcg_target_long offset)
678{
679 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
680}
681
682static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
683 tcg_target_long offset)
684{
685 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
686}
687
688static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
689{
690 tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
691 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
692}
693
694static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
695{
696 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
697 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
698}
699
700void tcg_gen_discard_i64(TCGv_i64 arg);
701void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
702void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
703void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
704void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
705void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
706void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
707void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
708void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
709void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
710void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
711void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
712void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
713void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
714void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
715void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
716void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
717#endif
718
719static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
720{
721 if (TCG_TARGET_HAS_neg_i64) {
722 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
723 } else {
724 tcg_gen_subfi_i64(ret, 0, arg);
725 }
726}
727
728
729
730void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
731void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
732void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
733void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
734void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
735void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
736void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
737
738static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
739{
740 tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
741}
742
743
744
745#ifndef TARGET_LONG_BITS
746#error must include QEMU headers
747#endif
748
749#if TARGET_INSN_START_WORDS == 1
750# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
751static inline void tcg_gen_insn_start(target_ulong pc)
752{
753 tcg_gen_op1(INDEX_op_insn_start, pc);
754}
755# else
756static inline void tcg_gen_insn_start(target_ulong pc)
757{
758 tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
759}
760# endif
761#elif TARGET_INSN_START_WORDS == 2
762# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
763static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
764{
765 tcg_gen_op2(INDEX_op_insn_start, pc, a1);
766}
767# else
768static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
769{
770 tcg_gen_op4(INDEX_op_insn_start,
771 (uint32_t)pc, (uint32_t)(pc >> 32),
772 (uint32_t)a1, (uint32_t)(a1 >> 32));
773}
774# endif
775#elif TARGET_INSN_START_WORDS == 3
776# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
777static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
778 target_ulong a2)
779{
780 tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
781}
782# else
783static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
784 target_ulong a2)
785{
786 tcg_gen_op6(INDEX_op_insn_start,
787 (uint32_t)pc, (uint32_t)(pc >> 32),
788 (uint32_t)a1, (uint32_t)(a1 >> 32),
789 (uint32_t)a2, (uint32_t)(a2 >> 32));
790}
791# endif
792#else
793# error "Unhandled number of operands to insn_start"
794#endif
795
796
797
798
799
800
801
802
803
804
805
806
807
808void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx);
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823void tcg_gen_goto_tb(unsigned idx);
824
825
826
827
828
829
830
831
832
833
834void tcg_gen_lookup_and_goto_ptr(void);
835
836static inline void tcg_gen_plugin_cb_start(unsigned from, unsigned type,
837 unsigned wr)
838{
839 tcg_gen_op3(INDEX_op_plugin_cb_start, from, type, wr);
840}
841
842static inline void tcg_gen_plugin_cb_end(void)
843{
844 tcg_emit_op(INDEX_op_plugin_cb_end);
845}
846
847#if TARGET_LONG_BITS == 32
848#define tcg_temp_new() tcg_temp_new_i32()
849#define tcg_global_mem_new tcg_global_mem_new_i32
850#define tcg_temp_local_new() tcg_temp_local_new_i32()
851#define tcg_temp_free tcg_temp_free_i32
852#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
853#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
854#else
855#define tcg_temp_new() tcg_temp_new_i64()
856#define tcg_global_mem_new tcg_global_mem_new_i64
857#define tcg_temp_local_new() tcg_temp_local_new_i64()
858#define tcg_temp_free tcg_temp_free_i64
859#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
860#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
861#endif
862
863void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, MemOp);
864void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, MemOp);
865void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, MemOp);
866void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, MemOp);
867
868static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
869{
870 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
871}
872
873static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
874{
875 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
876}
877
878static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
879{
880 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
881}
882
883static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
884{
885 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
886}
887
888static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
889{
890 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
891}
892
893static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
894{
895 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
896}
897
898static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
899{
900 tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEUQ);
901}
902
903static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
904{
905 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
906}
907
908static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
909{
910 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
911}
912
913static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
914{
915 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
916}
917
918static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
919{
920 tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEUQ);
921}
922
923void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
924 TCGArg, MemOp);
925void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
926 TCGArg, MemOp);
927
928void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
929void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
930
931void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
932void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
933void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
934void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
935void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
936void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
937void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
938void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
939void tcg_gen_atomic_fetch_smin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
940void tcg_gen_atomic_fetch_smin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
941void tcg_gen_atomic_fetch_umin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
942void tcg_gen_atomic_fetch_umin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
943void tcg_gen_atomic_fetch_smax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
944void tcg_gen_atomic_fetch_smax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
945void tcg_gen_atomic_fetch_umax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
946void tcg_gen_atomic_fetch_umax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
947
948void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
949void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
950void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
951void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
952void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
953void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
954void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
955void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
956void tcg_gen_atomic_smin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
957void tcg_gen_atomic_smin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
958void tcg_gen_atomic_umin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
959void tcg_gen_atomic_umin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
960void tcg_gen_atomic_smax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
961void tcg_gen_atomic_smax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
962void tcg_gen_atomic_umax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, MemOp);
963void tcg_gen_atomic_umax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, MemOp);
964
965void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
966void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
967void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
968void tcg_gen_dup_mem_vec(unsigned vece, TCGv_vec, TCGv_ptr, tcg_target_long);
969void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
970void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
971void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
972void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
973void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
974void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
975void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
976void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
977void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
978void tcg_gen_nand_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
979void tcg_gen_nor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
980void tcg_gen_eqv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
981void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
982void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
983void tcg_gen_abs_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
984void tcg_gen_ssadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
985void tcg_gen_usadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
986void tcg_gen_sssub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
987void tcg_gen_ussub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
988void tcg_gen_smin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
989void tcg_gen_umin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
990void tcg_gen_smax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
991void tcg_gen_umax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
992
993void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
994void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
995void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
996void tcg_gen_rotli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
997void tcg_gen_rotri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
998
999void tcg_gen_shls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
1000void tcg_gen_shrs_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
1001void tcg_gen_sars_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
1002void tcg_gen_rotls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
1003
1004void tcg_gen_shlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
1005void tcg_gen_shrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
1006void tcg_gen_sarv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
1007void tcg_gen_rotlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
1008void tcg_gen_rotrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
1009
1010void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
1011 TCGv_vec a, TCGv_vec b);
1012
1013void tcg_gen_bitsel_vec(unsigned vece, TCGv_vec r, TCGv_vec a,
1014 TCGv_vec b, TCGv_vec c);
1015void tcg_gen_cmpsel_vec(TCGCond cond, unsigned vece, TCGv_vec r,
1016 TCGv_vec a, TCGv_vec b, TCGv_vec c, TCGv_vec d);
1017
1018void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
1019void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
1020void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
1021
1022#if TARGET_LONG_BITS == 64
1023#define tcg_gen_movi_tl tcg_gen_movi_i64
1024#define tcg_gen_mov_tl tcg_gen_mov_i64
1025#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1026#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1027#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1028#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1029#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1030#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1031#define tcg_gen_ld_tl tcg_gen_ld_i64
1032#define tcg_gen_st8_tl tcg_gen_st8_i64
1033#define tcg_gen_st16_tl tcg_gen_st16_i64
1034#define tcg_gen_st32_tl tcg_gen_st32_i64
1035#define tcg_gen_st_tl tcg_gen_st_i64
1036#define tcg_gen_add_tl tcg_gen_add_i64
1037#define tcg_gen_addi_tl tcg_gen_addi_i64
1038#define tcg_gen_sub_tl tcg_gen_sub_i64
1039#define tcg_gen_neg_tl tcg_gen_neg_i64
1040#define tcg_gen_abs_tl tcg_gen_abs_i64
1041#define tcg_gen_subfi_tl tcg_gen_subfi_i64
1042#define tcg_gen_subi_tl tcg_gen_subi_i64
1043#define tcg_gen_and_tl tcg_gen_and_i64
1044#define tcg_gen_andi_tl tcg_gen_andi_i64
1045#define tcg_gen_or_tl tcg_gen_or_i64
1046#define tcg_gen_ori_tl tcg_gen_ori_i64
1047#define tcg_gen_xor_tl tcg_gen_xor_i64
1048#define tcg_gen_xori_tl tcg_gen_xori_i64
1049#define tcg_gen_not_tl tcg_gen_not_i64
1050#define tcg_gen_shl_tl tcg_gen_shl_i64
1051#define tcg_gen_shli_tl tcg_gen_shli_i64
1052#define tcg_gen_shr_tl tcg_gen_shr_i64
1053#define tcg_gen_shri_tl tcg_gen_shri_i64
1054#define tcg_gen_sar_tl tcg_gen_sar_i64
1055#define tcg_gen_sari_tl tcg_gen_sari_i64
1056#define tcg_gen_brcond_tl tcg_gen_brcond_i64
1057#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1058#define tcg_gen_setcond_tl tcg_gen_setcond_i64
1059#define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
1060#define tcg_gen_mul_tl tcg_gen_mul_i64
1061#define tcg_gen_muli_tl tcg_gen_muli_i64
1062#define tcg_gen_div_tl tcg_gen_div_i64
1063#define tcg_gen_rem_tl tcg_gen_rem_i64
1064#define tcg_gen_divu_tl tcg_gen_divu_i64
1065#define tcg_gen_remu_tl tcg_gen_remu_i64
1066#define tcg_gen_discard_tl tcg_gen_discard_i64
1067#define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
1068#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1069#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1070#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1071#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1072#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1073#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1074#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1075#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1076#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1077#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1078#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1079#define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
1080#define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
1081#define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
1082#define tcg_gen_bswap_tl tcg_gen_bswap64_i64
1083#define tcg_gen_hswap_tl tcg_gen_hswap_i64
1084#define tcg_gen_wswap_tl tcg_gen_wswap_i64
1085#define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1086#define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
1087#define tcg_gen_andc_tl tcg_gen_andc_i64
1088#define tcg_gen_eqv_tl tcg_gen_eqv_i64
1089#define tcg_gen_nand_tl tcg_gen_nand_i64
1090#define tcg_gen_nor_tl tcg_gen_nor_i64
1091#define tcg_gen_orc_tl tcg_gen_orc_i64
1092#define tcg_gen_clz_tl tcg_gen_clz_i64
1093#define tcg_gen_ctz_tl tcg_gen_ctz_i64
1094#define tcg_gen_clzi_tl tcg_gen_clzi_i64
1095#define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
1096#define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
1097#define tcg_gen_ctpop_tl tcg_gen_ctpop_i64
1098#define tcg_gen_rotl_tl tcg_gen_rotl_i64
1099#define tcg_gen_rotli_tl tcg_gen_rotli_i64
1100#define tcg_gen_rotr_tl tcg_gen_rotr_i64
1101#define tcg_gen_rotri_tl tcg_gen_rotri_i64
1102#define tcg_gen_deposit_tl tcg_gen_deposit_i64
1103#define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
1104#define tcg_gen_extract_tl tcg_gen_extract_i64
1105#define tcg_gen_sextract_tl tcg_gen_sextract_i64
1106#define tcg_gen_extract2_tl tcg_gen_extract2_i64
1107#define tcg_const_tl tcg_const_i64
1108#define tcg_constant_tl tcg_constant_i64
1109#define tcg_const_local_tl tcg_const_local_i64
1110#define tcg_gen_movcond_tl tcg_gen_movcond_i64
1111#define tcg_gen_add2_tl tcg_gen_add2_i64
1112#define tcg_gen_sub2_tl tcg_gen_sub2_i64
1113#define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
1114#define tcg_gen_muls2_tl tcg_gen_muls2_i64
1115#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
1116#define tcg_gen_smin_tl tcg_gen_smin_i64
1117#define tcg_gen_umin_tl tcg_gen_umin_i64
1118#define tcg_gen_smax_tl tcg_gen_smax_i64
1119#define tcg_gen_umax_tl tcg_gen_umax_i64
1120#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
1121#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
1122#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
1123#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
1124#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
1125#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
1126#define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i64
1127#define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i64
1128#define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i64
1129#define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i64
1130#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
1131#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
1132#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
1133#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
1134#define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i64
1135#define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i64
1136#define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i64
1137#define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i64
1138#define tcg_gen_dup_tl_vec tcg_gen_dup_i64_vec
1139#define tcg_gen_dup_tl tcg_gen_dup_i64
1140#else
1141#define tcg_gen_movi_tl tcg_gen_movi_i32
1142#define tcg_gen_mov_tl tcg_gen_mov_i32
1143#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1144#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1145#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1146#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1147#define tcg_gen_ld32u_tl tcg_gen_ld_i32
1148#define tcg_gen_ld32s_tl tcg_gen_ld_i32
1149#define tcg_gen_ld_tl tcg_gen_ld_i32
1150#define tcg_gen_st8_tl tcg_gen_st8_i32
1151#define tcg_gen_st16_tl tcg_gen_st16_i32
1152#define tcg_gen_st32_tl tcg_gen_st_i32
1153#define tcg_gen_st_tl tcg_gen_st_i32
1154#define tcg_gen_add_tl tcg_gen_add_i32
1155#define tcg_gen_addi_tl tcg_gen_addi_i32
1156#define tcg_gen_sub_tl tcg_gen_sub_i32
1157#define tcg_gen_neg_tl tcg_gen_neg_i32
1158#define tcg_gen_abs_tl tcg_gen_abs_i32
1159#define tcg_gen_subfi_tl tcg_gen_subfi_i32
1160#define tcg_gen_subi_tl tcg_gen_subi_i32
1161#define tcg_gen_and_tl tcg_gen_and_i32
1162#define tcg_gen_andi_tl tcg_gen_andi_i32
1163#define tcg_gen_or_tl tcg_gen_or_i32
1164#define tcg_gen_ori_tl tcg_gen_ori_i32
1165#define tcg_gen_xor_tl tcg_gen_xor_i32
1166#define tcg_gen_xori_tl tcg_gen_xori_i32
1167#define tcg_gen_not_tl tcg_gen_not_i32
1168#define tcg_gen_shl_tl tcg_gen_shl_i32
1169#define tcg_gen_shli_tl tcg_gen_shli_i32
1170#define tcg_gen_shr_tl tcg_gen_shr_i32
1171#define tcg_gen_shri_tl tcg_gen_shri_i32
1172#define tcg_gen_sar_tl tcg_gen_sar_i32
1173#define tcg_gen_sari_tl tcg_gen_sari_i32
1174#define tcg_gen_brcond_tl tcg_gen_brcond_i32
1175#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1176#define tcg_gen_setcond_tl tcg_gen_setcond_i32
1177#define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1178#define tcg_gen_mul_tl tcg_gen_mul_i32
1179#define tcg_gen_muli_tl tcg_gen_muli_i32
1180#define tcg_gen_div_tl tcg_gen_div_i32
1181#define tcg_gen_rem_tl tcg_gen_rem_i32
1182#define tcg_gen_divu_tl tcg_gen_divu_i32
1183#define tcg_gen_remu_tl tcg_gen_remu_i32
1184#define tcg_gen_discard_tl tcg_gen_discard_i32
1185#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1186#define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1187#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1188#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1189#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1190#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1191#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1192#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1193#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1194#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1195#define tcg_gen_ext32u_tl tcg_gen_mov_i32
1196#define tcg_gen_ext32s_tl tcg_gen_mov_i32
1197#define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1198#define tcg_gen_bswap32_tl(D, S, F) tcg_gen_bswap32_i32(D, S)
1199#define tcg_gen_bswap_tl tcg_gen_bswap32_i32
1200#define tcg_gen_hswap_tl tcg_gen_hswap_i32
1201#define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1202#define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1203#define tcg_gen_andc_tl tcg_gen_andc_i32
1204#define tcg_gen_eqv_tl tcg_gen_eqv_i32
1205#define tcg_gen_nand_tl tcg_gen_nand_i32
1206#define tcg_gen_nor_tl tcg_gen_nor_i32
1207#define tcg_gen_orc_tl tcg_gen_orc_i32
1208#define tcg_gen_clz_tl tcg_gen_clz_i32
1209#define tcg_gen_ctz_tl tcg_gen_ctz_i32
1210#define tcg_gen_clzi_tl tcg_gen_clzi_i32
1211#define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1212#define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
1213#define tcg_gen_ctpop_tl tcg_gen_ctpop_i32
1214#define tcg_gen_rotl_tl tcg_gen_rotl_i32
1215#define tcg_gen_rotli_tl tcg_gen_rotli_i32
1216#define tcg_gen_rotr_tl tcg_gen_rotr_i32
1217#define tcg_gen_rotri_tl tcg_gen_rotri_i32
1218#define tcg_gen_deposit_tl tcg_gen_deposit_i32
1219#define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1220#define tcg_gen_extract_tl tcg_gen_extract_i32
1221#define tcg_gen_sextract_tl tcg_gen_sextract_i32
1222#define tcg_gen_extract2_tl tcg_gen_extract2_i32
1223#define tcg_const_tl tcg_const_i32
1224#define tcg_constant_tl tcg_constant_i32
1225#define tcg_const_local_tl tcg_const_local_i32
1226#define tcg_gen_movcond_tl tcg_gen_movcond_i32
1227#define tcg_gen_add2_tl tcg_gen_add2_i32
1228#define tcg_gen_sub2_tl tcg_gen_sub2_i32
1229#define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1230#define tcg_gen_muls2_tl tcg_gen_muls2_i32
1231#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1232#define tcg_gen_smin_tl tcg_gen_smin_i32
1233#define tcg_gen_umin_tl tcg_gen_umin_i32
1234#define tcg_gen_smax_tl tcg_gen_smax_i32
1235#define tcg_gen_umax_tl tcg_gen_umax_i32
1236#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1237#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1238#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1239#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1240#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1241#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1242#define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i32
1243#define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i32
1244#define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i32
1245#define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i32
1246#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1247#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1248#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1249#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1250#define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i32
1251#define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i32
1252#define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i32
1253#define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i32
1254#define tcg_gen_dup_tl_vec tcg_gen_dup_i32_vec
1255#define tcg_gen_dup_tl tcg_gen_dup_i32
1256#endif
1257
1258#if UINTPTR_MAX == UINT32_MAX
1259# define PTR i32
1260# define NAT TCGv_i32
1261#else
1262# define PTR i64
1263# define NAT TCGv_i64
1264#endif
1265
1266static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
1267{
1268 glue(tcg_gen_ld_,PTR)((NAT)r, a, o);
1269}
1270
1271static inline void tcg_gen_st_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
1272{
1273 glue(tcg_gen_st_, PTR)((NAT)r, a, o);
1274}
1275
1276static inline void tcg_gen_discard_ptr(TCGv_ptr a)
1277{
1278 glue(tcg_gen_discard_,PTR)((NAT)a);
1279}
1280
1281static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b)
1282{
1283 glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b);
1284}
1285
1286static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b)
1287{
1288 glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b);
1289}
1290
1291static inline void tcg_gen_mov_ptr(TCGv_ptr d, TCGv_ptr s)
1292{
1293 glue(tcg_gen_mov_,PTR)((NAT)d, (NAT)s);
1294}
1295
1296static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a,
1297 intptr_t b, TCGLabel *label)
1298{
1299 glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label);
1300}
1301
1302static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a)
1303{
1304#if UINTPTR_MAX == UINT32_MAX
1305 tcg_gen_mov_i32((NAT)r, a);
1306#else
1307 tcg_gen_ext_i32_i64((NAT)r, a);
1308#endif
1309}
1310
1311static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a)
1312{
1313#if UINTPTR_MAX == UINT32_MAX
1314 tcg_gen_extrl_i64_i32((NAT)r, a);
1315#else
1316 tcg_gen_mov_i64((NAT)r, a);
1317#endif
1318}
1319
1320static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a)
1321{
1322#if UINTPTR_MAX == UINT32_MAX
1323 tcg_gen_extu_i32_i64(r, (NAT)a);
1324#else
1325 tcg_gen_mov_i64(r, (NAT)a);
1326#endif
1327}
1328
1329static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a)
1330{
1331#if UINTPTR_MAX == UINT32_MAX
1332 tcg_gen_mov_i32(r, (NAT)a);
1333#else
1334 tcg_gen_extrl_i64_i32(r, (NAT)a);
1335#endif
1336}
1337
1338#undef PTR
1339#undef NAT
1340
1341#endif
1342
