qemu/linux-user/user-internals.h
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   1/*
   2 * user-internals.h: prototypes etc internal to the linux-user implementation
   3 *
   4 *  This program is free software; you can redistribute it and/or modify
   5 *  it under the terms of the GNU General Public License as published by
   6 *  the Free Software Foundation; either version 2 of the License, or
   7 *  (at your option) any later version.
   8 *
   9 *  This program is distributed in the hope that it will be useful,
  10 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 *  GNU General Public License for more details.
  13 *
  14 *  You should have received a copy of the GNU General Public License
  15 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18#ifndef LINUX_USER_USER_INTERNALS_H
  19#define LINUX_USER_USER_INTERNALS_H
  20
  21#include "exec/user/thunk.h"
  22#include "exec/exec-all.h"
  23#include "qemu/log.h"
  24
  25extern char *exec_path;
  26void init_task_state(TaskState *ts);
  27void task_settid(TaskState *);
  28void stop_all_tasks(void);
  29extern const char *qemu_uname_release;
  30extern unsigned long mmap_min_addr;
  31
  32typedef struct IOCTLEntry IOCTLEntry;
  33
  34typedef abi_long do_ioctl_fn(const IOCTLEntry *ie, uint8_t *buf_temp,
  35                             int fd, int cmd, abi_long arg);
  36
  37struct IOCTLEntry {
  38    int target_cmd;
  39    unsigned int host_cmd;
  40    const char *name;
  41    int access;
  42    do_ioctl_fn *do_ioctl;
  43    const argtype arg_type[5];
  44};
  45
  46extern IOCTLEntry ioctl_entries[];
  47
  48#define IOC_R 0x0001
  49#define IOC_W 0x0002
  50#define IOC_RW (IOC_R | IOC_W)
  51
  52/*
  53 * Returns true if the image uses the FDPIC ABI. If this is the case,
  54 * we have to provide some information (loadmap, pt_dynamic_info) such
  55 * that the program can be relocated adequately. This is also useful
  56 * when handling signals.
  57 */
  58int info_is_fdpic(struct image_info *info);
  59
  60void target_set_brk(abi_ulong new_brk);
  61void syscall_init(void);
  62abi_long do_syscall(CPUArchState *cpu_env, int num, abi_long arg1,
  63                    abi_long arg2, abi_long arg3, abi_long arg4,
  64                    abi_long arg5, abi_long arg6, abi_long arg7,
  65                    abi_long arg8);
  66extern __thread CPUState *thread_cpu;
  67G_NORETURN void cpu_loop(CPUArchState *env);
  68abi_long get_errno(abi_long ret);
  69const char *target_strerror(int err);
  70int get_osversion(void);
  71void init_qemu_uname_release(void);
  72void fork_start(void);
  73void fork_end(int child);
  74
  75/**
  76 * probe_guest_base:
  77 * @image_name: the executable being loaded
  78 * @loaddr: the lowest fixed address in the executable
  79 * @hiaddr: the highest fixed address in the executable
  80 *
  81 * Creates the initial guest address space in the host memory space.
  82 *
  83 * If @loaddr == 0, then no address in the executable is fixed,
  84 * i.e. it is fully relocatable.  In that case @hiaddr is the size
  85 * of the executable.
  86 *
  87 * This function will not return if a valid value for guest_base
  88 * cannot be chosen.  On return, the executable loader can expect
  89 *
  90 *    target_mmap(loaddr, hiaddr - loaddr, ...)
  91 *
  92 * to succeed.
  93 */
  94void probe_guest_base(const char *image_name,
  95                      abi_ulong loaddr, abi_ulong hiaddr);
  96
  97/* syscall.c */
  98int host_to_target_waitstatus(int status);
  99
 100#ifdef TARGET_I386
 101/* vm86.c */
 102void save_v86_state(CPUX86State *env);
 103void handle_vm86_trap(CPUX86State *env, int trapno);
 104void handle_vm86_fault(CPUX86State *env);
 105int do_vm86(CPUX86State *env, long subfunction, abi_ulong v86_addr);
 106#elif defined(TARGET_SPARC64)
 107void sparc64_set_context(CPUSPARCState *env);
 108void sparc64_get_context(CPUSPARCState *env);
 109#endif
 110
 111static inline int is_error(abi_long ret)
 112{
 113    return (abi_ulong)ret >= (abi_ulong)(-4096);
 114}
 115
 116#if (TARGET_ABI_BITS == 32) && !defined(TARGET_ABI_MIPSN32)
 117static inline uint64_t target_offset64(uint32_t word0, uint32_t word1)
 118{
 119#if TARGET_BIG_ENDIAN
 120    return ((uint64_t)word0 << 32) | word1;
 121#else
 122    return ((uint64_t)word1 << 32) | word0;
 123#endif
 124}
 125#else /* TARGET_ABI_BITS == 32 && !defined(TARGET_ABI_MIPSN32) */
 126static inline uint64_t target_offset64(uint64_t word0, uint64_t word1)
 127{
 128    return word0;
 129}
 130#endif /* TARGET_ABI_BITS != 32 */
 131
 132void print_termios(void *arg);
 133
 134/* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
 135#ifdef TARGET_ARM
 136static inline int regpairs_aligned(CPUArchState *cpu_env, int num)
 137{
 138    return cpu_env->eabi == 1;
 139}
 140#elif defined(TARGET_MIPS) && defined(TARGET_ABI_MIPSO32)
 141static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
 142#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
 143/*
 144 * SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs
 145 * of registers which translates to the same as ARM/MIPS, because we start with
 146 * r3 as arg1
 147 */
 148static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
 149#elif defined(TARGET_SH4)
 150/* SH4 doesn't align register pairs, except for p{read,write}64 */
 151static inline int regpairs_aligned(CPUArchState *cpu_env, int num)
 152{
 153    switch (num) {
 154    case TARGET_NR_pread64:
 155    case TARGET_NR_pwrite64:
 156        return 1;
 157
 158    default:
 159        return 0;
 160    }
 161}
 162#elif defined(TARGET_XTENSA)
 163static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
 164#elif defined(TARGET_HEXAGON)
 165static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
 166#else
 167static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 0; }
 168#endif
 169
 170/**
 171 * preexit_cleanup: housekeeping before the guest exits
 172 *
 173 * env: the CPU state
 174 * code: the exit code
 175 */
 176void preexit_cleanup(CPUArchState *env, int code);
 177
 178/*
 179 * Include target-specific struct and function definitions;
 180 * they may need access to the target-independent structures
 181 * above, so include them last.
 182 */
 183#include "target_cpu.h"
 184#include "target_structs.h"
 185
 186#endif
 187