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11#include "qemu/osdep.h"
12#include <sys/ioctl.h>
13
14#include <linux/kvm.h>
15
16#include "qemu/timer.h"
17#include "qemu/error-report.h"
18#include "qemu/main-loop.h"
19#include "qom/object.h"
20#include "qapi/error.h"
21#include "sysemu/sysemu.h"
22#include "sysemu/kvm.h"
23#include "sysemu/kvm_int.h"
24#include "kvm_arm.h"
25#include "cpu.h"
26#include "trace.h"
27#include "internals.h"
28#include "hw/pci/pci.h"
29#include "exec/memattrs.h"
30#include "exec/address-spaces.h"
31#include "hw/boards.h"
32#include "hw/irq.h"
33#include "qemu/log.h"
34
35const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
36 KVM_CAP_LAST_INFO
37};
38
39static bool cap_has_mp_state;
40static bool cap_has_inject_serror_esr;
41static bool cap_has_inject_ext_dabt;
42
43static ARMHostCPUFeatures arm_host_cpu_features;
44
45int kvm_arm_vcpu_init(CPUState *cs)
46{
47 ARMCPU *cpu = ARM_CPU(cs);
48 struct kvm_vcpu_init init;
49
50 init.target = cpu->kvm_target;
51 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
52
53 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
54}
55
56int kvm_arm_vcpu_finalize(CPUState *cs, int feature)
57{
58 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature);
59}
60
61void kvm_arm_init_serror_injection(CPUState *cs)
62{
63 cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
64 KVM_CAP_ARM_INJECT_SERROR_ESR);
65}
66
67bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
68 int *fdarray,
69 struct kvm_vcpu_init *init)
70{
71 int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1;
72 int max_vm_pa_size;
73
74 kvmfd = qemu_open_old("/dev/kvm", O_RDWR);
75 if (kvmfd < 0) {
76 goto err;
77 }
78 max_vm_pa_size = ioctl(kvmfd, KVM_CHECK_EXTENSION, KVM_CAP_ARM_VM_IPA_SIZE);
79 if (max_vm_pa_size < 0) {
80 max_vm_pa_size = 0;
81 }
82 vmfd = ioctl(kvmfd, KVM_CREATE_VM, max_vm_pa_size);
83 if (vmfd < 0) {
84 goto err;
85 }
86 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
87 if (cpufd < 0) {
88 goto err;
89 }
90
91 if (!init) {
92
93 goto finish;
94 }
95
96 if (init->target == -1) {
97 struct kvm_vcpu_init preferred;
98
99 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred);
100 if (!ret) {
101 init->target = preferred.target;
102 }
103 }
104 if (ret >= 0) {
105 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
106 if (ret < 0) {
107 goto err;
108 }
109 } else if (cpus_to_try) {
110
111
112
113
114
115 struct kvm_vcpu_init try;
116
117 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
118 try.target = *cpus_to_try++;
119 memcpy(try.features, init->features, sizeof(init->features));
120 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, &try);
121 if (ret >= 0) {
122 break;
123 }
124 }
125 if (ret < 0) {
126 goto err;
127 }
128 init->target = try.target;
129 } else {
130
131
132
133
134 goto err;
135 }
136
137finish:
138 fdarray[0] = kvmfd;
139 fdarray[1] = vmfd;
140 fdarray[2] = cpufd;
141
142 return true;
143
144err:
145 if (cpufd >= 0) {
146 close(cpufd);
147 }
148 if (vmfd >= 0) {
149 close(vmfd);
150 }
151 if (kvmfd >= 0) {
152 close(kvmfd);
153 }
154
155 return false;
156}
157
158void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
159{
160 int i;
161
162 for (i = 2; i >= 0; i--) {
163 close(fdarray[i]);
164 }
165}
166
167void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
168{
169 CPUARMState *env = &cpu->env;
170
171 if (!arm_host_cpu_features.dtb_compatible) {
172 if (!kvm_enabled() ||
173 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
174
175
176
177 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
178 cpu->host_cpu_probe_failed = true;
179 return;
180 }
181 }
182
183 cpu->kvm_target = arm_host_cpu_features.target;
184 cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
185 cpu->isar = arm_host_cpu_features.isar;
186 env->features = arm_host_cpu_features.features;
187}
188
189static bool kvm_no_adjvtime_get(Object *obj, Error **errp)
190{
191 return !ARM_CPU(obj)->kvm_adjvtime;
192}
193
194static void kvm_no_adjvtime_set(Object *obj, bool value, Error **errp)
195{
196 ARM_CPU(obj)->kvm_adjvtime = !value;
197}
198
199static bool kvm_steal_time_get(Object *obj, Error **errp)
200{
201 return ARM_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF;
202}
203
204static void kvm_steal_time_set(Object *obj, bool value, Error **errp)
205{
206 ARM_CPU(obj)->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
207}
208
209
210void kvm_arm_add_vcpu_properties(Object *obj)
211{
212 ARMCPU *cpu = ARM_CPU(obj);
213 CPUARMState *env = &cpu->env;
214
215 if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
216 cpu->kvm_adjvtime = true;
217 object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get,
218 kvm_no_adjvtime_set);
219 object_property_set_description(obj, "kvm-no-adjvtime",
220 "Set on to disable the adjustment of "
221 "the virtual counter. VM stopped time "
222 "will be counted.");
223 }
224
225 cpu->kvm_steal_time = ON_OFF_AUTO_AUTO;
226 object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get,
227 kvm_steal_time_set);
228 object_property_set_description(obj, "kvm-steal-time",
229 "Set off to disable KVM steal time.");
230}
231
232bool kvm_arm_pmu_supported(void)
233{
234 return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3);
235}
236
237int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa)
238{
239 KVMState *s = KVM_STATE(ms->accelerator);
240 int ret;
241
242 ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
243 *fixed_ipa = ret <= 0;
244
245 return ret > 0 ? ret : 40;
246}
247
248int kvm_arch_init(MachineState *ms, KVMState *s)
249{
250 int ret = 0;
251
252
253
254 kvm_async_interrupts_allowed = true;
255
256
257
258
259
260 kvm_halt_in_kernel_allowed = true;
261
262 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
263
264 if (ms->smp.cpus > 256 &&
265 !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
266 error_report("Using more than 256 vcpus requires a host kernel "
267 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
268 ret = -EINVAL;
269 }
270
271 if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) {
272 if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) {
273 error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
274 } else {
275
276 cap_has_inject_ext_dabt = kvm_check_extension(s,
277 KVM_CAP_ARM_INJECT_EXT_DABT);
278 }
279 }
280
281 return ret;
282}
283
284unsigned long kvm_arch_vcpu_id(CPUState *cpu)
285{
286 return cpu->cpu_index;
287}
288
289
290
291
292
293
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295
296
297
298
299
300
301typedef struct KVMDevice {
302 struct kvm_arm_device_addr kda;
303 struct kvm_device_attr kdattr;
304 uint64_t kda_addr_ormask;
305 MemoryRegion *mr;
306 QSLIST_ENTRY(KVMDevice) entries;
307 int dev_fd;
308} KVMDevice;
309
310static QSLIST_HEAD(, KVMDevice) kvm_devices_head;
311
312static void kvm_arm_devlistener_add(MemoryListener *listener,
313 MemoryRegionSection *section)
314{
315 KVMDevice *kd;
316
317 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
318 if (section->mr == kd->mr) {
319 kd->kda.addr = section->offset_within_address_space;
320 }
321 }
322}
323
324static void kvm_arm_devlistener_del(MemoryListener *listener,
325 MemoryRegionSection *section)
326{
327 KVMDevice *kd;
328
329 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
330 if (section->mr == kd->mr) {
331 kd->kda.addr = -1;
332 }
333 }
334}
335
336static MemoryListener devlistener = {
337 .name = "kvm-arm",
338 .region_add = kvm_arm_devlistener_add,
339 .region_del = kvm_arm_devlistener_del,
340};
341
342static void kvm_arm_set_device_addr(KVMDevice *kd)
343{
344 struct kvm_device_attr *attr = &kd->kdattr;
345 int ret;
346
347
348
349
350 if (kd->dev_fd >= 0) {
351 uint64_t addr = kd->kda.addr;
352
353 addr |= kd->kda_addr_ormask;
354 attr->addr = (uintptr_t)&addr;
355 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
356 } else {
357 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
358 }
359
360 if (ret < 0) {
361 fprintf(stderr, "Failed to set device address: %s\n",
362 strerror(-ret));
363 abort();
364 }
365}
366
367static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
368{
369 KVMDevice *kd, *tkd;
370
371 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
372 if (kd->kda.addr != -1) {
373 kvm_arm_set_device_addr(kd);
374 }
375 memory_region_unref(kd->mr);
376 QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
377 g_free(kd);
378 }
379 memory_listener_unregister(&devlistener);
380}
381
382static Notifier notify = {
383 .notify = kvm_arm_machine_init_done,
384};
385
386void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
387 uint64_t attr, int dev_fd, uint64_t addr_ormask)
388{
389 KVMDevice *kd;
390
391 if (!kvm_irqchip_in_kernel()) {
392 return;
393 }
394
395 if (QSLIST_EMPTY(&kvm_devices_head)) {
396 memory_listener_register(&devlistener, &address_space_memory);
397 qemu_add_machine_init_done_notifier(¬ify);
398 }
399 kd = g_new0(KVMDevice, 1);
400 kd->mr = mr;
401 kd->kda.id = devid;
402 kd->kda.addr = -1;
403 kd->kdattr.flags = 0;
404 kd->kdattr.group = group;
405 kd->kdattr.attr = attr;
406 kd->dev_fd = dev_fd;
407 kd->kda_addr_ormask = addr_ormask;
408 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
409 memory_region_ref(kd->mr);
410}
411
412static int compare_u64(const void *a, const void *b)
413{
414 if (*(uint64_t *)a > *(uint64_t *)b) {
415 return 1;
416 }
417 if (*(uint64_t *)a < *(uint64_t *)b) {
418 return -1;
419 }
420 return 0;
421}
422
423
424
425
426
427
428static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx)
429{
430 uint64_t *res;
431
432 res = bsearch(®idx, cpu->cpreg_indexes, cpu->cpreg_array_len,
433 sizeof(uint64_t), compare_u64);
434 assert(res);
435
436 return &cpu->cpreg_values[res - cpu->cpreg_indexes];
437}
438
439
440
441
442
443int kvm_arm_init_cpreg_list(ARMCPU *cpu)
444{
445 struct kvm_reg_list rl;
446 struct kvm_reg_list *rlp;
447 int i, ret, arraylen;
448 CPUState *cs = CPU(cpu);
449
450 rl.n = 0;
451 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
452 if (ret != -E2BIG) {
453 return ret;
454 }
455 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
456 rlp->n = rl.n;
457 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
458 if (ret) {
459 goto out;
460 }
461
462
463
464 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
465
466 for (i = 0, arraylen = 0; i < rlp->n; i++) {
467 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
468 continue;
469 }
470 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
471 case KVM_REG_SIZE_U32:
472 case KVM_REG_SIZE_U64:
473 break;
474 default:
475 fprintf(stderr, "Can't handle size of register in kernel list\n");
476 ret = -EINVAL;
477 goto out;
478 }
479
480 arraylen++;
481 }
482
483 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
484 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
485 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
486 arraylen);
487 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
488 arraylen);
489 cpu->cpreg_array_len = arraylen;
490 cpu->cpreg_vmstate_array_len = arraylen;
491
492 for (i = 0, arraylen = 0; i < rlp->n; i++) {
493 uint64_t regidx = rlp->reg[i];
494 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
495 continue;
496 }
497 cpu->cpreg_indexes[arraylen] = regidx;
498 arraylen++;
499 }
500 assert(cpu->cpreg_array_len == arraylen);
501
502 if (!write_kvmstate_to_list(cpu)) {
503
504
505
506 fprintf(stderr, "Initial read of kernel register state failed\n");
507 ret = -EINVAL;
508 goto out;
509 }
510
511out:
512 g_free(rlp);
513 return ret;
514}
515
516bool write_kvmstate_to_list(ARMCPU *cpu)
517{
518 CPUState *cs = CPU(cpu);
519 int i;
520 bool ok = true;
521
522 for (i = 0; i < cpu->cpreg_array_len; i++) {
523 struct kvm_one_reg r;
524 uint64_t regidx = cpu->cpreg_indexes[i];
525 uint32_t v32;
526 int ret;
527
528 r.id = regidx;
529
530 switch (regidx & KVM_REG_SIZE_MASK) {
531 case KVM_REG_SIZE_U32:
532 r.addr = (uintptr_t)&v32;
533 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
534 if (!ret) {
535 cpu->cpreg_values[i] = v32;
536 }
537 break;
538 case KVM_REG_SIZE_U64:
539 r.addr = (uintptr_t)(cpu->cpreg_values + i);
540 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
541 break;
542 default:
543 g_assert_not_reached();
544 }
545 if (ret) {
546 ok = false;
547 }
548 }
549 return ok;
550}
551
552bool write_list_to_kvmstate(ARMCPU *cpu, int level)
553{
554 CPUState *cs = CPU(cpu);
555 int i;
556 bool ok = true;
557
558 for (i = 0; i < cpu->cpreg_array_len; i++) {
559 struct kvm_one_reg r;
560 uint64_t regidx = cpu->cpreg_indexes[i];
561 uint32_t v32;
562 int ret;
563
564 if (kvm_arm_cpreg_level(regidx) > level) {
565 continue;
566 }
567
568 r.id = regidx;
569 switch (regidx & KVM_REG_SIZE_MASK) {
570 case KVM_REG_SIZE_U32:
571 v32 = cpu->cpreg_values[i];
572 r.addr = (uintptr_t)&v32;
573 break;
574 case KVM_REG_SIZE_U64:
575 r.addr = (uintptr_t)(cpu->cpreg_values + i);
576 break;
577 default:
578 g_assert_not_reached();
579 }
580 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
581 if (ret) {
582
583
584
585
586 ok = false;
587 }
588 }
589 return ok;
590}
591
592void kvm_arm_cpu_pre_save(ARMCPU *cpu)
593{
594
595 if (cpu->kvm_vtime_dirty) {
596 *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime;
597 }
598}
599
600void kvm_arm_cpu_post_load(ARMCPU *cpu)
601{
602
603 if (cpu->kvm_adjvtime) {
604 cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT);
605 cpu->kvm_vtime_dirty = true;
606 }
607}
608
609void kvm_arm_reset_vcpu(ARMCPU *cpu)
610{
611 int ret;
612
613
614
615
616 ret = kvm_arm_vcpu_init(CPU(cpu));
617 if (ret < 0) {
618 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
619 abort();
620 }
621 if (!write_kvmstate_to_list(cpu)) {
622 fprintf(stderr, "write_kvmstate_to_list failed\n");
623 abort();
624 }
625
626
627
628
629
630
631
632 write_list_to_cpustate(cpu);
633}
634
635
636
637
638int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
639{
640 if (cap_has_mp_state) {
641 struct kvm_mp_state mp_state = {
642 .mp_state = (cpu->power_state == PSCI_OFF) ?
643 KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
644 };
645 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
646 if (ret) {
647 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
648 __func__, ret, strerror(-ret));
649 return -1;
650 }
651 }
652
653 return 0;
654}
655
656
657
658
659int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
660{
661 if (cap_has_mp_state) {
662 struct kvm_mp_state mp_state;
663 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
664 if (ret) {
665 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
666 __func__, ret, strerror(-ret));
667 abort();
668 }
669 cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
670 PSCI_OFF : PSCI_ON;
671 }
672
673 return 0;
674}
675
676void kvm_arm_get_virtual_time(CPUState *cs)
677{
678 ARMCPU *cpu = ARM_CPU(cs);
679 struct kvm_one_reg reg = {
680 .id = KVM_REG_ARM_TIMER_CNT,
681 .addr = (uintptr_t)&cpu->kvm_vtime,
682 };
683 int ret;
684
685 if (cpu->kvm_vtime_dirty) {
686 return;
687 }
688
689 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®);
690 if (ret) {
691 error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
692 abort();
693 }
694
695 cpu->kvm_vtime_dirty = true;
696}
697
698void kvm_arm_put_virtual_time(CPUState *cs)
699{
700 ARMCPU *cpu = ARM_CPU(cs);
701 struct kvm_one_reg reg = {
702 .id = KVM_REG_ARM_TIMER_CNT,
703 .addr = (uintptr_t)&cpu->kvm_vtime,
704 };
705 int ret;
706
707 if (!cpu->kvm_vtime_dirty) {
708 return;
709 }
710
711 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®);
712 if (ret) {
713 error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
714 abort();
715 }
716
717 cpu->kvm_vtime_dirty = false;
718}
719
720int kvm_put_vcpu_events(ARMCPU *cpu)
721{
722 CPUARMState *env = &cpu->env;
723 struct kvm_vcpu_events events;
724 int ret;
725
726 if (!kvm_has_vcpu_events()) {
727 return 0;
728 }
729
730 memset(&events, 0, sizeof(events));
731 events.exception.serror_pending = env->serror.pending;
732
733
734
735
736 if (cap_has_inject_serror_esr) {
737 events.exception.serror_has_esr = env->serror.has_esr;
738 events.exception.serror_esr = env->serror.esr;
739 }
740
741 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
742 if (ret) {
743 error_report("failed to put vcpu events");
744 }
745
746 return ret;
747}
748
749int kvm_get_vcpu_events(ARMCPU *cpu)
750{
751 CPUARMState *env = &cpu->env;
752 struct kvm_vcpu_events events;
753 int ret;
754
755 if (!kvm_has_vcpu_events()) {
756 return 0;
757 }
758
759 memset(&events, 0, sizeof(events));
760 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
761 if (ret) {
762 error_report("failed to get vcpu events");
763 return ret;
764 }
765
766 env->serror.pending = events.exception.serror_pending;
767 env->serror.has_esr = events.exception.serror_has_esr;
768 env->serror.esr = events.exception.serror_esr;
769
770 return 0;
771}
772
773void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
774{
775 ARMCPU *cpu = ARM_CPU(cs);
776 CPUARMState *env = &cpu->env;
777
778 if (unlikely(env->ext_dabt_raised)) {
779
780
781
782
783
784
785
786 if (!arm_feature(env, ARM_FEATURE_AARCH64) &&
787 unlikely(!kvm_arm_verify_ext_dabt_pending(cs))) {
788
789 error_report("Data abort exception with no valid ISS generated by "
790 "guest memory access. KVM unable to emulate faulting "
791 "instruction. Failed to inject an external data abort "
792 "into the guest.");
793 abort();
794 }
795
796 env->ext_dabt_raised = 0;
797 }
798}
799
800MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
801{
802 ARMCPU *cpu;
803 uint32_t switched_level;
804
805 if (kvm_irqchip_in_kernel()) {
806
807
808
809
810 return MEMTXATTRS_UNSPECIFIED;
811 }
812
813 cpu = ARM_CPU(cs);
814
815
816 if (run->s.regs.device_irq_level != cpu->device_irq_level) {
817 switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
818
819 qemu_mutex_lock_iothread();
820
821 if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
822 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
823 !!(run->s.regs.device_irq_level &
824 KVM_ARM_DEV_EL1_VTIMER));
825 switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
826 }
827
828 if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
829 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
830 !!(run->s.regs.device_irq_level &
831 KVM_ARM_DEV_EL1_PTIMER));
832 switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
833 }
834
835 if (switched_level & KVM_ARM_DEV_PMU) {
836 qemu_set_irq(cpu->pmu_interrupt,
837 !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
838 switched_level &= ~KVM_ARM_DEV_PMU;
839 }
840
841 if (switched_level) {
842 qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
843 __func__, switched_level);
844 }
845
846
847 cpu->device_irq_level = run->s.regs.device_irq_level;
848 qemu_mutex_unlock_iothread();
849 }
850
851 return MEMTXATTRS_UNSPECIFIED;
852}
853
854void kvm_arm_vm_state_change(void *opaque, bool running, RunState state)
855{
856 CPUState *cs = opaque;
857 ARMCPU *cpu = ARM_CPU(cs);
858
859 if (running) {
860 if (cpu->kvm_adjvtime) {
861 kvm_arm_put_virtual_time(cs);
862 }
863 } else {
864 if (cpu->kvm_adjvtime) {
865 kvm_arm_get_virtual_time(cs);
866 }
867 }
868}
869
870
871
872
873
874
875
876
877
878
879static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
880 uint64_t fault_ipa)
881{
882 ARMCPU *cpu = ARM_CPU(cs);
883 CPUARMState *env = &cpu->env;
884
885
886
887 if (cap_has_inject_ext_dabt) {
888 struct kvm_vcpu_events events = { };
889
890
891
892
893
894
895
896 events.exception.ext_dabt_pending = 1;
897
898 if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) {
899 env->ext_dabt_raised = 1;
900 return 0;
901 }
902 } else {
903 error_report("Data abort exception triggered by guest memory access "
904 "at physical address: 0x" TARGET_FMT_lx,
905 (target_ulong)fault_ipa);
906 error_printf("KVM unable to emulate faulting instruction.\n");
907 }
908 return -1;
909}
910
911int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
912{
913 int ret = 0;
914
915 switch (run->exit_reason) {
916 case KVM_EXIT_DEBUG:
917 if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
918 ret = EXCP_DEBUG;
919 }
920 break;
921 case KVM_EXIT_ARM_NISV:
922
923 ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
924 run->arm_nisv.fault_ipa);
925 break;
926 default:
927 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
928 __func__, run->exit_reason);
929 break;
930 }
931 return ret;
932}
933
934bool kvm_arch_stop_on_emulation_error(CPUState *cs)
935{
936 return true;
937}
938
939int kvm_arch_process_async_events(CPUState *cs)
940{
941 return 0;
942}
943
944void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
945{
946 if (kvm_sw_breakpoints_active(cs)) {
947 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
948 }
949 if (kvm_arm_hw_debug_active(cs)) {
950 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
951 kvm_arm_copy_hw_debug_data(&dbg->arch);
952 }
953}
954
955void kvm_arch_init_irq_routing(KVMState *s)
956{
957}
958
959int kvm_arch_irqchip_create(KVMState *s)
960{
961 if (kvm_kernel_irqchip_split()) {
962 error_report("-machine kernel_irqchip=split is not supported on ARM.");
963 exit(1);
964 }
965
966
967
968
969 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
970}
971
972int kvm_arm_vgic_probe(void)
973{
974 int val = 0;
975
976 if (kvm_create_device(kvm_state,
977 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
978 val |= KVM_ARM_VGIC_V3;
979 }
980 if (kvm_create_device(kvm_state,
981 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
982 val |= KVM_ARM_VGIC_V2;
983 }
984 return val;
985}
986
987int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level)
988{
989 int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq;
990 int cpu_idx1 = cpu % 256;
991 int cpu_idx2 = cpu / 256;
992
993 kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
994 (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT);
995
996 return kvm_set_irq(kvm_state, kvm_irq, !!level);
997}
998
999int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
1000 uint64_t address, uint32_t data, PCIDevice *dev)
1001{
1002 AddressSpace *as = pci_device_iommu_address_space(dev);
1003 hwaddr xlat, len, doorbell_gpa;
1004 MemoryRegionSection mrs;
1005 MemoryRegion *mr;
1006
1007 if (as == &address_space_memory) {
1008 return 0;
1009 }
1010
1011
1012
1013 RCU_READ_LOCK_GUARD();
1014
1015 mr = address_space_translate(as, address, &xlat, &len, true,
1016 MEMTXATTRS_UNSPECIFIED);
1017
1018 if (!mr) {
1019 return 1;
1020 }
1021
1022 mrs = memory_region_find(mr, xlat, 1);
1023
1024 if (!mrs.mr) {
1025 return 1;
1026 }
1027
1028 doorbell_gpa = mrs.offset_within_address_space;
1029 memory_region_unref(mrs.mr);
1030
1031 route->u.msi.address_lo = doorbell_gpa;
1032 route->u.msi.address_hi = doorbell_gpa >> 32;
1033
1034 trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
1035
1036 return 0;
1037}
1038
1039int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
1040 int vector, PCIDevice *dev)
1041{
1042 return 0;
1043}
1044
1045int kvm_arch_release_virq_post(int virq)
1046{
1047 return 0;
1048}
1049
1050int kvm_arch_msi_data_to_gsi(uint32_t data)
1051{
1052 return (data - 32) & 0xffff;
1053}
1054
1055bool kvm_arch_cpu_check_are_resettable(void)
1056{
1057 return true;
1058}
1059