qemu/target/loongarch/iocsr_helper.c
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   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Copyright (c) 2021 Loongson Technology Corporation Limited
   4 *
   5 * Helpers for IOCSR reads/writes
   6 */
   7
   8#include "qemu/osdep.h"
   9#include "qemu/main-loop.h"
  10#include "cpu.h"
  11#include "qemu/host-utils.h"
  12#include "exec/helper-proto.h"
  13#include "exec/exec-all.h"
  14#include "exec/cpu_ldst.h"
  15#include "tcg/tcg-ldst.h"
  16
  17uint64_t helper_iocsrrd_b(CPULoongArchState *env, target_ulong r_addr)
  18{
  19    return address_space_ldub(&env->address_space_iocsr, r_addr,
  20                              MEMTXATTRS_UNSPECIFIED, NULL);
  21}
  22
  23uint64_t helper_iocsrrd_h(CPULoongArchState *env, target_ulong r_addr)
  24{
  25    return address_space_lduw(&env->address_space_iocsr, r_addr,
  26                              MEMTXATTRS_UNSPECIFIED, NULL);
  27}
  28
  29uint64_t helper_iocsrrd_w(CPULoongArchState *env, target_ulong r_addr)
  30{
  31    return address_space_ldl(&env->address_space_iocsr, r_addr,
  32                             MEMTXATTRS_UNSPECIFIED, NULL);
  33}
  34
  35uint64_t helper_iocsrrd_d(CPULoongArchState *env, target_ulong r_addr)
  36{
  37    return address_space_ldq(&env->address_space_iocsr, r_addr,
  38                             MEMTXATTRS_UNSPECIFIED, NULL);
  39}
  40
  41void helper_iocsrwr_b(CPULoongArchState *env, target_ulong w_addr,
  42                      target_ulong val)
  43{
  44    address_space_stb(&env->address_space_iocsr, w_addr,
  45                      val, MEMTXATTRS_UNSPECIFIED, NULL);
  46}
  47
  48void helper_iocsrwr_h(CPULoongArchState *env, target_ulong w_addr,
  49                      target_ulong val)
  50{
  51    address_space_stw(&env->address_space_iocsr, w_addr,
  52                      val, MEMTXATTRS_UNSPECIFIED, NULL);
  53}
  54
  55void helper_iocsrwr_w(CPULoongArchState *env, target_ulong w_addr,
  56                      target_ulong val)
  57{
  58    address_space_stl(&env->address_space_iocsr, w_addr,
  59                      val, MEMTXATTRS_UNSPECIFIED, NULL);
  60}
  61
  62void helper_iocsrwr_d(CPULoongArchState *env, target_ulong w_addr,
  63                      target_ulong val)
  64{
  65    address_space_stq(&env->address_space_iocsr, w_addr,
  66                      val, MEMTXATTRS_UNSPECIFIED, NULL);
  67}
  68