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10#ifndef MIPS_TCG_INTERNAL_H
11#define MIPS_TCG_INTERNAL_H
12
13#include "tcg/tcg.h"
14#include "exec/memattrs.h"
15#include "hw/core/cpu.h"
16#include "cpu.h"
17
18void mips_tcg_init(void);
19
20void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
21G_NORETURN void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
22 MMUAccessType access_type, int mmu_idx,
23 uintptr_t retaddr);
24
25const char *mips_exception_name(int32_t exception);
26
27G_NORETURN void do_raise_exception_err(CPUMIPSState *env, uint32_t exception,
28 int error_code, uintptr_t pc);
29
30static inline G_NORETURN
31void do_raise_exception(CPUMIPSState *env,
32 uint32_t exception,
33 uintptr_t pc)
34{
35 do_raise_exception_err(env, exception, 0, pc);
36}
37
38#if !defined(CONFIG_USER_ONLY)
39
40void mips_cpu_do_interrupt(CPUState *cpu);
41bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
42
43void mmu_init(CPUMIPSState *env, const mips_def_t *def);
44
45void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
46
47void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
48uint32_t cpu_mips_get_random(CPUMIPSState *env);
49
50bool mips_io_recompile_replay_branch(CPUState *cs, const TranslationBlock *tb);
51
52hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
53 MMUAccessType access_type, uintptr_t retaddr);
54void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
55 vaddr addr, unsigned size,
56 MMUAccessType access_type,
57 int mmu_idx, MemTxAttrs attrs,
58 MemTxResult response, uintptr_t retaddr);
59void cpu_mips_tlb_flush(CPUMIPSState *env);
60
61bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
62 MMUAccessType access_type, int mmu_idx,
63 bool probe, uintptr_t retaddr);
64
65void mips_semihosting(CPUMIPSState *env);
66
67#endif
68
69#endif
70