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20#include "qemu/osdep.h"
21#include "cpu.h"
22#include "migration/cpu.h"
23
24static const VMStateDescription vmstate_tlb_entry = {
25 .name = "tlb_entry",
26 .version_id = 1,
27 .minimum_version_id = 1,
28 .fields = (VMStateField[]) {
29 VMSTATE_UINTTL(mr, OpenRISCTLBEntry),
30 VMSTATE_UINTTL(tr, OpenRISCTLBEntry),
31 VMSTATE_END_OF_LIST()
32 }
33};
34
35static const VMStateDescription vmstate_cpu_tlb = {
36 .name = "cpu_tlb",
37 .version_id = 2,
38 .minimum_version_id = 2,
39 .fields = (VMStateField[]) {
40 VMSTATE_STRUCT_ARRAY(itlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
41 vmstate_tlb_entry, OpenRISCTLBEntry),
42 VMSTATE_STRUCT_ARRAY(dtlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
43 vmstate_tlb_entry, OpenRISCTLBEntry),
44 VMSTATE_END_OF_LIST()
45 }
46};
47
48static int get_sr(QEMUFile *f, void *opaque, size_t size,
49 const VMStateField *field)
50{
51 CPUOpenRISCState *env = opaque;
52 cpu_set_sr(env, qemu_get_be32(f));
53 return 0;
54}
55
56static int put_sr(QEMUFile *f, void *opaque, size_t size,
57 const VMStateField *field, JSONWriter *vmdesc)
58{
59 CPUOpenRISCState *env = opaque;
60 qemu_put_be32(f, cpu_get_sr(env));
61 return 0;
62}
63
64static const VMStateInfo vmstate_sr = {
65 .name = "sr",
66 .get = get_sr,
67 .put = put_sr,
68};
69
70static const VMStateDescription vmstate_env = {
71 .name = "env",
72 .version_id = 6,
73 .minimum_version_id = 6,
74 .fields = (VMStateField[]) {
75 VMSTATE_UINTTL_2DARRAY(shadow_gpr, CPUOpenRISCState, 16, 32),
76 VMSTATE_UINTTL(pc, CPUOpenRISCState),
77 VMSTATE_UINTTL(ppc, CPUOpenRISCState),
78 VMSTATE_UINTTL(jmp_pc, CPUOpenRISCState),
79 VMSTATE_UINTTL(lock_addr, CPUOpenRISCState),
80 VMSTATE_UINTTL(lock_value, CPUOpenRISCState),
81 VMSTATE_UINTTL(epcr, CPUOpenRISCState),
82 VMSTATE_UINTTL(eear, CPUOpenRISCState),
83
84
85
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87
88
89
90 {
91 .name = "sr",
92 .version_id = 0,
93 .size = sizeof(uint32_t),
94 .info = &vmstate_sr,
95 .flags = VMS_SINGLE,
96 .offset = 0
97 },
98
99 VMSTATE_UINT32(vr, CPUOpenRISCState),
100 VMSTATE_UINT32(upr, CPUOpenRISCState),
101 VMSTATE_UINT32(cpucfgr, CPUOpenRISCState),
102 VMSTATE_UINT32(dmmucfgr, CPUOpenRISCState),
103 VMSTATE_UINT32(immucfgr, CPUOpenRISCState),
104 VMSTATE_UINT32(evbar, CPUOpenRISCState),
105 VMSTATE_UINT32(pmr, CPUOpenRISCState),
106 VMSTATE_UINT32(esr, CPUOpenRISCState),
107 VMSTATE_UINT32(fpcsr, CPUOpenRISCState),
108 VMSTATE_UINT64(mac, CPUOpenRISCState),
109
110 VMSTATE_STRUCT(tlb, CPUOpenRISCState, 1,
111 vmstate_cpu_tlb, CPUOpenRISCTLBContext),
112
113 VMSTATE_TIMER_PTR(timer, CPUOpenRISCState),
114 VMSTATE_UINT32(ttmr, CPUOpenRISCState),
115
116 VMSTATE_UINT32(picmr, CPUOpenRISCState),
117 VMSTATE_UINT32(picsr, CPUOpenRISCState),
118
119 VMSTATE_END_OF_LIST()
120 }
121};
122
123static int cpu_post_load(void *opaque, int version_id)
124{
125 OpenRISCCPU *cpu = opaque;
126 CPUOpenRISCState *env = &cpu->env;
127
128
129 cpu_set_fpcsr(env, env->fpcsr);
130 return 0;
131}
132
133const VMStateDescription vmstate_openrisc_cpu = {
134 .name = "cpu",
135 .version_id = 1,
136 .minimum_version_id = 1,
137 .post_load = cpu_post_load,
138 .fields = (VMStateField[]) {
139 VMSTATE_CPU(),
140 VMSTATE_STRUCT(env, OpenRISCCPU, 1, vmstate_env, CPUOpenRISCState),
141 VMSTATE_END_OF_LIST()
142 }
143};
144