LXR qemu/tcg/loongarch64/tcg-target-con-str.h

   1/* SPDX-License-Identifier: MIT */
   2/*
   3 * Define LoongArch target-specific operand constraints.
   4 *
   5 * Copyright (c) 2021 WANG Xuerui <git@xen0n.name>
   6 *
   7 * Based on tcg/riscv/tcg-target-con-str.h
   8 *
   9 * Copyright (c) 2021 Linaro
  10 */
  11
  12/*
  13 * Define constraint letters for register sets:
  14 * REGS(letter, register_mask)
  15 */
  16REGS('r', ALL_GENERAL_REGS)
  17REGS('L', ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS)
  18
  19/*
  20 * Define constraint letters for constants:
  21 * CONST(letter, TCG_CT_CONST_* bit set)
  22 */
  23CONST('I', TCG_CT_CONST_S12)
  24CONST('N', TCG_CT_CONST_N12)
  25CONST('U', TCG_CT_CONST_U12)
  26CONST('Z', TCG_CT_CONST_ZERO)
  27CONST('C', TCG_CT_CONST_C12)
  28CONST('W', TCG_CT_CONST_WSZ)
  29