qemu/hw/i2c/core.c
<<
>>
Prefs
   1/*
   2 * QEMU I2C bus interface.
   3 *
   4 * Copyright (c) 2007 CodeSourcery.
   5 * Written by Paul Brook
   6 *
   7 * This code is licensed under the LGPL.
   8 */
   9
  10#include "qemu/osdep.h"
  11#include "hw/i2c/i2c.h"
  12#include "hw/qdev-properties.h"
  13#include "migration/vmstate.h"
  14#include "qapi/error.h"
  15#include "qemu/module.h"
  16#include "qemu/main-loop.h"
  17#include "trace.h"
  18
  19#define I2C_BROADCAST 0x00
  20
  21static Property i2c_props[] = {
  22    DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0),
  23    DEFINE_PROP_END_OF_LIST(),
  24};
  25
  26static const TypeInfo i2c_bus_info = {
  27    .name = TYPE_I2C_BUS,
  28    .parent = TYPE_BUS,
  29    .instance_size = sizeof(I2CBus),
  30};
  31
  32static int i2c_bus_pre_save(void *opaque)
  33{
  34    I2CBus *bus = opaque;
  35
  36    bus->saved_address = -1;
  37    if (!QLIST_EMPTY(&bus->current_devs)) {
  38        if (!bus->broadcast) {
  39            bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address;
  40        } else {
  41            bus->saved_address = I2C_BROADCAST;
  42        }
  43    }
  44
  45    return 0;
  46}
  47
  48static const VMStateDescription vmstate_i2c_bus = {
  49    .name = "i2c_bus",
  50    .version_id = 1,
  51    .minimum_version_id = 1,
  52    .pre_save = i2c_bus_pre_save,
  53    .fields = (VMStateField[]) {
  54        VMSTATE_UINT8(saved_address, I2CBus),
  55        VMSTATE_END_OF_LIST()
  56    }
  57};
  58
  59/* Create a new I2C bus.  */
  60I2CBus *i2c_init_bus(DeviceState *parent, const char *name)
  61{
  62    I2CBus *bus;
  63
  64    bus = I2C_BUS(qbus_new(TYPE_I2C_BUS, parent, name));
  65    QLIST_INIT(&bus->current_devs);
  66    QSIMPLEQ_INIT(&bus->pending_masters);
  67    vmstate_register(NULL, VMSTATE_INSTANCE_ID_ANY, &vmstate_i2c_bus, bus);
  68    return bus;
  69}
  70
  71void i2c_slave_set_address(I2CSlave *dev, uint8_t address)
  72{
  73    dev->address = address;
  74}
  75
  76/* Return nonzero if bus is busy.  */
  77int i2c_bus_busy(I2CBus *bus)
  78{
  79    return !QLIST_EMPTY(&bus->current_devs) || bus->bh;
  80}
  81
  82bool i2c_scan_bus(I2CBus *bus, uint8_t address, bool broadcast,
  83                  I2CNodeList *current_devs)
  84{
  85    BusChild *kid;
  86
  87    QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) {
  88        DeviceState *qdev = kid->child;
  89        I2CSlave *candidate = I2C_SLAVE(qdev);
  90        I2CSlaveClass *sc = I2C_SLAVE_GET_CLASS(candidate);
  91
  92        if (sc->match_and_add(candidate, address, broadcast, current_devs)) {
  93            if (!broadcast) {
  94                return true;
  95            }
  96        }
  97    }
  98
  99    /*
 100     * If broadcast was true, and the list was full or empty, return true. If
 101     * broadcast was false, return false.
 102     */
 103    return broadcast;
 104}
 105
 106/* TODO: Make this handle multiple masters.  */
 107/*
 108 * Start or continue an i2c transaction.  When this is called for the
 109 * first time or after an i2c_end_transfer(), if it returns an error
 110 * the bus transaction is terminated (or really never started).  If
 111 * this is called after another i2c_start_transfer() without an
 112 * intervening i2c_end_transfer(), and it returns an error, the
 113 * transaction will not be terminated.  The caller must do it.
 114 *
 115 * This corresponds with the way real hardware works.  The SMBus
 116 * protocol uses a start transfer to switch from write to read mode
 117 * without releasing the bus.  If that fails, the bus is still
 118 * in a transaction.
 119 *
 120 * @event must be I2C_START_RECV or I2C_START_SEND.
 121 */
 122static int i2c_do_start_transfer(I2CBus *bus, uint8_t address,
 123                                 enum i2c_event event)
 124{
 125    I2CSlaveClass *sc;
 126    I2CNode *node;
 127    bool bus_scanned = false;
 128
 129    if (address == I2C_BROADCAST) {
 130        /*
 131         * This is a broadcast, the current_devs will be all the devices of the
 132         * bus.
 133         */
 134        bus->broadcast = true;
 135    }
 136
 137    /*
 138     * If there are already devices in the list, that means we are in
 139     * the middle of a transaction and we shouldn't rescan the bus.
 140     *
 141     * This happens with any SMBus transaction, even on a pure I2C
 142     * device.  The interface does a transaction start without
 143     * terminating the previous transaction.
 144     */
 145    if (QLIST_EMPTY(&bus->current_devs)) {
 146        /* Disregard whether devices were found. */
 147        (void)i2c_scan_bus(bus, address, bus->broadcast, &bus->current_devs);
 148        bus_scanned = true;
 149    }
 150
 151    if (QLIST_EMPTY(&bus->current_devs)) {
 152        return 1;
 153    }
 154
 155    QLIST_FOREACH(node, &bus->current_devs, next) {
 156        I2CSlave *s = node->elt;
 157        int rv;
 158
 159        sc = I2C_SLAVE_GET_CLASS(s);
 160        /* If the bus is already busy, assume this is a repeated
 161           start condition.  */
 162
 163        if (sc->event) {
 164            trace_i2c_event(event == I2C_START_SEND ? "start" : "start_async",
 165                            s->address);
 166            rv = sc->event(s, event);
 167            if (rv && !bus->broadcast) {
 168                if (bus_scanned) {
 169                    /* First call, terminate the transfer. */
 170                    i2c_end_transfer(bus);
 171                }
 172                return rv;
 173            }
 174        }
 175    }
 176    return 0;
 177}
 178
 179int i2c_start_transfer(I2CBus *bus, uint8_t address, bool is_recv)
 180{
 181    return i2c_do_start_transfer(bus, address, is_recv
 182                                               ? I2C_START_RECV
 183                                               : I2C_START_SEND);
 184}
 185
 186void i2c_bus_master(I2CBus *bus, QEMUBH *bh)
 187{
 188    if (i2c_bus_busy(bus)) {
 189        I2CPendingMaster *node = g_new(struct I2CPendingMaster, 1);
 190        node->bh = bh;
 191
 192        QSIMPLEQ_INSERT_TAIL(&bus->pending_masters, node, entry);
 193
 194        return;
 195    }
 196
 197    bus->bh = bh;
 198    qemu_bh_schedule(bus->bh);
 199}
 200
 201void i2c_bus_release(I2CBus *bus)
 202{
 203    bus->bh = NULL;
 204}
 205
 206int i2c_start_recv(I2CBus *bus, uint8_t address)
 207{
 208    return i2c_do_start_transfer(bus, address, I2C_START_RECV);
 209}
 210
 211int i2c_start_send(I2CBus *bus, uint8_t address)
 212{
 213    return i2c_do_start_transfer(bus, address, I2C_START_SEND);
 214}
 215
 216int i2c_start_send_async(I2CBus *bus, uint8_t address)
 217{
 218    return i2c_do_start_transfer(bus, address, I2C_START_SEND_ASYNC);
 219}
 220
 221void i2c_end_transfer(I2CBus *bus)
 222{
 223    I2CSlaveClass *sc;
 224    I2CNode *node, *next;
 225
 226    QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) {
 227        I2CSlave *s = node->elt;
 228        sc = I2C_SLAVE_GET_CLASS(s);
 229        if (sc->event) {
 230            trace_i2c_event("finish", s->address);
 231            sc->event(s, I2C_FINISH);
 232        }
 233        QLIST_REMOVE(node, next);
 234        g_free(node);
 235    }
 236    bus->broadcast = false;
 237
 238    if (!QSIMPLEQ_EMPTY(&bus->pending_masters)) {
 239        I2CPendingMaster *node = QSIMPLEQ_FIRST(&bus->pending_masters);
 240        bus->bh = node->bh;
 241
 242        QSIMPLEQ_REMOVE_HEAD(&bus->pending_masters, entry);
 243        g_free(node);
 244
 245        qemu_bh_schedule(bus->bh);
 246    }
 247}
 248
 249int i2c_send(I2CBus *bus, uint8_t data)
 250{
 251    I2CSlaveClass *sc;
 252    I2CSlave *s;
 253    I2CNode *node;
 254    int ret = 0;
 255
 256    QLIST_FOREACH(node, &bus->current_devs, next) {
 257        s = node->elt;
 258        sc = I2C_SLAVE_GET_CLASS(s);
 259        if (sc->send) {
 260            trace_i2c_send(s->address, data);
 261            ret = ret || sc->send(s, data);
 262        } else {
 263            ret = -1;
 264        }
 265    }
 266
 267    return ret ? -1 : 0;
 268}
 269
 270int i2c_send_async(I2CBus *bus, uint8_t data)
 271{
 272    I2CNode *node = QLIST_FIRST(&bus->current_devs);
 273    I2CSlave *slave = node->elt;
 274    I2CSlaveClass *sc = I2C_SLAVE_GET_CLASS(slave);
 275
 276    if (!sc->send_async) {
 277        return -1;
 278    }
 279
 280    trace_i2c_send_async(slave->address, data);
 281
 282    sc->send_async(slave, data);
 283
 284    return 0;
 285}
 286
 287uint8_t i2c_recv(I2CBus *bus)
 288{
 289    uint8_t data = 0xff;
 290    I2CSlaveClass *sc;
 291    I2CSlave *s;
 292
 293    if (!QLIST_EMPTY(&bus->current_devs) && !bus->broadcast) {
 294        sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt);
 295        if (sc->recv) {
 296            s = QLIST_FIRST(&bus->current_devs)->elt;
 297            data = sc->recv(s);
 298            trace_i2c_recv(s->address, data);
 299        }
 300    }
 301
 302    return data;
 303}
 304
 305void i2c_nack(I2CBus *bus)
 306{
 307    I2CSlaveClass *sc;
 308    I2CNode *node;
 309
 310    if (QLIST_EMPTY(&bus->current_devs)) {
 311        return;
 312    }
 313
 314    QLIST_FOREACH(node, &bus->current_devs, next) {
 315        sc = I2C_SLAVE_GET_CLASS(node->elt);
 316        if (sc->event) {
 317            trace_i2c_event("nack", node->elt->address);
 318            sc->event(node->elt, I2C_NACK);
 319        }
 320    }
 321}
 322
 323void i2c_ack(I2CBus *bus)
 324{
 325    if (!bus->bh) {
 326        return;
 327    }
 328
 329    trace_i2c_ack();
 330
 331    qemu_bh_schedule(bus->bh);
 332}
 333
 334static int i2c_slave_post_load(void *opaque, int version_id)
 335{
 336    I2CSlave *dev = opaque;
 337    I2CBus *bus;
 338    I2CNode *node;
 339
 340    bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev)));
 341    if ((bus->saved_address == dev->address) ||
 342        (bus->saved_address == I2C_BROADCAST)) {
 343        node = g_new(struct I2CNode, 1);
 344        node->elt = dev;
 345        QLIST_INSERT_HEAD(&bus->current_devs, node, next);
 346    }
 347    return 0;
 348}
 349
 350const VMStateDescription vmstate_i2c_slave = {
 351    .name = "I2CSlave",
 352    .version_id = 1,
 353    .minimum_version_id = 1,
 354    .post_load = i2c_slave_post_load,
 355    .fields = (VMStateField[]) {
 356        VMSTATE_UINT8(address, I2CSlave),
 357        VMSTATE_END_OF_LIST()
 358    }
 359};
 360
 361I2CSlave *i2c_slave_new(const char *name, uint8_t addr)
 362{
 363    DeviceState *dev;
 364
 365    dev = qdev_new(name);
 366    qdev_prop_set_uint8(dev, "address", addr);
 367    return I2C_SLAVE(dev);
 368}
 369
 370bool i2c_slave_realize_and_unref(I2CSlave *dev, I2CBus *bus, Error **errp)
 371{
 372    return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp);
 373}
 374
 375I2CSlave *i2c_slave_create_simple(I2CBus *bus, const char *name, uint8_t addr)
 376{
 377    I2CSlave *dev = i2c_slave_new(name, addr);
 378
 379    i2c_slave_realize_and_unref(dev, bus, &error_abort);
 380
 381    return dev;
 382}
 383
 384static bool i2c_slave_match(I2CSlave *candidate, uint8_t address,
 385                            bool broadcast, I2CNodeList *current_devs)
 386{
 387    if ((candidate->address == address) || (broadcast)) {
 388        I2CNode *node = g_new(struct I2CNode, 1);
 389        node->elt = candidate;
 390        QLIST_INSERT_HEAD(current_devs, node, next);
 391        return true;
 392    }
 393
 394    /* Not found and not broadcast. */
 395    return false;
 396}
 397
 398static void i2c_slave_class_init(ObjectClass *klass, void *data)
 399{
 400    DeviceClass *k = DEVICE_CLASS(klass);
 401    I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
 402    set_bit(DEVICE_CATEGORY_MISC, k->categories);
 403    k->bus_type = TYPE_I2C_BUS;
 404    device_class_set_props(k, i2c_props);
 405    sc->match_and_add = i2c_slave_match;
 406}
 407
 408static const TypeInfo i2c_slave_type_info = {
 409    .name = TYPE_I2C_SLAVE,
 410    .parent = TYPE_DEVICE,
 411    .instance_size = sizeof(I2CSlave),
 412    .abstract = true,
 413    .class_size = sizeof(I2CSlaveClass),
 414    .class_init = i2c_slave_class_init,
 415};
 416
 417static void i2c_slave_register_types(void)
 418{
 419    type_register_static(&i2c_bus_info);
 420    type_register_static(&i2c_slave_type_info);
 421}
 422
 423type_init(i2c_slave_register_types)
 424