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12#include "qemu/osdep.h"
13#include "e500.h"
14#include "sysemu/device_tree.h"
15#include "hw/ppc/openpic.h"
16#include "qemu/error-report.h"
17#include "qemu/units.h"
18#include "cpu.h"
19
20static void mpc8544ds_fixup_devtree(void *fdt)
21{
22 const char model[] = "MPC8544DS";
23 const char compatible[] = "MPC8544DS\0MPC85xxDS";
24
25 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
26 qemu_fdt_setprop(fdt, "/", "compatible", compatible,
27 sizeof(compatible));
28}
29
30static void mpc8544ds_init(MachineState *machine)
31{
32 if (machine->ram_size > 0xc0000000) {
33 error_report("The MPC8544DS board only supports up to 3GB of RAM");
34 exit(1);
35 }
36
37 ppce500_init(machine);
38}
39
40static void mpc8544ds_machine_class_init(ObjectClass *oc, void *data)
41{
42 MachineClass *mc = MACHINE_CLASS(oc);
43 PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
44
45 pmc->pci_first_slot = 0x11;
46 pmc->pci_nr_slots = 2;
47 pmc->fixup_devtree = mpc8544ds_fixup_devtree;
48 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
49 pmc->platform_bus_base = 0xFF800000ULL;
50 pmc->platform_bus_size = 8 * MiB;
51 pmc->platform_bus_first_irq = 5;
52 pmc->platform_bus_num_irqs = 10;
53 pmc->ccsrbar_base = 0xE0000000ULL;
54 pmc->pci_mmio_base = 0xC0000000ULL;
55 pmc->pci_mmio_bus_base = 0xC0000000ULL;
56 pmc->pci_pio_base = 0xE1000000ULL;
57 pmc->spin_base = 0xEF000000ULL;
58
59 mc->desc = "mpc8544ds";
60 mc->init = mpc8544ds_init;
61 mc->max_cpus = 15;
62 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
63 mc->default_ram_id = "mpc8544ds.ram";
64}
65
66#define TYPE_MPC8544DS_MACHINE MACHINE_TYPE_NAME("mpc8544ds")
67
68static const TypeInfo mpc8544ds_info = {
69 .name = TYPE_MPC8544DS_MACHINE,
70 .parent = TYPE_PPCE500_MACHINE,
71 .class_init = mpc8544ds_machine_class_init,
72};
73
74static void mpc8544ds_register_types(void)
75{
76 type_register_static(&mpc8544ds_info);
77}
78
79type_init(mpc8544ds_register_types)
80