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25#ifndef HW_VGA_INT_H
26#define HW_VGA_INT_H
27
28#include "exec/ioport.h"
29#include "exec/memory.h"
30
31#include "hw/display/bochs-vbe.h"
32#include "hw/acpi/acpi_aml_interface.h"
33
34#define ST01_V_RETRACE 0x08
35#define ST01_DISP_ENABLE 0x01
36
37#define CH_ATTR_SIZE (160 * 100)
38#define VGA_MAX_HEIGHT 2048
39
40struct vga_precise_retrace {
41 int64_t ticks_per_char;
42 int64_t total_chars;
43 int htotal;
44 int hstart;
45 int hend;
46 int vstart;
47 int vend;
48 int freq;
49};
50
51union vga_retrace {
52 struct vga_precise_retrace precise;
53};
54
55struct VGACommonState;
56typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
57typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
58
59typedef struct VGACommonState {
60 MemoryRegion *legacy_address_space;
61 uint8_t *vram_ptr;
62 MemoryRegion vram;
63 uint32_t vram_size;
64 uint32_t vram_size_mb;
65 uint32_t vbe_size;
66 uint32_t vbe_size_mask;
67 uint32_t latch;
68 bool has_chain4_alias;
69 MemoryRegion chain4_alias;
70 uint8_t sr_index;
71 uint8_t sr[256];
72 uint8_t sr_vbe[256];
73 uint8_t gr_index;
74 uint8_t gr[256];
75 uint8_t ar_index;
76 uint8_t ar[21];
77 int ar_flip_flop;
78 uint8_t cr_index;
79 uint8_t cr[256];
80 uint8_t msr;
81 uint8_t fcr;
82 uint8_t st00;
83 uint8_t st01;
84 uint8_t dac_state;
85 uint8_t dac_sub_index;
86 uint8_t dac_read_index;
87 uint8_t dac_write_index;
88 uint8_t dac_cache[3];
89 int dac_8bit;
90 uint8_t palette[768];
91 int32_t bank_offset;
92 int (*get_bpp)(struct VGACommonState *s);
93 void (*get_offsets)(struct VGACommonState *s,
94 uint32_t *pline_offset,
95 uint32_t *pstart_addr,
96 uint32_t *pline_compare);
97 void (*get_resolution)(struct VGACommonState *s,
98 int *pwidth,
99 int *pheight);
100 PortioList vga_port_list;
101 PortioList vbe_port_list;
102
103 uint16_t vbe_index;
104 uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
105 uint32_t vbe_start_addr;
106 uint32_t vbe_line_offset;
107 uint32_t vbe_bank_mask;
108
109 QemuConsole *con;
110 uint32_t font_offsets[2];
111 int graphic_mode;
112 uint8_t shift_control;
113 uint8_t double_scan;
114 uint32_t line_offset;
115 uint32_t line_compare;
116 uint32_t start_addr;
117 uint32_t plane_updated;
118 uint32_t last_line_offset;
119 uint8_t last_cw, last_ch;
120 uint32_t last_width, last_height;
121 uint32_t last_scr_width, last_scr_height;
122 uint32_t last_depth;
123 bool last_byteswap;
124 bool force_shadow;
125 uint8_t cursor_start, cursor_end;
126 bool cursor_visible_phase;
127 int64_t cursor_blink_time;
128 uint32_t cursor_offset;
129 const GraphicHwOps *hw_ops;
130 bool full_update_text;
131 bool full_update_gfx;
132 bool big_endian_fb;
133 bool default_endian_fb;
134 bool global_vmstate;
135
136 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
137 uint32_t hw_cursor_x;
138 uint32_t hw_cursor_y;
139 void (*cursor_invalidate)(struct VGACommonState *s);
140 void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
141
142 uint32_t last_palette[256];
143 uint32_t last_ch_attr[CH_ATTR_SIZE];
144
145 vga_retrace_fn retrace;
146 vga_update_retrace_info_fn update_retrace_info;
147 union vga_retrace retrace_info;
148 uint8_t is_vbe_vmstate;
149} VGACommonState;
150
151static inline int c6_to_8(int v)
152{
153 int b;
154 v &= 0x3f;
155 b = v & 1;
156 return (v << 2) | (b << 1) | b;
157}
158
159bool vga_common_init(VGACommonState *s, Object *obj, Error **errp);
160void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
161 MemoryRegion *address_space_io, bool init_vga_ports);
162MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
163 const MemoryRegionPortio **vga_ports,
164 const MemoryRegionPortio **vbe_ports);
165void vga_common_reset(VGACommonState *s);
166
167void vga_dirty_log_start(VGACommonState *s);
168void vga_dirty_log_stop(VGACommonState *s);
169
170extern const VMStateDescription vmstate_vga_common;
171uint32_t vga_ioport_read(void *opaque, uint32_t addr);
172void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
173uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr);
174void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val);
175void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
176
177int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
178
179uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
180void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
181void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
182
183extern const uint8_t sr_mask[8];
184extern const uint8_t gr_mask[16];
185
186#define VGABIOS_FILENAME "vgabios.bin"
187#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
188
189extern const MemoryRegionOps vga_mem_ops;
190
191
192void pci_std_vga_mmio_region_init(VGACommonState *s,
193 Object *owner,
194 MemoryRegion *parent,
195 MemoryRegion *subs,
196 bool qext, bool edid);
197
198void build_vga_aml(AcpiDevAmlIf *adev, Aml *scope);
199#endif
200