LXR qemu/include/hw/misc/tz-mpc.h

   1/*
   2 * ARM AHB5 TrustZone Memory Protection Controller emulation
   3 *
   4 * Copyright (c) 2018 Linaro Limited
   5 * Written by Peter Maydell
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 or
   9 * (at your option) any later version.
  10 */
  11
  12/* This is a model of the TrustZone memory protection controller (MPC).
  13 * It is documented in the ARM CoreLink SIE-200 System IP for Embedded TRM
  14 * (DDI 0571G):
  15 * https://developer.arm.com/products/architecture/m-profile/docs/ddi0571/g
  16 *
  17 * The MPC sits in front of memory and allows secure software to
  18 * configure it to either pass through or reject transactions.
  19 * Rejected transactions may be configured to either be aborted, or to
  20 * behave as RAZ/WI. An interrupt can be signalled for a rejected transaction.
  21 *
  22 * The MPC has a register interface which the guest uses to configure it.
  23 *
  24 * QEMU interface:
  25 * + sysbus MMIO region 0: MemoryRegion for the MPC's config registers
  26 * + sysbus MMIO region 1: MemoryRegion for the upstream end of the MPC
  27 * + Property "downstream": MemoryRegion defining the downstream memory
  28 * + Named GPIO output "irq": set for a transaction-failed interrupt
  29 */
  30
  31#ifndef TZ_MPC_H
  32#define TZ_MPC_H
  33
  34#include "hw/sysbus.h"
  35#include "qom/object.h"
  36
  37#define TYPE_TZ_MPC "tz-mpc"
  38OBJECT_DECLARE_SIMPLE_TYPE(TZMPC, TZ_MPC)
  39
  40#define TZ_NUM_PORTS 16
  41
  42#define TYPE_TZ_MPC_IOMMU_MEMORY_REGION "tz-mpc-iommu-memory-region"
  43
  44
  45struct TZMPC {
  46    /*< private >*/
  47    SysBusDevice parent_obj;
  48
  49    /*< public >*/
  50
  51    /* State */
  52    uint32_t ctrl;
  53    uint32_t blk_idx;
  54    uint32_t int_stat;
  55    uint32_t int_en;
  56    uint32_t int_info1;
  57    uint32_t int_info2;
  58
  59    uint32_t *blk_lut;
  60
  61    qemu_irq irq;
  62
  63    /* Properties */
  64    MemoryRegion *downstream;
  65
  66    hwaddr blocksize;
  67    uint32_t blk_max;
  68
  69    /* MemoryRegions exposed to user */
  70    MemoryRegion regmr;
  71    IOMMUMemoryRegion upstream;
  72
  73    /* MemoryRegion used internally */
  74    MemoryRegion blocked_io;
  75
  76    AddressSpace downstream_as;
  77    AddressSpace blocked_io_as;
  78};
  79
  80#endif
  81