LXR qemu/include/hw/pci/pcie

   1/*
   2 * pcie_port.h
   3 *
   4 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
   5 *                    VA Linux Systems Japan K.K.
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License along
  18 * with this program; if not, see <http://www.gnu.org/licenses/>.
  19 */
  20
  21#ifndef QEMU_PCIE_PORT_H
  22#define QEMU_PCIE_PORT_H
  23
  24#include "hw/pci/pci_bridge.h"
  25#include "hw/pci/pci_bus.h"
  26#include "qom/object.h"
  27
  28#define TYPE_PCIE_PORT "pcie-port"
  29OBJECT_DECLARE_SIMPLE_TYPE(PCIEPort, PCIE_PORT)
  30
  31struct PCIEPort {
  32    /*< private >*/
  33    PCIBridge   parent_obj;
  34    /*< public >*/
  35
  36    /* pci express switch port */
  37    uint8_t     port;
  38};
  39
  40void pcie_port_init_reg(PCIDevice *d);
  41
  42PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn);
  43
  44#define TYPE_PCIE_SLOT "pcie-slot"
  45OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT)
  46
  47struct PCIESlot {
  48    /*< private >*/
  49    PCIEPort    parent_obj;
  50    /*< public >*/
  51
  52    /* pci express switch port with slot */
  53    uint8_t     chassis;
  54    uint16_t    slot;
  55
  56    PCIExpLinkSpeed speed;
  57    PCIExpLinkWidth width;
  58
  59    /* Disable ACS (really for a pcie_root_port) */
  60    bool        disable_acs;
  61
  62    /* Indicates whether any type of hot-plug is allowed on the slot */
  63    bool        hotplug;
  64
  65    bool        native_hotplug;
  66
  67    QLIST_ENTRY(PCIESlot) next;
  68};
  69
  70void pcie_chassis_create(uint8_t chassis_number);
  71PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot);
  72int pcie_chassis_add_slot(struct PCIESlot *slot);
  73void pcie_chassis_del_slot(PCIESlot *s);
  74
  75#define TYPE_PCIE_ROOT_PORT         "pcie-root-port-base"
  76typedef struct PCIERootPortClass PCIERootPortClass;
  77DECLARE_CLASS_CHECKERS(PCIERootPortClass, PCIE_ROOT_PORT,
  78                       TYPE_PCIE_ROOT_PORT)
  79
  80struct PCIERootPortClass {
  81    PCIDeviceClass parent_class;
  82    DeviceRealize parent_realize;
  83    DeviceReset parent_reset;
  84
  85    uint8_t (*aer_vector)(const PCIDevice *dev);
  86    int (*interrupts_init)(PCIDevice *dev, Error **errp);
  87    void (*interrupts_uninit)(PCIDevice *dev);
  88
  89    int exp_offset;
  90    int aer_offset;
  91    int ssvid_offset;
  92    int acs_offset;    /* If nonzero, optional ACS capability offset */
  93    int ssid;
  94};
  95
  96#endif /* QEMU_PCIE_PORT_H */
  97