LXR qemu/include/hw/ppc/spapr

   1/*
   2 * QEMU PowerPC sPAPR IRQ backend definitions
   3 *
   4 * Copyright (c) 2018, IBM Corporation.
   5 *
   6 * This code is licensed under the GPL version 2 or later. See the
   7 * COPYING file in the top-level directory.
   8 */
   9
  10#ifndef HW_SPAPR_IRQ_H
  11#define HW_SPAPR_IRQ_H
  12
  13#include "target/ppc/cpu-qom.h"
  14#include "qom/object.h"
  15
  16/*
  17 * IRQ range offsets per device type
  18 */
  19#define SPAPR_IRQ_IPI        0x0
  20
  21#define SPAPR_XIRQ_BASE      XICS_IRQ_BASE /* 0x1000 */
  22#define SPAPR_IRQ_EPOW       (SPAPR_XIRQ_BASE + 0x0000)
  23#define SPAPR_IRQ_HOTPLUG    (SPAPR_XIRQ_BASE + 0x0001)
  24#define SPAPR_IRQ_VIO        (SPAPR_XIRQ_BASE + 0x0100)  /* 256 VIO devices */
  25#define SPAPR_IRQ_PCI_LSI    (SPAPR_XIRQ_BASE + 0x0200)  /* 32+ PHBs devices */
  26
  27/* Offset of the dynamic range covered by the bitmap allocator */
  28#define SPAPR_IRQ_MSI        (SPAPR_XIRQ_BASE + 0x0300)
  29
  30#define SPAPR_NR_XIRQS       0x1000
  31
  32struct SpaprMachineState;
  33
  34typedef struct SpaprInterruptController SpaprInterruptController;
  35
  36#define TYPE_SPAPR_INTC "spapr-interrupt-controller"
  37#define SPAPR_INTC(obj)                                     \
  38    INTERFACE_CHECK(SpaprInterruptController, (obj), TYPE_SPAPR_INTC)
  39typedef struct SpaprInterruptControllerClass SpaprInterruptControllerClass;
  40DECLARE_CLASS_CHECKERS(SpaprInterruptControllerClass, SPAPR_INTC,
  41                       TYPE_SPAPR_INTC)
  42
  43struct SpaprInterruptControllerClass {
  44    InterfaceClass parent;
  45
  46    int (*activate)(SpaprInterruptController *intc, uint32_t nr_servers,
  47                    Error **errp);
  48    void (*deactivate)(SpaprInterruptController *intc);
  49
  50    /*
  51     * These methods will typically be called on all intcs, active and
  52     * inactive
  53     */
  54    int (*cpu_intc_create)(SpaprInterruptController *intc,
  55                            PowerPCCPU *cpu, Error **errp);
  56    void (*cpu_intc_reset)(SpaprInterruptController *intc, PowerPCCPU *cpu);
  57    void (*cpu_intc_destroy)(SpaprInterruptController *intc, PowerPCCPU *cpu);
  58    int (*claim_irq)(SpaprInterruptController *intc, int irq, bool lsi,
  59                     Error **errp);
  60    void (*free_irq)(SpaprInterruptController *intc, int irq);
  61
  62    /* These methods should only be called on the active intc */
  63    void (*set_irq)(SpaprInterruptController *intc, int irq, int val);
  64    void (*print_info)(SpaprInterruptController *intc, Monitor *mon);
  65    void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers,
  66               void *fdt, uint32_t phandle);
  67    int (*post_load)(SpaprInterruptController *intc, int version_id);
  68};
  69
  70void spapr_irq_update_active_intc(struct SpaprMachineState *spapr);
  71
  72int spapr_irq_cpu_intc_create(struct SpaprMachineState *spapr,
  73                              PowerPCCPU *cpu, Error **errp);
  74void spapr_irq_cpu_intc_reset(struct SpaprMachineState *spapr, PowerPCCPU *cpu);
  75void spapr_irq_cpu_intc_destroy(struct SpaprMachineState *spapr, PowerPCCPU *cpu);
  76void spapr_irq_print_info(struct SpaprMachineState *spapr, Monitor *mon);
  77void spapr_irq_dt(struct SpaprMachineState *spapr, uint32_t nr_servers,
  78                  void *fdt, uint32_t phandle);
  79
  80uint32_t spapr_irq_nr_msis(struct SpaprMachineState *spapr);
  81int spapr_irq_msi_alloc(struct SpaprMachineState *spapr, uint32_t num, bool align,
  82                        Error **errp);
  83void spapr_irq_msi_free(struct SpaprMachineState *spapr, int irq, uint32_t num);
  84
  85typedef struct SpaprIrq {
  86    bool        xics;
  87    bool        xive;
  88} SpaprIrq;
  89
  90extern SpaprIrq spapr_irq_xics;
  91extern SpaprIrq spapr_irq_xics_legacy;
  92extern SpaprIrq spapr_irq_xive;
  93extern SpaprIrq spapr_irq_dual;
  94
  95void spapr_irq_init(struct SpaprMachineState *spapr, Error **errp);
  96int spapr_irq_claim(struct SpaprMachineState *spapr, int irq, bool lsi, Error **errp);
  97void spapr_irq_free(struct SpaprMachineState *spapr, int irq, int num);
  98qemu_irq spapr_qirq(struct SpaprMachineState *spapr, int irq);
  99int spapr_irq_post_load(struct SpaprMachineState *spapr, int version_id);
 100void spapr_irq_reset(struct SpaprMachineState *spapr, Error **errp);
 101int spapr_irq_get_phandle(struct SpaprMachineState *spapr, void *fdt, Error **errp);
 102
 103typedef int (*SpaprInterruptControllerInitKvm)(SpaprInterruptController *,
 104                                               uint32_t, Error **);
 105
 106int spapr_irq_init_kvm(SpaprInterruptControllerInitKvm fn,
 107                       SpaprInterruptController *intc,
 108                       uint32_t nr_servers,
 109                       Error **errp);
 110
 111/*
 112 * XICS legacy routines
 113 */
 114int spapr_irq_find(struct SpaprMachineState *spapr, int num, bool align, Error **errp);
 115#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)
 116
 117#endif
 118