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12#include "qemu/osdep.h"
13#include "qapi/error.h"
14#include "hw/arm/boot.h"
15#include "hw/arm/aspeed.h"
16#include "hw/arm/aspeed_soc.h"
17#include "hw/i2c/i2c_mux_pca954x.h"
18#include "hw/i2c/smbus_eeprom.h"
19#include "hw/misc/pca9552.h"
20#include "hw/sensor/tmp105.h"
21#include "hw/misc/led.h"
22#include "hw/qdev-properties.h"
23#include "sysemu/block-backend.h"
24#include "sysemu/reset.h"
25#include "hw/loader.h"
26#include "qemu/error-report.h"
27#include "qemu/units.h"
28#include "hw/qdev-clock.h"
29#include "sysemu/sysemu.h"
30
31static struct arm_boot_info aspeed_board_binfo = {
32 .board_id = -1,
33};
34
35struct AspeedMachineState {
36
37 MachineState parent_obj;
38
39
40 AspeedSoCState soc;
41 bool mmio_exec;
42 char *fmc_model;
43 char *spi_model;
44};
45
46
47#define PALMETTO_BMC_HW_STRAP1 ( \
48 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
49 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 ) | \
50 SCU_AST2400_HW_STRAP_ACPI_DIS | \
51 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
52 SCU_HW_STRAP_VGA_CLASS_CODE | \
53 SCU_HW_STRAP_LPC_RESET_PIN | \
54 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
55 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
56 SCU_HW_STRAP_SPI_WIDTH | \
57 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
58 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
59
60
61#define SUPERMICROX11_BMC_HW_STRAP1 ( \
62 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
63 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \
64 SCU_AST2400_HW_STRAP_ACPI_DIS | \
65 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
66 SCU_HW_STRAP_VGA_CLASS_CODE | \
67 SCU_HW_STRAP_LPC_RESET_PIN | \
68 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
69 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
70 SCU_HW_STRAP_SPI_WIDTH | \
71 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
72 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
73
74
75#define AST2500_EVB_HW_STRAP1 (( \
76 AST2500_HW_STRAP1_DEFAULTS | \
77 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
78 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
79 SCU_AST2500_HW_STRAP_UART_DEBUG | \
80 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
81 SCU_HW_STRAP_MAC1_RGMII | \
82 SCU_HW_STRAP_MAC0_RGMII) & \
83 ~SCU_HW_STRAP_2ND_BOOT_WDT)
84
85
86#define ROMULUS_BMC_HW_STRAP1 ( \
87 AST2500_HW_STRAP1_DEFAULTS | \
88 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
89 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
90 SCU_AST2500_HW_STRAP_UART_DEBUG | \
91 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
92 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
93 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
94
95
96#define SONORAPASS_BMC_HW_STRAP1 ( \
97 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
98 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
99 SCU_AST2500_HW_STRAP_UART_DEBUG | \
100 SCU_AST2500_HW_STRAP_RESERVED28 | \
101 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
102 SCU_HW_STRAP_VGA_CLASS_CODE | \
103 SCU_HW_STRAP_LPC_RESET_PIN | \
104 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
105 SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
106 SCU_HW_STRAP_VGA_BIOS_ROM | \
107 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
108 SCU_AST2500_HW_STRAP_RESERVED1)
109
110#define G220A_BMC_HW_STRAP1 ( \
111 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
112 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
113 SCU_AST2500_HW_STRAP_UART_DEBUG | \
114 SCU_AST2500_HW_STRAP_RESERVED28 | \
115 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
116 SCU_HW_STRAP_2ND_BOOT_WDT | \
117 SCU_HW_STRAP_VGA_CLASS_CODE | \
118 SCU_HW_STRAP_LPC_RESET_PIN | \
119 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
120 SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
121 SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \
122 SCU_AST2500_HW_STRAP_RESERVED1)
123
124
125#define FP5280G2_BMC_HW_STRAP1 ( \
126 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
127 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
128 SCU_AST2500_HW_STRAP_UART_DEBUG | \
129 SCU_AST2500_HW_STRAP_RESERVED28 | \
130 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
131 SCU_HW_STRAP_VGA_CLASS_CODE | \
132 SCU_HW_STRAP_LPC_RESET_PIN | \
133 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
134 SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
135 SCU_HW_STRAP_MAC1_RGMII | \
136 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
137 SCU_AST2500_HW_STRAP_RESERVED1)
138
139
140#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
141
142
143#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
144 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
145 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \
146 SCU_AST2400_HW_STRAP_ACPI_DIS | \
147 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \
148 SCU_HW_STRAP_VGA_CLASS_CODE | \
149 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \
150 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
151 SCU_HW_STRAP_SPI_WIDTH | \
152 SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \
153 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
154
155
156#define AST2600_EVB_HW_STRAP1 0x000000C0
157#define AST2600_EVB_HW_STRAP2 0x00000003
158
159
160#define TACOMA_BMC_HW_STRAP1 0x00000000
161#define TACOMA_BMC_HW_STRAP2 0x00000040
162
163
164#define RAINIER_BMC_HW_STRAP1 0x00422016
165#define RAINIER_BMC_HW_STRAP2 0x80000848
166
167
168#define FUJI_BMC_HW_STRAP1 0x00000000
169#define FUJI_BMC_HW_STRAP2 0x00000000
170
171
172
173#define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
174#define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
175
176
177#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000
178#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041
179
180#define AST_SMP_MAILBOX_BASE 0x1e6e2180
181#define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0)
182#define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4)
183#define AST_SMP_MBOX_FIELD_READY (AST_SMP_MAILBOX_BASE + 0x8)
184#define AST_SMP_MBOX_FIELD_POLLINSN (AST_SMP_MAILBOX_BASE + 0xc)
185#define AST_SMP_MBOX_CODE (AST_SMP_MAILBOX_BASE + 0x10)
186#define AST_SMP_MBOX_GOSIGN 0xabbaab00
187
188static void aspeed_write_smpboot(ARMCPU *cpu,
189 const struct arm_boot_info *info)
190{
191 AddressSpace *as = arm_boot_address_space(cpu, info);
192 static const ARMInsnFixup poll_mailbox_ready[] = {
193
194
195
196
197
198 { 0xee100fb0 },
199 { 0xe21000ff },
200 { 0xe59f201c },
201 { 0xe1822000 },
202
203 { 0xe59f1018 },
204 { 0xe59f0018 },
205
206 { 0xe320f002 },
207 { 0xe5904000 },
208 { 0xe1520004 },
209 { 0x1afffffb },
210 { 0xe591f000 },
211 { AST_SMP_MBOX_GOSIGN },
212 { AST_SMP_MBOX_FIELD_ENTRY },
213 { AST_SMP_MBOX_FIELD_GOSIGN },
214 { 0, FIXUP_TERMINATOR }
215 };
216 static const uint32_t fixupcontext[FIXUP_MAX] = { 0 };
217
218 arm_write_bootloader("aspeed.smpboot", as, info->smp_loader_start,
219 poll_mailbox_ready, fixupcontext);
220}
221
222static void aspeed_reset_secondary(ARMCPU *cpu,
223 const struct arm_boot_info *info)
224{
225 AddressSpace *as = arm_boot_address_space(cpu, info);
226 CPUState *cs = CPU(cpu);
227
228
229 address_space_stl_notdirty(as, AST_SMP_MBOX_FIELD_GOSIGN, 0,
230 MEMTXATTRS_UNSPECIFIED, NULL);
231 cpu_set_pc(cs, info->smp_loader_start);
232}
233
234#define FIRMWARE_ADDR 0x0
235
236static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
237 Error **errp)
238{
239 BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
240 g_autofree void *storage = NULL;
241 int64_t size;
242
243
244
245
246 size = blk_getlength(blk);
247 if (size <= 0) {
248 error_setg(errp, "failed to get flash size");
249 return;
250 }
251
252 if (rom_size > size) {
253 rom_size = size;
254 }
255
256 storage = g_malloc0(rom_size);
257 if (blk_pread(blk, 0, rom_size, storage, 0) < 0) {
258 error_setg(errp, "failed to read the initial flash content");
259 return;
260 }
261
262 rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
263}
264
265void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
266 unsigned int count, int unit0)
267{
268 int i;
269
270 if (!flashtype) {
271 return;
272 }
273
274 for (i = 0; i < count; ++i) {
275 DriveInfo *dinfo = drive_get(IF_MTD, 0, unit0 + i);
276 qemu_irq cs_line;
277 DeviceState *dev;
278
279 dev = qdev_new(flashtype);
280 if (dinfo) {
281 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo));
282 }
283 qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal);
284
285 cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0);
286 sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
287 }
288}
289
290static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
291{
292 DeviceState *card;
293
294 if (!dinfo) {
295 return;
296 }
297 card = qdev_new(TYPE_SD_CARD);
298 qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
299 &error_fatal);
300 qdev_realize_and_unref(card,
301 qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
302 &error_fatal);
303}
304
305static void connect_serial_hds_to_uarts(AspeedMachineState *bmc)
306{
307 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc);
308 AspeedSoCState *s = &bmc->soc;
309 AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
310
311 aspeed_soc_uart_set_chr(s, amc->uart_default, serial_hd(0));
312 for (int i = 1, uart = ASPEED_DEV_UART1; i < sc->uarts_num; i++, uart++) {
313 if (uart == amc->uart_default) {
314 continue;
315 }
316 aspeed_soc_uart_set_chr(s, uart, serial_hd(i));
317 }
318}
319
320static void aspeed_machine_init(MachineState *machine)
321{
322 AspeedMachineState *bmc = ASPEED_MACHINE(machine);
323 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
324 AspeedSoCClass *sc;
325 DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
326 int i;
327 NICInfo *nd = &nd_table[0];
328
329 object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
330
331 sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
332
333
334
335
336
337 object_property_set_uint(OBJECT(&bmc->soc), "ram-size", machine->ram_size,
338 &error_fatal);
339
340 for (i = 0; i < sc->macs_num; i++) {
341 if ((amc->macs_mask & (1 << i)) && nd->used) {
342 qemu_check_nic_model(nd, TYPE_FTGMAC100);
343 qdev_set_nic_properties(DEVICE(&bmc->soc.ftgmac100[i]), nd);
344 nd++;
345 }
346 }
347
348 object_property_set_int(OBJECT(&bmc->soc), "hw-strap1", amc->hw_strap1,
349 &error_abort);
350 object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2,
351 &error_abort);
352 object_property_set_link(OBJECT(&bmc->soc), "memory",
353 OBJECT(get_system_memory()), &error_abort);
354 object_property_set_link(OBJECT(&bmc->soc), "dram",
355 OBJECT(machine->ram), &error_abort);
356 if (machine->kernel_filename) {
357
358
359
360
361
362 object_property_set_int(OBJECT(&bmc->soc), "hw-prot-key",
363 ASPEED_SCU_PROT_KEY, &error_abort);
364 }
365 connect_serial_hds_to_uarts(bmc);
366 qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
367
368 aspeed_board_init_flashes(&bmc->soc.fmc,
369 bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
370 amc->num_cs, 0);
371 aspeed_board_init_flashes(&bmc->soc.spi[0],
372 bmc->spi_model ? bmc->spi_model : amc->spi_model,
373 1, amc->num_cs);
374
375
376 if (drive0) {
377 AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
378 MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
379 uint64_t size = memory_region_size(&fl->mmio);
380
381
382
383
384
385
386
387 if (ASPEED_MACHINE(machine)->mmio_exec) {
388 memory_region_init_alias(boot_rom, NULL, "aspeed.boot_rom",
389 &fl->mmio, 0, size);
390 memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
391 boot_rom);
392 } else {
393 memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom",
394 size, &error_abort);
395 memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
396 boot_rom);
397 write_boot_rom(drive0, FIRMWARE_ADDR, size, &error_abort);
398 }
399 }
400
401 if (machine->kernel_filename && sc->num_cpus > 1) {
402
403 MemoryRegion *smpboot = g_new(MemoryRegion, 1);
404 memory_region_init_ram(smpboot, NULL, "aspeed.smpboot",
405 0x80, &error_abort);
406 memory_region_add_subregion(get_system_memory(),
407 AST_SMP_MAILBOX_BASE, smpboot);
408
409 aspeed_board_binfo.write_secondary_boot = aspeed_write_smpboot;
410 aspeed_board_binfo.secondary_cpu_reset_hook = aspeed_reset_secondary;
411 aspeed_board_binfo.smp_loader_start = AST_SMP_MBOX_CODE;
412 }
413
414 aspeed_board_binfo.ram_size = machine->ram_size;
415 aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM];
416
417 if (amc->i2c_init) {
418 amc->i2c_init(bmc);
419 }
420
421 for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {
422 sdhci_attach_drive(&bmc->soc.sdhci.slots[i],
423 drive_get(IF_SD, 0, i));
424 }
425
426 if (bmc->soc.emmc.num_slots) {
427 sdhci_attach_drive(&bmc->soc.emmc.slots[0],
428 drive_get(IF_SD, 0, bmc->soc.sdhci.num_slots));
429 }
430
431 arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
432}
433
434static void at24c_eeprom_init(I2CBus *bus, uint8_t addr, uint32_t rsize)
435{
436 I2CSlave *i2c_dev = i2c_slave_new("at24c-eeprom", addr);
437 DeviceState *dev = DEVICE(i2c_dev);
438
439 qdev_prop_set_uint32(dev, "rom-size", rsize);
440 i2c_slave_realize_and_unref(i2c_dev, bus, &error_abort);
441}
442
443static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)
444{
445 AspeedSoCState *soc = &bmc->soc;
446 DeviceState *dev;
447 uint8_t *eeprom_buf = g_malloc0(32 * 1024);
448
449
450
451 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
452
453 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
454 eeprom_buf);
455
456
457 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
458 "tmp423", 0x4c));
459 object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
460 object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
461 object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
462 object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
463}
464
465static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
466{
467 AspeedSoCState *soc = &bmc->soc;
468
469
470
471
472
473 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c);
474 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e);
475 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f);
476
477
478
479
480
481 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74);
482 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77);
483
484
485
486
487 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70);
488
489
490
491
492
493
494
495}
496
497static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
498{
499 AspeedSoCState *soc = &bmc->soc;
500 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
501
502 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50,
503 eeprom_buf);
504
505
506 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
507 TYPE_TMP105, 0x4d);
508}
509
510static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
511{
512 AspeedSoCState *soc = &bmc->soc;
513 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
514
515 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50,
516 eeprom_buf);
517
518
519 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
520 TYPE_TMP105, 0x4d);
521}
522
523static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
524{
525 AspeedSoCState *soc = &bmc->soc;
526
527
528
529 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
530}
531
532static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
533{
534 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
535 TYPE_PCA9552, addr);
536}
537
538static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
539{
540 AspeedSoCState *soc = &bmc->soc;
541
542
543 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48);
544 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49);
545
546
547
548
549
550 uint8_t *eeprom4_54 = g_malloc0(8 * 1024);
551 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54,
552 eeprom4_54);
553
554 create_pca9552(soc, 4, 0x76);
555
556 create_pca9552(soc, 4, 0x77);
557
558
559 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48);
560 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49);
561
562
563
564 uint8_t *eeprom8_56 = g_malloc0(8 * 1024);
565 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56,
566 eeprom8_56);
567 create_pca9552(soc, 8, 0x60);
568 create_pca9552(soc, 8, 0x61);
569
570
571
572
573
574
575
576
577
578
579
580}
581
582static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)
583{
584 static const struct {
585 unsigned gpio_id;
586 LEDColor color;
587 const char *description;
588 bool gpio_polarity;
589 } pca1_leds[] = {
590 {13, LED_COLOR_GREEN, "front-fault-4", GPIO_POLARITY_ACTIVE_LOW},
591 {14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW},
592 {15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW},
593 };
594 AspeedSoCState *soc = &bmc->soc;
595 uint8_t *eeprom_buf = g_malloc0(8 * 1024);
596 DeviceState *dev;
597 LEDState *led;
598
599
600 dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
601 qdev_prop_set_string(dev, "description", "pca1");
602 i2c_slave_realize_and_unref(I2C_SLAVE(dev),
603 aspeed_i2c_get_bus(&soc->i2c, 3),
604 &error_fatal);
605
606 for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) {
607 led = led_create_simple(OBJECT(bmc),
608 pca1_leds[i].gpio_polarity,
609 pca1_leds[i].color,
610 pca1_leds[i].description);
611 qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id,
612 qdev_get_gpio_in(DEVICE(led), 0));
613 }
614 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76);
615 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "max31785", 0x52);
616 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c);
617 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c);
618
619
620 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105,
621 0x4a);
622
623
624
625 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
626
627 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51,
628 eeprom_buf);
629 dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
630 qdev_prop_set_string(dev, "description", "pca0");
631 i2c_slave_realize_and_unref(I2C_SLAVE(dev),
632 aspeed_i2c_get_bus(&soc->i2c, 11),
633 &error_fatal);
634
635}
636
637static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
638{
639 AspeedSoCState *soc = &bmc->soc;
640 DeviceState *dev;
641
642 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3),
643 "emc1413", 0x4c));
644 object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
645 object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
646 object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
647
648 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12),
649 "emc1413", 0x4c));
650 object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
651 object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
652 object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
653
654 dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13),
655 "emc1413", 0x4c));
656 object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
657 object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
658 object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
659
660 static uint8_t eeprom_buf[2 * 1024] = {
661 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe,
662 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65,
663 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32,
664 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42,
665 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45,
666 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1,
667 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7,
668 };
669 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57,
670 eeprom_buf);
671}
672
673static void aspeed_eeprom_init(I2CBus *bus, uint8_t addr, uint32_t rsize)
674{
675 I2CSlave *i2c_dev = i2c_slave_new("at24c-eeprom", addr);
676 DeviceState *dev = DEVICE(i2c_dev);
677
678 qdev_prop_set_uint32(dev, "rom-size", rsize);
679 i2c_slave_realize_and_unref(i2c_dev, bus, &error_abort);
680}
681
682static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)
683{
684 AspeedSoCState *soc = &bmc->soc;
685 I2CSlave *i2c_mux;
686
687
688 at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768);
689
690
691 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
692 0x48);
693 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
694 0x49);
695
696 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
697 "pca9546", 0x70);
698
699 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105,
700 0x4a);
701
702
703 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68);
704
705
706 create_pca9552(soc, 8, 0x30);
707}
708
709static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
710{
711 AspeedSoCState *soc = &bmc->soc;
712 I2CSlave *i2c_mux;
713
714 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB);
715
716 create_pca9552(soc, 3, 0x61);
717
718
719 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
720 0x48);
721 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
722 0x49);
723 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
724 0x4a);
725 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4),
726 "pca9546", 0x70);
727 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
728 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
729 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB);
730 create_pca9552(soc, 4, 0x60);
731
732 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
733 0x48);
734 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
735 0x49);
736 create_pca9552(soc, 5, 0x60);
737 create_pca9552(soc, 5, 0x61);
738 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5),
739 "pca9546", 0x70);
740 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
741 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
742
743 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
744 0x48);
745 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
746 0x4a);
747 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
748 0x4b);
749 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6),
750 "pca9546", 0x70);
751 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
752 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
753 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB);
754 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB);
755
756 create_pca9552(soc, 7, 0x30);
757 create_pca9552(soc, 7, 0x31);
758 create_pca9552(soc, 7, 0x32);
759 create_pca9552(soc, 7, 0x33);
760 create_pca9552(soc, 7, 0x60);
761 create_pca9552(soc, 7, 0x61);
762 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76);
763
764 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105,
765 0x48);
766 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "max31785", 0x52);
767 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB);
768 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB);
769
770 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
771 0x48);
772 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
773 0x4a);
774 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50, 64 * KiB);
775 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 64 * KiB);
776 create_pca9552(soc, 8, 0x60);
777 create_pca9552(soc, 8, 0x61);
778
779
780
781
782 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c);
783 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d);
784 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB);
785
786 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c);
787 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d);
788 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB);
789
790 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
791 0x48);
792 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
793 0x49);
794 i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11),
795 "pca9546", 0x70);
796 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
797 aspeed_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
798 create_pca9552(soc, 11, 0x60);
799
800
801 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB);
802 create_pca9552(soc, 13, 0x60);
803
804 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB);
805 create_pca9552(soc, 14, 0x60);
806
807 aspeed_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB);
808 create_pca9552(soc, 15, 0x60);
809}
810
811static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr,
812 I2CBus **channels)
813{
814 I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr);
815 for (int i = 0; i < 8; i++) {
816 channels[i] = pca954x_i2c_get_bus(mux, i);
817 }
818}
819
820#define TYPE_LM75 TYPE_TMP105
821#define TYPE_TMP75 TYPE_TMP105
822#define TYPE_TMP422 "tmp422"
823
824static void fuji_bmc_i2c_init(AspeedMachineState *bmc)
825{
826 AspeedSoCState *soc = &bmc->soc;
827 I2CBus *i2c[144] = {};
828
829 for (int i = 0; i < 16; i++) {
830 i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
831 }
832 I2CBus *i2c180 = i2c[2];
833 I2CBus *i2c480 = i2c[8];
834 I2CBus *i2c600 = i2c[11];
835
836 get_pca9548_channels(i2c180, 0x70, &i2c[16]);
837 get_pca9548_channels(i2c480, 0x70, &i2c[24]);
838
839 get_pca9548_channels(i2c600, 0x77, &i2c[40]);
840 get_pca9548_channels(i2c[24], 0x71, &i2c[48]);
841 get_pca9548_channels(i2c[25], 0x72, &i2c[56]);
842 get_pca9548_channels(i2c[26], 0x76, &i2c[64]);
843 get_pca9548_channels(i2c[27], 0x76, &i2c[72]);
844 for (int i = 0; i < 8; i++) {
845 get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]);
846 }
847
848 i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c);
849 i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d);
850
851 aspeed_eeprom_init(i2c[19], 0x52, 64 * KiB);
852 aspeed_eeprom_init(i2c[20], 0x50, 2 * KiB);
853 aspeed_eeprom_init(i2c[22], 0x52, 2 * KiB);
854
855 i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48);
856 i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49);
857 i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a);
858 i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c);
859
860 aspeed_eeprom_init(i2c[8], 0x51, 64 * KiB);
861 i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a);
862
863 i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c);
864 aspeed_eeprom_init(i2c[50], 0x52, 64 * KiB);
865 i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48);
866 i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49);
867
868 i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48);
869 i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49);
870
871 aspeed_eeprom_init(i2c[65], 0x53, 64 * KiB);
872 i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49);
873 i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48);
874 aspeed_eeprom_init(i2c[68], 0x52, 64 * KiB);
875 aspeed_eeprom_init(i2c[69], 0x52, 64 * KiB);
876 aspeed_eeprom_init(i2c[70], 0x52, 64 * KiB);
877 aspeed_eeprom_init(i2c[71], 0x52, 64 * KiB);
878
879 aspeed_eeprom_init(i2c[73], 0x53, 64 * KiB);
880 i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49);
881 i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48);
882 aspeed_eeprom_init(i2c[76], 0x52, 64 * KiB);
883 aspeed_eeprom_init(i2c[77], 0x52, 64 * KiB);
884 aspeed_eeprom_init(i2c[78], 0x52, 64 * KiB);
885 aspeed_eeprom_init(i2c[79], 0x52, 64 * KiB);
886 aspeed_eeprom_init(i2c[28], 0x50, 2 * KiB);
887
888 for (int i = 0; i < 8; i++) {
889 aspeed_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB);
890 i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48);
891 i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b);
892 i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a);
893 }
894}
895
896#define TYPE_TMP421 "tmp421"
897
898static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
899{
900 AspeedSoCState *soc = &bmc->soc;
901 I2CBus *i2c[13] = {};
902 for (int i = 0; i < 13; i++) {
903 if ((i == 8) || (i == 11)) {
904 continue;
905 }
906 i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
907 }
908
909
910 for (int i = 0; i < 6; i++) {
911
912
913 i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f);
914
915 i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76);
916 i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67);
917
918 }
919
920
921 at24c_eeprom_init(i2c[6], 0x56, 65536);
922
923 i2c_slave_create_simple(i2c[6], "ds1338", 0x51);
924
925
926
927 at24c_eeprom_init(i2c[7], 0x54, 65536);
928
929
930 i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f);
931
932
933 i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f);
934
935 i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67);
936
937
938
939 i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c);
940 i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d);
941 i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67);
942}
943
944static void fby35_i2c_init(AspeedMachineState *bmc)
945{
946 AspeedSoCState *soc = &bmc->soc;
947 I2CBus *i2c[16];
948
949 for (int i = 0; i < 16; i++) {
950 i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
951 }
952
953 i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f);
954 i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f);
955
956 i2c_slave_create_simple(i2c[11], "adm1272", 0x44);
957 i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e);
958 i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f);
959
960 aspeed_eeprom_init(i2c[4], 0x51, 128 * KiB);
961 aspeed_eeprom_init(i2c[6], 0x51, 128 * KiB);
962 aspeed_eeprom_init(i2c[8], 0x50, 32 * KiB);
963 aspeed_eeprom_init(i2c[11], 0x51, 128 * KiB);
964 aspeed_eeprom_init(i2c[11], 0x54, 128 * KiB);
965
966
967
968
969
970
971}
972
973static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
974{
975 AspeedSoCState *soc = &bmc->soc;
976
977 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
978}
979
980static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
981{
982 AspeedSoCState *soc = &bmc->soc;
983 I2CSlave *therm_mux, *cpuvr_mux;
984
985
986 qcom_dc_scm_bmc_i2c_init(bmc);
987
988
989
990
991 cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
992 "pca9546", 0x70);
993 i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72);
994 i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72);
995 i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72);
996 i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72);
997
998
999 therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
1000 "pca9548", 0x70);
1001 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C);
1002 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C);
1003 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48);
1004 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48);
1005 i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48);
1006
1007
1008 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52);
1009 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54);
1010}
1011
1012static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
1013{
1014 return ASPEED_MACHINE(obj)->mmio_exec;
1015}
1016
1017static void aspeed_set_mmio_exec(Object *obj, bool value, Error **errp)
1018{
1019 ASPEED_MACHINE(obj)->mmio_exec = value;
1020}
1021
1022static void aspeed_machine_instance_init(Object *obj)
1023{
1024 ASPEED_MACHINE(obj)->mmio_exec = false;
1025}
1026
1027static char *aspeed_get_fmc_model(Object *obj, Error **errp)
1028{
1029 AspeedMachineState *bmc = ASPEED_MACHINE(obj);
1030 return g_strdup(bmc->fmc_model);
1031}
1032
1033static void aspeed_set_fmc_model(Object *obj, const char *value, Error **errp)
1034{
1035 AspeedMachineState *bmc = ASPEED_MACHINE(obj);
1036
1037 g_free(bmc->fmc_model);
1038 bmc->fmc_model = g_strdup(value);
1039}
1040
1041static char *aspeed_get_spi_model(Object *obj, Error **errp)
1042{
1043 AspeedMachineState *bmc = ASPEED_MACHINE(obj);
1044 return g_strdup(bmc->spi_model);
1045}
1046
1047static void aspeed_set_spi_model(Object *obj, const char *value, Error **errp)
1048{
1049 AspeedMachineState *bmc = ASPEED_MACHINE(obj);
1050
1051 g_free(bmc->spi_model);
1052 bmc->spi_model = g_strdup(value);
1053}
1054
1055static void aspeed_machine_class_props_init(ObjectClass *oc)
1056{
1057 object_class_property_add_bool(oc, "execute-in-place",
1058 aspeed_get_mmio_exec,
1059 aspeed_set_mmio_exec);
1060 object_class_property_set_description(oc, "execute-in-place",
1061 "boot directly from CE0 flash device");
1062
1063 object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model,
1064 aspeed_set_fmc_model);
1065 object_class_property_set_description(oc, "fmc-model",
1066 "Change the FMC Flash model");
1067 object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model,
1068 aspeed_set_spi_model);
1069 object_class_property_set_description(oc, "spi-model",
1070 "Change the SPI Flash model");
1071}
1072
1073static int aspeed_soc_num_cpus(const char *soc_name)
1074{
1075 AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(soc_name));
1076 return sc->num_cpus;
1077}
1078
1079static void aspeed_machine_class_init(ObjectClass *oc, void *data)
1080{
1081 MachineClass *mc = MACHINE_CLASS(oc);
1082 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1083
1084 mc->init = aspeed_machine_init;
1085 mc->no_floppy = 1;
1086 mc->no_cdrom = 1;
1087 mc->no_parallel = 1;
1088 mc->default_ram_id = "ram";
1089 amc->macs_mask = ASPEED_MAC0_ON;
1090 amc->uart_default = ASPEED_DEV_UART5;
1091
1092 aspeed_machine_class_props_init(oc);
1093}
1094
1095static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data)
1096{
1097 MachineClass *mc = MACHINE_CLASS(oc);
1098 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1099
1100 mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
1101 amc->soc_name = "ast2400-a1";
1102 amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
1103 amc->fmc_model = "n25q256a";
1104 amc->spi_model = "mx25l25635f";
1105 amc->num_cs = 1;
1106 amc->i2c_init = palmetto_bmc_i2c_init;
1107 mc->default_ram_size = 256 * MiB;
1108 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1109 aspeed_soc_num_cpus(amc->soc_name);
1110};
1111
1112static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, void *data)
1113{
1114 MachineClass *mc = MACHINE_CLASS(oc);
1115 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1116
1117 mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)";
1118 amc->soc_name = "ast2400-a1";
1119 amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1;
1120 amc->fmc_model = "n25q256a";
1121 amc->spi_model = "mx25l25635e";
1122 amc->num_cs = 1;
1123 amc->i2c_init = quanta_q71l_bmc_i2c_init;
1124 mc->default_ram_size = 128 * MiB;
1125 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1126 aspeed_soc_num_cpus(amc->soc_name);
1127}
1128
1129static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
1130 void *data)
1131{
1132 MachineClass *mc = MACHINE_CLASS(oc);
1133 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1134
1135 mc->desc = "Supermicro X11 BMC (ARM926EJ-S)";
1136 amc->soc_name = "ast2400-a1";
1137 amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1;
1138 amc->fmc_model = "mx25l25635e";
1139 amc->spi_model = "mx25l25635e";
1140 amc->num_cs = 1;
1141 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1142 amc->i2c_init = palmetto_bmc_i2c_init;
1143 mc->default_ram_size = 256 * MiB;
1144}
1145
1146static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data)
1147{
1148 MachineClass *mc = MACHINE_CLASS(oc);
1149 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1150
1151 mc->desc = "Aspeed AST2500 EVB (ARM1176)";
1152 amc->soc_name = "ast2500-a1";
1153 amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
1154 amc->fmc_model = "mx25l25635e";
1155 amc->spi_model = "mx25l25635f";
1156 amc->num_cs = 1;
1157 amc->i2c_init = ast2500_evb_i2c_init;
1158 mc->default_ram_size = 512 * MiB;
1159 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1160 aspeed_soc_num_cpus(amc->soc_name);
1161};
1162
1163static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data)
1164{
1165 MachineClass *mc = MACHINE_CLASS(oc);
1166 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1167
1168 mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
1169 amc->soc_name = "ast2500-a1";
1170 amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
1171 amc->fmc_model = "n25q256a";
1172 amc->spi_model = "mx66l1g45g";
1173 amc->num_cs = 2;
1174 amc->i2c_init = romulus_bmc_i2c_init;
1175 mc->default_ram_size = 512 * MiB;
1176 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1177 aspeed_soc_num_cpus(amc->soc_name);
1178};
1179
1180static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *data)
1181{
1182 MachineClass *mc = MACHINE_CLASS(oc);
1183 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1184
1185 mc->desc = "OCP SonoraPass BMC (ARM1176)";
1186 amc->soc_name = "ast2500-a1";
1187 amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1;
1188 amc->fmc_model = "mx66l1g45g";
1189 amc->spi_model = "mx66l1g45g";
1190 amc->num_cs = 2;
1191 amc->i2c_init = sonorapass_bmc_i2c_init;
1192 mc->default_ram_size = 512 * MiB;
1193 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1194 aspeed_soc_num_cpus(amc->soc_name);
1195};
1196
1197static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data)
1198{
1199 MachineClass *mc = MACHINE_CLASS(oc);
1200 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1201
1202 mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
1203 amc->soc_name = "ast2500-a1";
1204 amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
1205 amc->fmc_model = "mx25l25635f";
1206 amc->spi_model = "mx66l1g45g";
1207 amc->num_cs = 2;
1208 amc->i2c_init = witherspoon_bmc_i2c_init;
1209 mc->default_ram_size = 512 * MiB;
1210 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1211 aspeed_soc_num_cpus(amc->soc_name);
1212};
1213
1214static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
1215{
1216 MachineClass *mc = MACHINE_CLASS(oc);
1217 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1218
1219 mc->desc = "Aspeed AST2600 EVB (Cortex-A7)";
1220 amc->soc_name = "ast2600-a3";
1221 amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
1222 amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
1223 amc->fmc_model = "mx66u51235f";
1224 amc->spi_model = "mx66u51235f";
1225 amc->num_cs = 1;
1226 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON |
1227 ASPEED_MAC3_ON;
1228 amc->i2c_init = ast2600_evb_i2c_init;
1229 mc->default_ram_size = 1 * GiB;
1230 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1231 aspeed_soc_num_cpus(amc->soc_name);
1232};
1233
1234static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
1235{
1236 MachineClass *mc = MACHINE_CLASS(oc);
1237 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1238
1239 mc->desc = "OpenPOWER Tacoma BMC (Cortex-A7)";
1240 amc->soc_name = "ast2600-a3";
1241 amc->hw_strap1 = TACOMA_BMC_HW_STRAP1;
1242 amc->hw_strap2 = TACOMA_BMC_HW_STRAP2;
1243 amc->fmc_model = "mx66l1g45g";
1244 amc->spi_model = "mx66l1g45g";
1245 amc->num_cs = 2;
1246 amc->macs_mask = ASPEED_MAC2_ON;
1247 amc->i2c_init = witherspoon_bmc_i2c_init;
1248 mc->default_ram_size = 1 * GiB;
1249 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1250 aspeed_soc_num_cpus(amc->soc_name);
1251};
1252
1253static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data)
1254{
1255 MachineClass *mc = MACHINE_CLASS(oc);
1256 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1257
1258 mc->desc = "Bytedance G220A BMC (ARM1176)";
1259 amc->soc_name = "ast2500-a1";
1260 amc->hw_strap1 = G220A_BMC_HW_STRAP1;
1261 amc->fmc_model = "n25q512a";
1262 amc->spi_model = "mx25l25635e";
1263 amc->num_cs = 2;
1264 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1265 amc->i2c_init = g220a_bmc_i2c_init;
1266 mc->default_ram_size = 1024 * MiB;
1267 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1268 aspeed_soc_num_cpus(amc->soc_name);
1269};
1270
1271static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, void *data)
1272{
1273 MachineClass *mc = MACHINE_CLASS(oc);
1274 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1275
1276 mc->desc = "Inspur FP5280G2 BMC (ARM1176)";
1277 amc->soc_name = "ast2500-a1";
1278 amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1;
1279 amc->fmc_model = "n25q512a";
1280 amc->spi_model = "mx25l25635e";
1281 amc->num_cs = 2;
1282 amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
1283 amc->i2c_init = fp5280g2_bmc_i2c_init;
1284 mc->default_ram_size = 512 * MiB;
1285 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1286 aspeed_soc_num_cpus(amc->soc_name);
1287};
1288
1289static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data)
1290{
1291 MachineClass *mc = MACHINE_CLASS(oc);
1292 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1293
1294 mc->desc = "IBM Rainier BMC (Cortex-A7)";
1295 amc->soc_name = "ast2600-a3";
1296 amc->hw_strap1 = RAINIER_BMC_HW_STRAP1;
1297 amc->hw_strap2 = RAINIER_BMC_HW_STRAP2;
1298 amc->fmc_model = "mx66l1g45g";
1299 amc->spi_model = "mx66l1g45g";
1300 amc->num_cs = 2;
1301 amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
1302 amc->i2c_init = rainier_bmc_i2c_init;
1303 mc->default_ram_size = 1 * GiB;
1304 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1305 aspeed_soc_num_cpus(amc->soc_name);
1306};
1307
1308
1309#if HOST_LONG_BITS == 32
1310#define FUJI_BMC_RAM_SIZE (1 * GiB)
1311#else
1312#define FUJI_BMC_RAM_SIZE (2 * GiB)
1313#endif
1314
1315static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
1316{
1317 MachineClass *mc = MACHINE_CLASS(oc);
1318 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1319
1320 mc->desc = "Facebook Fuji BMC (Cortex-A7)";
1321 amc->soc_name = "ast2600-a3";
1322 amc->hw_strap1 = FUJI_BMC_HW_STRAP1;
1323 amc->hw_strap2 = FUJI_BMC_HW_STRAP2;
1324 amc->fmc_model = "mx66l1g45g";
1325 amc->spi_model = "mx66l1g45g";
1326 amc->num_cs = 2;
1327 amc->macs_mask = ASPEED_MAC3_ON;
1328 amc->i2c_init = fuji_bmc_i2c_init;
1329 amc->uart_default = ASPEED_DEV_UART1;
1330 mc->default_ram_size = FUJI_BMC_RAM_SIZE;
1331 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1332 aspeed_soc_num_cpus(amc->soc_name);
1333};
1334
1335
1336#if HOST_LONG_BITS == 32
1337#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
1338#else
1339#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
1340#endif
1341
1342static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
1343{
1344 MachineClass *mc = MACHINE_CLASS(oc);
1345 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1346
1347 mc->desc = "Facebook Bletchley BMC (Cortex-A7)";
1348 amc->soc_name = "ast2600-a3";
1349 amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1;
1350 amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2;
1351 amc->fmc_model = "w25q01jvq";
1352 amc->spi_model = NULL;
1353 amc->num_cs = 2;
1354 amc->macs_mask = ASPEED_MAC2_ON;
1355 amc->i2c_init = bletchley_bmc_i2c_init;
1356 mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE;
1357 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1358 aspeed_soc_num_cpus(amc->soc_name);
1359}
1360
1361static void fby35_reset(MachineState *state, ShutdownCause reason)
1362{
1363 AspeedMachineState *bmc = ASPEED_MACHINE(state);
1364 AspeedGPIOState *gpio = &bmc->soc.gpio;
1365
1366 qemu_devices_reset(reason);
1367
1368
1369 object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal);
1370 object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal);
1371 object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal);
1372 object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal);
1373
1374
1375 object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal);
1376 object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal);
1377 object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal);
1378 object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal);
1379
1380
1381 object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal);
1382 object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal);
1383 object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal);
1384 object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal);
1385}
1386
1387static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data)
1388{
1389 MachineClass *mc = MACHINE_CLASS(oc);
1390 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1391
1392 mc->desc = "Facebook fby35 BMC (Cortex-A7)";
1393 mc->reset = fby35_reset;
1394 amc->fmc_model = "mx66l1g45g";
1395 amc->num_cs = 2;
1396 amc->macs_mask = ASPEED_MAC3_ON;
1397 amc->i2c_init = fby35_i2c_init;
1398
1399 mc->default_ram_size = FUJI_BMC_RAM_SIZE;
1400}
1401
1402#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
1403
1404#define SYSCLK_FRQ 200000000ULL
1405
1406static void aspeed_minibmc_machine_init(MachineState *machine)
1407{
1408 AspeedMachineState *bmc = ASPEED_MACHINE(machine);
1409 AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
1410 Clock *sysclk;
1411
1412 sysclk = clock_new(OBJECT(machine), "SYSCLK");
1413 clock_set_hz(sysclk, SYSCLK_FRQ);
1414
1415 object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
1416 qdev_connect_clock_in(DEVICE(&bmc->soc), "sysclk", sysclk);
1417
1418 object_property_set_link(OBJECT(&bmc->soc), "memory",
1419 OBJECT(get_system_memory()), &error_abort);
1420 connect_serial_hds_to_uarts(bmc);
1421 qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
1422
1423 aspeed_board_init_flashes(&bmc->soc.fmc,
1424 bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
1425 amc->num_cs,
1426 0);
1427
1428 aspeed_board_init_flashes(&bmc->soc.spi[0],
1429 bmc->spi_model ? bmc->spi_model : amc->spi_model,
1430 amc->num_cs, amc->num_cs);
1431
1432 aspeed_board_init_flashes(&bmc->soc.spi[1],
1433 bmc->spi_model ? bmc->spi_model : amc->spi_model,
1434 amc->num_cs, (amc->num_cs * 2));
1435
1436 if (amc->i2c_init) {
1437 amc->i2c_init(bmc);
1438 }
1439
1440 armv7m_load_kernel(ARM_CPU(first_cpu),
1441 machine->kernel_filename,
1442 0,
1443 AST1030_INTERNAL_FLASH_SIZE);
1444}
1445
1446static void ast1030_evb_i2c_init(AspeedMachineState *bmc)
1447{
1448 AspeedSoCState *soc = &bmc->soc;
1449
1450
1451 uint8_t *eeprom_buf = g_malloc0(32 * 1024);
1452 smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf);
1453
1454
1455 i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d);
1456}
1457
1458static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
1459 void *data)
1460{
1461 MachineClass *mc = MACHINE_CLASS(oc);
1462 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1463
1464 mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)";
1465 amc->soc_name = "ast1030-a1";
1466 amc->hw_strap1 = 0;
1467 amc->hw_strap2 = 0;
1468 mc->init = aspeed_minibmc_machine_init;
1469 amc->i2c_init = ast1030_evb_i2c_init;
1470 mc->default_ram_size = 0;
1471 mc->default_cpus = mc->min_cpus = mc->max_cpus = 1;
1472 amc->fmc_model = "sst25vf032b";
1473 amc->spi_model = "sst25vf032b";
1474 amc->num_cs = 2;
1475 amc->macs_mask = 0;
1476}
1477
1478static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
1479 void *data)
1480{
1481 MachineClass *mc = MACHINE_CLASS(oc);
1482 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1483
1484 mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)";
1485 amc->soc_name = "ast2600-a3";
1486 amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
1487 amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
1488 amc->fmc_model = "n25q512a";
1489 amc->spi_model = "n25q512a";
1490 amc->num_cs = 2;
1491 amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
1492 amc->i2c_init = qcom_dc_scm_bmc_i2c_init;
1493 mc->default_ram_size = 1 * GiB;
1494 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1495 aspeed_soc_num_cpus(amc->soc_name);
1496};
1497
1498static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
1499 void *data)
1500{
1501 MachineClass *mc = MACHINE_CLASS(oc);
1502 AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
1503
1504 mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)";
1505 amc->soc_name = "ast2600-a3";
1506 amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
1507 amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
1508 amc->fmc_model = "n25q512a";
1509 amc->spi_model = "n25q512a";
1510 amc->num_cs = 2;
1511 amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
1512 amc->i2c_init = qcom_dc_scm_firework_i2c_init;
1513 mc->default_ram_size = 1 * GiB;
1514 mc->default_cpus = mc->min_cpus = mc->max_cpus =
1515 aspeed_soc_num_cpus(amc->soc_name);
1516};
1517
1518static const TypeInfo aspeed_machine_types[] = {
1519 {
1520 .name = MACHINE_TYPE_NAME("palmetto-bmc"),
1521 .parent = TYPE_ASPEED_MACHINE,
1522 .class_init = aspeed_machine_palmetto_class_init,
1523 }, {
1524 .name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
1525 .parent = TYPE_ASPEED_MACHINE,
1526 .class_init = aspeed_machine_supermicrox11_bmc_class_init,
1527 }, {
1528 .name = MACHINE_TYPE_NAME("ast2500-evb"),
1529 .parent = TYPE_ASPEED_MACHINE,
1530 .class_init = aspeed_machine_ast2500_evb_class_init,
1531 }, {
1532 .name = MACHINE_TYPE_NAME("romulus-bmc"),
1533 .parent = TYPE_ASPEED_MACHINE,
1534 .class_init = aspeed_machine_romulus_class_init,
1535 }, {
1536 .name = MACHINE_TYPE_NAME("sonorapass-bmc"),
1537 .parent = TYPE_ASPEED_MACHINE,
1538 .class_init = aspeed_machine_sonorapass_class_init,
1539 }, {
1540 .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
1541 .parent = TYPE_ASPEED_MACHINE,
1542 .class_init = aspeed_machine_witherspoon_class_init,
1543 }, {
1544 .name = MACHINE_TYPE_NAME("ast2600-evb"),
1545 .parent = TYPE_ASPEED_MACHINE,
1546 .class_init = aspeed_machine_ast2600_evb_class_init,
1547 }, {
1548 .name = MACHINE_TYPE_NAME("tacoma-bmc"),
1549 .parent = TYPE_ASPEED_MACHINE,
1550 .class_init = aspeed_machine_tacoma_class_init,
1551 }, {
1552 .name = MACHINE_TYPE_NAME("g220a-bmc"),
1553 .parent = TYPE_ASPEED_MACHINE,
1554 .class_init = aspeed_machine_g220a_class_init,
1555 }, {
1556 .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
1557 .parent = TYPE_ASPEED_MACHINE,
1558 .class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
1559 }, {
1560 .name = MACHINE_TYPE_NAME("qcom-firework-bmc"),
1561 .parent = TYPE_ASPEED_MACHINE,
1562 .class_init = aspeed_machine_qcom_firework_class_init,
1563 }, {
1564 .name = MACHINE_TYPE_NAME("fp5280g2-bmc"),
1565 .parent = TYPE_ASPEED_MACHINE,
1566 .class_init = aspeed_machine_fp5280g2_class_init,
1567 }, {
1568 .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
1569 .parent = TYPE_ASPEED_MACHINE,
1570 .class_init = aspeed_machine_quanta_q71l_class_init,
1571 }, {
1572 .name = MACHINE_TYPE_NAME("rainier-bmc"),
1573 .parent = TYPE_ASPEED_MACHINE,
1574 .class_init = aspeed_machine_rainier_class_init,
1575 }, {
1576 .name = MACHINE_TYPE_NAME("fuji-bmc"),
1577 .parent = TYPE_ASPEED_MACHINE,
1578 .class_init = aspeed_machine_fuji_class_init,
1579 }, {
1580 .name = MACHINE_TYPE_NAME("bletchley-bmc"),
1581 .parent = TYPE_ASPEED_MACHINE,
1582 .class_init = aspeed_machine_bletchley_class_init,
1583 }, {
1584 .name = MACHINE_TYPE_NAME("fby35-bmc"),
1585 .parent = MACHINE_TYPE_NAME("ast2600-evb"),
1586 .class_init = aspeed_machine_fby35_class_init,
1587 }, {
1588 .name = MACHINE_TYPE_NAME("ast1030-evb"),
1589 .parent = TYPE_ASPEED_MACHINE,
1590 .class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
1591 }, {
1592 .name = TYPE_ASPEED_MACHINE,
1593 .parent = TYPE_MACHINE,
1594 .instance_size = sizeof(AspeedMachineState),
1595 .instance_init = aspeed_machine_instance_init,
1596 .class_size = sizeof(AspeedMachineClass),
1597 .class_init = aspeed_machine_class_init,
1598 .abstract = true,
1599 }
1600};
1601
1602DEFINE_TYPES(aspeed_machine_types)
1603