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25#ifndef XILINX_SPIPS_H
26#define XILINX_SPIPS_H
27
28#include "hw/ssi/ssi.h"
29#include "qemu/fifo32.h"
30#include "hw/stream.h"
31#include "hw/sysbus.h"
32#include "qom/object.h"
33
34typedef struct XilinxSPIPS XilinxSPIPS;
35
36#define XLNX_SPIPS_R_MAX (0x100 / 4)
37#define XLNX_ZYNQMP_SPIPS_R_MAX (0x200 / 4)
38
39
40#define LQSPI_CACHE_SIZE 1024
41
42#define QSPI_DMA_MAX_BURST_SIZE 2048
43
44typedef enum {
45 READ = 0x3, READ_4 = 0x13,
46 FAST_READ = 0xb, FAST_READ_4 = 0x0c,
47 DOR = 0x3b, DOR_4 = 0x3c,
48 QOR = 0x6b, QOR_4 = 0x6c,
49 DIOR = 0xbb, DIOR_4 = 0xbc,
50 QIOR = 0xeb, QIOR_4 = 0xec,
51
52 PP = 0x2, PP_4 = 0x12,
53 DPP = 0xa2,
54 QPP = 0x32, QPP_4 = 0x34,
55} FlashCMD;
56
57struct XilinxSPIPS {
58 SysBusDevice parent_obj;
59
60 MemoryRegion iomem;
61 MemoryRegion mmlqspi;
62
63 qemu_irq irq;
64 int irqline;
65
66 uint8_t num_cs;
67 uint8_t num_busses;
68
69 uint8_t snoop_state;
70 int cmd_dummies;
71 uint8_t link_state;
72 uint8_t link_state_next;
73 uint8_t link_state_next_when;
74 qemu_irq *cs_lines;
75 bool *cs_lines_state;
76 SSIBus **spi;
77
78 Fifo8 rx_fifo;
79 Fifo8 tx_fifo;
80
81 uint8_t num_txrx_bytes;
82 uint32_t rx_discard;
83
84 uint32_t regs[XLNX_SPIPS_R_MAX];
85
86 bool man_start_com;
87};
88
89struct XilinxQSPIPS {
90 XilinxSPIPS parent_obj;
91
92 uint8_t lqspi_buf[LQSPI_CACHE_SIZE];
93 hwaddr lqspi_cached_addr;
94 Error *migration_blocker;
95 bool mmio_execution_enabled;
96};
97typedef struct XilinxQSPIPS XilinxQSPIPS;
98
99struct XlnxZynqMPQSPIPS {
100 XilinxQSPIPS parent_obj;
101
102 StreamSink *dma;
103 int gqspi_irqline;
104
105 uint32_t regs[XLNX_ZYNQMP_SPIPS_R_MAX];
106
107
108 Fifo8 rx_fifo_g;
109 Fifo8 tx_fifo_g;
110 Fifo32 fifo_g;
111
112
113
114
115
116
117 uint8_t rx_fifo_g_align;
118 uint8_t tx_fifo_g_align;
119 bool man_start_com_g;
120 uint32_t dma_burst_size;
121 uint8_t dma_buf[QSPI_DMA_MAX_BURST_SIZE];
122};
123
124struct XilinxSPIPSClass {
125 SysBusDeviceClass parent_class;
126
127 const MemoryRegionOps *reg_ops;
128
129 uint32_t rx_fifo_size;
130 uint32_t tx_fifo_size;
131};
132
133#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
134#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
135#define TYPE_XLNX_ZYNQMP_QSPIPS "xlnx.usmp-gqspi"
136
137OBJECT_DECLARE_TYPE(XilinxSPIPS, XilinxSPIPSClass, XILINX_SPIPS)
138
139OBJECT_DECLARE_SIMPLE_TYPE(XilinxQSPIPS, XILINX_QSPIPS)
140
141OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPQSPIPS, XLNX_ZYNQMP_QSPIPS)
142
143#endif
144