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49#include "qemu/osdep.h"
50#include "qemu/datadir.h"
51#include "qemu/units.h"
52#include "qapi/error.h"
53#include "hw/ppc/ppc.h"
54#include "hw/qdev-properties.h"
55#include "hw/nvram/mac_nvram.h"
56#include "hw/boards.h"
57#include "hw/pci-host/uninorth.h"
58#include "hw/input/adb.h"
59#include "hw/ppc/mac_dbdma.h"
60#include "hw/pci/pci.h"
61#include "net/net.h"
62#include "sysemu/sysemu.h"
63#include "hw/nvram/fw_cfg.h"
64#include "hw/char/escc.h"
65#include "hw/misc/macio/macio.h"
66#include "hw/ppc/openpic.h"
67#include "hw/loader.h"
68#include "hw/fw-path-provider.h"
69#include "elf.h"
70#include "qemu/error-report.h"
71#include "sysemu/kvm.h"
72#include "sysemu/reset.h"
73#include "kvm_ppc.h"
74#include "hw/usb.h"
75#include "hw/sysbus.h"
76#include "trace.h"
77
78#define MAX_IDE_BUS 2
79#define CFG_ADDR 0xf0000510
80#define TBFREQ (100UL * 1000UL * 1000UL)
81#define CLOCKFREQ (900UL * 1000UL * 1000UL)
82#define BUSFREQ (100UL * 1000UL * 1000UL)
83
84#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
85
86#define PROM_FILENAME "openbios-ppc"
87#define PROM_BASE 0xfff00000
88#define PROM_SIZE (1 * MiB)
89
90#define KERNEL_LOAD_ADDR 0x01000000
91#define KERNEL_GAP 0x00100000
92
93#define TYPE_CORE99_MACHINE MACHINE_TYPE_NAME("mac99")
94typedef struct Core99MachineState Core99MachineState;
95DECLARE_INSTANCE_CHECKER(Core99MachineState, CORE99_MACHINE,
96 TYPE_CORE99_MACHINE)
97
98typedef enum {
99 CORE99_VIA_CONFIG_CUDA = 0,
100 CORE99_VIA_CONFIG_PMU,
101 CORE99_VIA_CONFIG_PMU_ADB
102} Core99ViaConfig;
103
104struct Core99MachineState {
105
106 MachineState parent;
107
108 Core99ViaConfig via_config;
109};
110
111static void fw_cfg_boot_set(void *opaque, const char *boot_device,
112 Error **errp)
113{
114 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
115}
116
117static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
118{
119 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
120}
121
122static void ppc_core99_reset(void *opaque)
123{
124 PowerPCCPU *cpu = opaque;
125
126 cpu_reset(CPU(cpu));
127
128 cpu->env.nip = PROM_BASE + 0x100;
129}
130
131
132static void ppc_core99_init(MachineState *machine)
133{
134 Core99MachineState *core99_machine = CORE99_MACHINE(machine);
135 PowerPCCPU *cpu = NULL;
136 CPUPPCState *env = NULL;
137 char *filename;
138 IrqLines *openpic_irqs;
139 int i, j, k, ppc_boot_device, machine_arch, bios_size = -1;
140 const char *bios_name = machine->firmware ?: PROM_FILENAME;
141 MemoryRegion *bios = g_new(MemoryRegion, 1);
142 hwaddr kernel_base = 0, initrd_base = 0, cmdline_base = 0;
143 long kernel_size = 0, initrd_size = 0;
144 PCIBus *pci_bus;
145 bool has_pmu, has_adb;
146 Object *macio;
147 MACIOIDEState *macio_ide;
148 BusState *adb_bus;
149 MacIONVRAMState *nvr;
150 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
151 void *fw_cfg;
152 SysBusDevice *s;
153 DeviceState *dev, *pic_dev, *uninorth_pci_dev;
154 DeviceState *uninorth_internal_dev = NULL, *uninorth_agp_dev = NULL;
155 hwaddr nvram_addr = 0xFFF04000;
156 uint64_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TBFREQ;
157
158
159 for (i = 0; i < machine->smp.cpus; i++) {
160 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
161 env = &cpu->env;
162
163
164 cpu_ppc_tb_init(env, TBFREQ);
165 qemu_register_reset(ppc_core99_reset, cpu);
166 }
167
168
169 if (machine->ram_size > 2 * GiB) {
170 error_report("RAM size more than 2 GiB is not supported");
171 exit(1);
172 }
173 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
174
175
176 memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE,
177 &error_fatal);
178 memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
179
180 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
181 if (filename) {
182
183 bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
184 NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
185
186 if (bios_size <= 0) {
187
188 bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
189 }
190 g_free(filename);
191 }
192 if (bios_size < 0 || bios_size > PROM_SIZE) {
193 error_report("could not load PowerPC bios '%s'", bios_name);
194 exit(1);
195 }
196
197 if (machine->kernel_filename) {
198 int bswap_needed = 0;
199
200#ifdef BSWAP_NEEDED
201 bswap_needed = 1;
202#endif
203 kernel_base = KERNEL_LOAD_ADDR;
204 kernel_size = load_elf(machine->kernel_filename, NULL,
205 translate_kernel_address, NULL, NULL, NULL,
206 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
207 if (kernel_size < 0) {
208 kernel_size = load_aout(machine->kernel_filename, kernel_base,
209 machine->ram_size - kernel_base,
210 bswap_needed, TARGET_PAGE_SIZE);
211 }
212 if (kernel_size < 0) {
213 kernel_size = load_image_targphys(machine->kernel_filename,
214 kernel_base,
215 machine->ram_size - kernel_base);
216 }
217 if (kernel_size < 0) {
218 error_report("could not load kernel '%s'",
219 machine->kernel_filename);
220 exit(1);
221 }
222
223 if (machine->initrd_filename) {
224 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
225 initrd_size = load_image_targphys(machine->initrd_filename,
226 initrd_base,
227 machine->ram_size - initrd_base);
228 if (initrd_size < 0) {
229 error_report("could not load initial ram disk '%s'",
230 machine->initrd_filename);
231 exit(1);
232 }
233 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
234 } else {
235 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
236 }
237 ppc_boot_device = 'm';
238 } else {
239 ppc_boot_device = '\0';
240
241
242
243 for (i = 0; machine->boot_config.order[i] != '\0'; i++) {
244 if (machine->boot_config.order[i] >= 'c' &&
245 machine->boot_config.order[i] <= 'f') {
246 ppc_boot_device = machine->boot_config.order[i];
247 break;
248 }
249 }
250 if (ppc_boot_device == '\0') {
251 error_report("No valid boot device for Mac99 machine");
252 exit(1);
253 }
254 }
255
256 openpic_irqs = g_new0(IrqLines, machine->smp.cpus);
257 dev = DEVICE(cpu);
258 for (i = 0; i < machine->smp.cpus; i++) {
259
260
261
262 switch (PPC_INPUT(env)) {
263 case PPC_FLAGS_INPUT_6xx:
264 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
265 qdev_get_gpio_in(dev, PPC6xx_INPUT_INT);
266 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
267 qdev_get_gpio_in(dev, PPC6xx_INPUT_INT);
268 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
269 qdev_get_gpio_in(dev, PPC6xx_INPUT_MCP);
270
271 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
272
273 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
274 qdev_get_gpio_in(dev, PPC6xx_INPUT_HRESET);
275 break;
276#if defined(TARGET_PPC64)
277 case PPC_FLAGS_INPUT_970:
278 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
279 qdev_get_gpio_in(dev, PPC970_INPUT_INT);
280 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
281 qdev_get_gpio_in(dev, PPC970_INPUT_INT);
282 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
283 qdev_get_gpio_in(dev, PPC970_INPUT_MCP);
284
285 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
286
287 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
288 qdev_get_gpio_in(dev, PPC970_INPUT_HRESET);
289 break;
290#endif
291 default:
292 error_report("Bus model not supported on mac99 machine");
293 exit(1);
294 }
295 }
296
297
298 s = SYS_BUS_DEVICE(qdev_new(TYPE_UNI_NORTH));
299 sysbus_realize_and_unref(s, &error_fatal);
300 memory_region_add_subregion(get_system_memory(), 0xf8000000,
301 sysbus_mmio_get_region(s, 0));
302
303 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
304 machine_arch = ARCH_MAC99_U3;
305
306
307 uninorth_pci_dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
308 s = SYS_BUS_DEVICE(uninorth_pci_dev);
309 sysbus_realize_and_unref(s, &error_fatal);
310 sysbus_mmio_map(s, 0, 0xf0800000);
311 sysbus_mmio_map(s, 1, 0xf0c00000);
312
313 memory_region_add_subregion(get_system_memory(), 0x80000000,
314 sysbus_mmio_get_region(s, 2));
315
316 memory_region_add_subregion(get_system_memory(), 0xf2000000,
317 sysbus_mmio_get_region(s, 3));
318 } else {
319 machine_arch = ARCH_MAC99;
320
321
322 uninorth_agp_dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
323 s = SYS_BUS_DEVICE(uninorth_agp_dev);
324 sysbus_realize_and_unref(s, &error_fatal);
325 sysbus_mmio_map(s, 0, 0xf0800000);
326 sysbus_mmio_map(s, 1, 0xf0c00000);
327
328
329 uninorth_internal_dev = qdev_new(
330 TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
331 s = SYS_BUS_DEVICE(uninorth_internal_dev);
332 sysbus_realize_and_unref(s, &error_fatal);
333 sysbus_mmio_map(s, 0, 0xf4800000);
334 sysbus_mmio_map(s, 1, 0xf4c00000);
335
336
337 uninorth_pci_dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
338 qdev_prop_set_uint32(uninorth_pci_dev, "ofw-addr", 0xf2000000);
339 s = SYS_BUS_DEVICE(uninorth_pci_dev);
340 sysbus_realize_and_unref(s, &error_fatal);
341 sysbus_mmio_map(s, 0, 0xf2800000);
342 sysbus_mmio_map(s, 1, 0xf2c00000);
343
344 memory_region_add_subregion(get_system_memory(), 0x80000000,
345 sysbus_mmio_get_region(s, 2));
346
347 memory_region_add_subregion(get_system_memory(), 0xf2000000,
348 sysbus_mmio_get_region(s, 3));
349 }
350
351 machine->usb |= defaults_enabled() && !machine->usb_disabled;
352 has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
353 has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
354 core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
355
356
357 pci_bus = PCI_HOST_BRIDGE(uninorth_pci_dev)->bus;
358
359
360 macio = OBJECT(pci_new(-1, TYPE_NEWWORLD_MACIO));
361 dev = DEVICE(macio);
362 qdev_prop_set_uint64(dev, "frequency", tbfreq);
363 qdev_prop_set_bit(dev, "has-pmu", has_pmu);
364 qdev_prop_set_bit(dev, "has-adb", has_adb);
365
366 dev = DEVICE(object_resolve_path_component(macio, "escc"));
367 qdev_prop_set_chr(dev, "chrA", serial_hd(0));
368 qdev_prop_set_chr(dev, "chrB", serial_hd(1));
369
370 pci_realize_and_unref(PCI_DEVICE(macio), pci_bus, &error_fatal);
371
372 pic_dev = DEVICE(object_resolve_path_component(macio, "pic"));
373 for (i = 0; i < 4; i++) {
374 qdev_connect_gpio_out(uninorth_pci_dev, i,
375 qdev_get_gpio_in(pic_dev, 0x1b + i));
376 }
377
378
379 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_970) {
380
381 for (i = 0; i < 4; i++) {
382 qdev_connect_gpio_out(uninorth_agp_dev, i,
383 qdev_get_gpio_in(pic_dev, 0x1b + i));
384 }
385
386
387 for (i = 0; i < 4; i++) {
388 qdev_connect_gpio_out(uninorth_internal_dev, i,
389 qdev_get_gpio_in(pic_dev, 0x1b + i));
390 }
391 }
392
393
394 s = SYS_BUS_DEVICE(pic_dev);
395 k = 0;
396 for (i = 0; i < machine->smp.cpus; i++) {
397 for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
398 sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
399 }
400 }
401 g_free(openpic_irqs);
402
403
404 ide_drive_get(hd, ARRAY_SIZE(hd));
405
406 macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[0]"));
407 macio_ide_init_drives(macio_ide, hd);
408
409 macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[1]"));
410 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
411
412 if (has_adb) {
413 if (has_pmu) {
414 dev = DEVICE(object_resolve_path_component(macio, "pmu"));
415 } else {
416 dev = DEVICE(object_resolve_path_component(macio, "cuda"));
417 }
418
419 adb_bus = qdev_get_child_bus(dev, "adb.0");
420 dev = qdev_new(TYPE_ADB_KEYBOARD);
421 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
422
423 dev = qdev_new(TYPE_ADB_MOUSE);
424 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
425 }
426
427 if (machine->usb) {
428 pci_create_simple(pci_bus, -1, "pci-ohci");
429
430
431
432 if (!has_adb || machine_arch == ARCH_MAC99_U3) {
433 USBBus *usb_bus = usb_bus_find(-1);
434
435 usb_create_simple(usb_bus, "usb-kbd");
436 usb_create_simple(usb_bus, "usb-mouse");
437 }
438 }
439
440 pci_vga_init(pci_bus);
441
442 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
443 graphic_depth = 15;
444 }
445
446 for (i = 0; i < nb_nics; i++) {
447 pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
448 }
449
450
451 if (kvm_enabled() && qemu_real_host_page_size() > 4096) {
452
453
454 nvram_addr = 0xFFE00000;
455 }
456 dev = qdev_new(TYPE_MACIO_NVRAM);
457 qdev_prop_set_uint32(dev, "size", MACIO_NVRAM_SIZE);
458 qdev_prop_set_uint32(dev, "it_shift", 1);
459 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
460 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
461 nvr = MACIO_NVRAM(dev);
462 pmac_format_nvram_partition(nvr, MACIO_NVRAM_SIZE);
463
464
465 dev = qdev_new(TYPE_FW_CFG_MEM);
466 fw_cfg = FW_CFG(dev);
467 qdev_prop_set_uint32(dev, "data_width", 1);
468 qdev_prop_set_bit(dev, "dma_enabled", false);
469 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
470 OBJECT(fw_cfg));
471 s = SYS_BUS_DEVICE(dev);
472 sysbus_realize_and_unref(s, &error_fatal);
473 sysbus_mmio_map(s, 0, CFG_ADDR);
474 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
475
476 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus);
477 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
478 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
479 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
480 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
481 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
482 if (machine->kernel_cmdline) {
483 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
484 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE,
485 machine->kernel_cmdline);
486 } else {
487 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
488 }
489 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
490 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
491 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
492
493 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
494 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
495 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
496
497 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
498
499 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
500 if (kvm_enabled()) {
501 uint8_t *hypercall;
502
503 hypercall = g_malloc(16);
504 kvmppc_get_hypercall(env, hypercall, 16);
505 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
506 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
507 }
508 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
509
510 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
511 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
512 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
513
514
515 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
516 if (filename) {
517 gchar *ndrv_file;
518 gsize ndrv_size;
519
520 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
521 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
522 }
523 g_free(filename);
524 }
525
526 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
527}
528
529
530
531
532
533static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
534 DeviceState *dev)
535{
536 PCIDevice *pci;
537 MACIOIDEState *macio_ide;
538
539 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
540 pci = PCI_DEVICE(dev);
541 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
542 }
543
544 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
545 macio_ide = MACIO_IDE(dev);
546 return g_strdup_printf("ata-3@%x", macio_ide->addr);
547 }
548
549 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
550 return g_strdup("disk");
551 }
552
553 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
554 return g_strdup("cdrom");
555 }
556
557 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
558 return g_strdup("disk");
559 }
560
561 return NULL;
562}
563static int core99_kvm_type(MachineState *machine, const char *arg)
564{
565
566 return 2;
567}
568
569static void core99_machine_class_init(ObjectClass *oc, void *data)
570{
571 MachineClass *mc = MACHINE_CLASS(oc);
572 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
573
574 mc->desc = "Mac99 based PowerMAC";
575 mc->init = ppc_core99_init;
576 mc->block_default_type = IF_IDE;
577
578 mc->max_cpus = 1;
579 mc->default_boot_order = "cd";
580 mc->default_display = "std";
581 mc->kvm_type = core99_kvm_type;
582#ifdef TARGET_PPC64
583 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
584#else
585 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
586#endif
587 mc->default_ram_id = "ppc_core99.ram";
588 mc->ignore_boot_device_suffixes = true;
589 fwc->get_dev_path = core99_fw_dev_path;
590}
591
592static char *core99_get_via_config(Object *obj, Error **errp)
593{
594 Core99MachineState *cms = CORE99_MACHINE(obj);
595
596 switch (cms->via_config) {
597 default:
598 case CORE99_VIA_CONFIG_CUDA:
599 return g_strdup("cuda");
600
601 case CORE99_VIA_CONFIG_PMU:
602 return g_strdup("pmu");
603
604 case CORE99_VIA_CONFIG_PMU_ADB:
605 return g_strdup("pmu-adb");
606 }
607}
608
609static void core99_set_via_config(Object *obj, const char *value, Error **errp)
610{
611 Core99MachineState *cms = CORE99_MACHINE(obj);
612
613 if (!strcmp(value, "cuda")) {
614 cms->via_config = CORE99_VIA_CONFIG_CUDA;
615 } else if (!strcmp(value, "pmu")) {
616 cms->via_config = CORE99_VIA_CONFIG_PMU;
617 } else if (!strcmp(value, "pmu-adb")) {
618 cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
619 } else {
620 error_setg(errp, "Invalid via value");
621 error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
622 }
623}
624
625static void core99_instance_init(Object *obj)
626{
627 Core99MachineState *cms = CORE99_MACHINE(obj);
628
629
630 cms->via_config = CORE99_VIA_CONFIG_CUDA;
631 object_property_add_str(obj, "via", core99_get_via_config,
632 core99_set_via_config);
633 object_property_set_description(obj, "via",
634 "Set VIA configuration. "
635 "Valid values are cuda, pmu and pmu-adb");
636
637 return;
638}
639
640static const TypeInfo core99_machine_info = {
641 .name = MACHINE_TYPE_NAME("mac99"),
642 .parent = TYPE_MACHINE,
643 .class_init = core99_machine_class_init,
644 .instance_init = core99_instance_init,
645 .instance_size = sizeof(Core99MachineState),
646 .interfaces = (InterfaceInfo[]) {
647 { TYPE_FW_PATH_PROVIDER },
648 { }
649 },
650};
651
652static void mac_machine_register_types(void)
653{
654 type_register_static(&core99_machine_info);
655}
656
657type_init(mac_machine_register_types)
658
