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15#include "qemu/osdep.h"
16#include "hw/ssi/ssi.h"
17#include "migration/vmstate.h"
18#include "qemu/module.h"
19#include "qapi/error.h"
20#include "qom/object.h"
21
22struct SSIBus {
23 BusState parent_obj;
24};
25
26#define TYPE_SSI_BUS "SSI"
27OBJECT_DECLARE_SIMPLE_TYPE(SSIBus, SSI_BUS)
28
29static const TypeInfo ssi_bus_info = {
30 .name = TYPE_SSI_BUS,
31 .parent = TYPE_BUS,
32 .instance_size = sizeof(SSIBus),
33};
34
35static void ssi_cs_default(void *opaque, int n, int level)
36{
37 SSIPeripheral *s = SSI_PERIPHERAL(opaque);
38 bool cs = !!level;
39 assert(n == 0);
40 if (s->cs != cs) {
41 if (s->spc->set_cs) {
42 s->spc->set_cs(s, cs);
43 }
44 }
45 s->cs = cs;
46}
47
48static uint32_t ssi_transfer_raw_default(SSIPeripheral *dev, uint32_t val)
49{
50 SSIPeripheralClass *ssc = dev->spc;
51
52 if ((dev->cs && ssc->cs_polarity == SSI_CS_HIGH) ||
53 (!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
54 ssc->cs_polarity == SSI_CS_NONE) {
55 return ssc->transfer(dev, val);
56 }
57 return 0;
58}
59
60static void ssi_peripheral_realize(DeviceState *dev, Error **errp)
61{
62 SSIPeripheral *s = SSI_PERIPHERAL(dev);
63 SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(s);
64
65 if (ssc->transfer_raw == ssi_transfer_raw_default &&
66 ssc->cs_polarity != SSI_CS_NONE) {
67 qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1);
68 }
69 s->spc = ssc;
70
71 ssc->realize(s, errp);
72}
73
74static void ssi_peripheral_class_init(ObjectClass *klass, void *data)
75{
76 SSIPeripheralClass *ssc = SSI_PERIPHERAL_CLASS(klass);
77 DeviceClass *dc = DEVICE_CLASS(klass);
78
79 dc->realize = ssi_peripheral_realize;
80 dc->bus_type = TYPE_SSI_BUS;
81 if (!ssc->transfer_raw) {
82 ssc->transfer_raw = ssi_transfer_raw_default;
83 }
84}
85
86static const TypeInfo ssi_peripheral_info = {
87 .name = TYPE_SSI_PERIPHERAL,
88 .parent = TYPE_DEVICE,
89 .class_init = ssi_peripheral_class_init,
90 .class_size = sizeof(SSIPeripheralClass),
91 .abstract = true,
92};
93
94bool ssi_realize_and_unref(DeviceState *dev, SSIBus *bus, Error **errp)
95{
96 return qdev_realize_and_unref(dev, &bus->parent_obj, errp);
97}
98
99DeviceState *ssi_create_peripheral(SSIBus *bus, const char *name)
100{
101 DeviceState *dev = qdev_new(name);
102
103 ssi_realize_and_unref(dev, bus, &error_fatal);
104 return dev;
105}
106
107SSIBus *ssi_create_bus(DeviceState *parent, const char *name)
108{
109 BusState *bus;
110 bus = qbus_new(TYPE_SSI_BUS, parent, name);
111 return SSI_BUS(bus);
112}
113
114uint32_t ssi_transfer(SSIBus *bus, uint32_t val)
115{
116 BusState *b = BUS(bus);
117 BusChild *kid;
118 uint32_t r = 0;
119
120 QTAILQ_FOREACH(kid, &b->children, sibling) {
121 SSIPeripheral *p = SSI_PERIPHERAL(kid->child);
122 r |= p->spc->transfer_raw(p, val);
123 }
124
125 return r;
126}
127
128const VMStateDescription vmstate_ssi_peripheral = {
129 .name = "SSISlave",
130 .version_id = 1,
131 .minimum_version_id = 1,
132 .fields = (VMStateField[]) {
133 VMSTATE_BOOL(cs, SSIPeripheral),
134 VMSTATE_END_OF_LIST()
135 }
136};
137
138static void ssi_peripheral_register_types(void)
139{
140 type_register_static(&ssi_bus_info);
141 type_register_static(&ssi_peripheral_info);
142}
143
144type_init(ssi_peripheral_register_types)
145