LXR qemu/include/hw/dma/xlnx-zynq-devcfg.h

   1/*
   2 * QEMU model of the Xilinx Devcfg Interface
   3 *
   4 * (C) 2011 PetaLogix Pty Ltd
   5 * (C) 2014 Xilinx Inc.
   6 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
   7 *
   8 * Permission is hereby granted, free of charge, to any person obtaining a copy
   9 * of this software and associated documentation files (the "Software"), to deal
  10 * in the Software without restriction, including without limitation the rights
  11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12 * copies of the Software, and to permit persons to whom the Software is
  13 * furnished to do so, subject to the following conditions:
  14 *
  15 * The above copyright notice and this permission notice shall be included in
  16 * all copies or substantial portions of the Software.
  17 *
  18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24 * THE SOFTWARE.
  25 */
  26
  27#ifndef XLNX_ZYNQ_DEVCFG_H
  28#define XLNX_ZYNQ_DEVCFG_H
  29
  30#include "hw/register.h"
  31#include "hw/sysbus.h"
  32#include "qom/object.h"
  33
  34#define TYPE_XLNX_ZYNQ_DEVCFG "xlnx.ps7-dev-cfg"
  35
  36OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqDevcfg, XLNX_ZYNQ_DEVCFG)
  37
  38#define XLNX_ZYNQ_DEVCFG_R_MAX (0x100 / 4)
  39
  40#define XLNX_ZYNQ_DEVCFG_DMA_CMD_FIFO_LEN 10
  41
  42typedef struct XlnxZynqDevcfgDMACmd {
  43    uint32_t src_addr;
  44    uint32_t dest_addr;
  45    uint32_t src_len;
  46    uint32_t dest_len;
  47} XlnxZynqDevcfgDMACmd;
  48
  49struct XlnxZynqDevcfg {
  50    SysBusDevice parent_obj;
  51
  52    MemoryRegion iomem;
  53    qemu_irq irq;
  54
  55    XlnxZynqDevcfgDMACmd dma_cmd_fifo[XLNX_ZYNQ_DEVCFG_DMA_CMD_FIFO_LEN];
  56    uint8_t dma_cmd_fifo_num;
  57
  58    uint32_t regs[XLNX_ZYNQ_DEVCFG_R_MAX];
  59    RegisterInfo regs_info[XLNX_ZYNQ_DEVCFG_R_MAX];
  60};
  61
  62#endif
  63