LXR qemu/include/hw/misc/sifive_u

   1/*
   2 * QEMU SiFive U OTP (One-Time Programmable) Memory interface
   3 *
   4 * Copyright (c) 2019 Bin Meng <bmeng.cn@gmail.com>
   5 *
   6 * This program is free software; you can redistribute it and/or modify it
   7 * under the terms and conditions of the GNU General Public License,
   8 * version 2 or later, as published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope it will be useful, but WITHOUT
  11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13 * more details.
  14 *
  15 * You should have received a copy of the GNU General Public License along with
  16 * this program.  If not, see <http://www.gnu.org/licenses/>.
  17 */
  18
  19#ifndef HW_SIFIVE_U_OTP_H
  20#define HW_SIFIVE_U_OTP_H
  21#include "qom/object.h"
  22
  23#define SIFIVE_U_OTP_PA         0x00
  24#define SIFIVE_U_OTP_PAIO       0x04
  25#define SIFIVE_U_OTP_PAS        0x08
  26#define SIFIVE_U_OTP_PCE        0x0C
  27#define SIFIVE_U_OTP_PCLK       0x10
  28#define SIFIVE_U_OTP_PDIN       0x14
  29#define SIFIVE_U_OTP_PDOUT      0x18
  30#define SIFIVE_U_OTP_PDSTB      0x1C
  31#define SIFIVE_U_OTP_PPROG      0x20
  32#define SIFIVE_U_OTP_PTC        0x24
  33#define SIFIVE_U_OTP_PTM        0x28
  34#define SIFIVE_U_OTP_PTM_REP    0x2C
  35#define SIFIVE_U_OTP_PTR        0x30
  36#define SIFIVE_U_OTP_PTRIM      0x34
  37#define SIFIVE_U_OTP_PWE        0x38
  38
  39#define SIFIVE_U_OTP_PWE_EN     (1 << 0)
  40
  41#define SIFIVE_U_OTP_PCE_EN     (1 << 0)
  42
  43#define SIFIVE_U_OTP_PDSTB_EN   (1 << 0)
  44
  45#define SIFIVE_U_OTP_PTRIM_EN   (1 << 0)
  46
  47#define SIFIVE_U_OTP_PA_MASK        0xfff
  48#define SIFIVE_U_OTP_NUM_FUSES      0x1000
  49#define SIFIVE_U_OTP_FUSE_WORD      4
  50#define SIFIVE_U_OTP_SERIAL_ADDR    0xfc
  51
  52#define SIFIVE_U_OTP_REG_SIZE       0x1000
  53
  54#define TYPE_SIFIVE_U_OTP           "riscv.sifive.u.otp"
  55
  56typedef struct SiFiveUOTPState SiFiveUOTPState;
  57DECLARE_INSTANCE_CHECKER(SiFiveUOTPState, SIFIVE_U_OTP,
  58                         TYPE_SIFIVE_U_OTP)
  59
  60struct SiFiveUOTPState {
  61    /*< private >*/
  62    SysBusDevice parent_obj;
  63
  64    /*< public >*/
  65    MemoryRegion mmio;
  66    uint32_t pa;
  67    uint32_t paio;
  68    uint32_t pas;
  69    uint32_t pce;
  70    uint32_t pclk;
  71    uint32_t pdin;
  72    uint32_t pdstb;
  73    uint32_t pprog;
  74    uint32_t ptc;
  75    uint32_t ptm;
  76    uint32_t ptm_rep;
  77    uint32_t ptr;
  78    uint32_t ptrim;
  79    uint32_t pwe;
  80    uint32_t fuse[SIFIVE_U_OTP_NUM_FUSES];
  81    uint32_t fuse_wo[SIFIVE_U_OTP_NUM_FUSES];
  82    /* config */
  83    uint32_t serial;
  84    BlockBackend *blk;
  85};
  86
  87#endif /* HW_SIFIVE_U_OTP_H */
  88