1#ifndef HW_QXL_H
2#define HW_QXL_H
3
4#include "hw/pci/pci_device.h"
5#include "vga_int.h"
6#include "qemu/thread.h"
7
8#include "ui/qemu-spice.h"
9#include "ui/spice-display.h"
10#include "qom/object.h"
11
12enum qxl_mode {
13 QXL_MODE_UNDEFINED,
14 QXL_MODE_VGA,
15 QXL_MODE_COMPAT,
16 QXL_MODE_NATIVE,
17};
18
19#ifndef QXL_VRAM64_RANGE_INDEX
20#define QXL_VRAM64_RANGE_INDEX 4
21#endif
22
23#define QXL_UNDEFINED_IO UINT32_MAX
24
25#define QXL_NUM_DIRTY_RECTS 64
26
27#define QXL_PAGE_BITS 12
28#define QXL_PAGE_SIZE (1 << QXL_PAGE_BITS);
29
30struct PCIQXLDevice {
31 PCIDevice pci;
32 PortioList vga_port_list;
33 SimpleSpiceDisplay ssd;
34 int id;
35 bool have_vga;
36 uint32_t debug;
37 uint32_t guestdebug;
38 uint32_t cmdlog;
39
40 uint32_t guest_bug;
41
42 enum qxl_mode mode;
43 uint32_t cmdflags;
44 uint32_t revision;
45
46 int32_t num_memslots;
47
48 uint32_t current_async;
49 QemuMutex async_lock;
50
51 struct guest_slots {
52 QXLMemSlot slot;
53 MemoryRegion *mr;
54 uint64_t offset;
55 uint64_t size;
56 uint64_t delta;
57 uint32_t active;
58 } guest_slots[NUM_MEMSLOTS];
59
60 struct guest_primary {
61 QXLSurfaceCreate surface;
62 uint32_t commands;
63 uint32_t resized;
64 int32_t qxl_stride;
65 uint32_t abs_stride;
66 uint32_t bits_pp;
67 uint32_t bytes_pp;
68 uint8_t *data;
69 } guest_primary;
70
71 struct surfaces {
72 QXLPHYSICAL *cmds;
73 uint32_t count;
74 uint32_t max;
75 } guest_surfaces;
76 QXLPHYSICAL guest_cursor;
77
78 QXLPHYSICAL guest_monitors_config;
79 uint32_t guest_head0_width;
80 uint32_t guest_head0_height;
81
82 QemuMutex track_lock;
83
84
85 QEMUBH *update_irq;
86
87
88 QXLRam *ram;
89 VGACommonState vga;
90 uint32_t num_free_res;
91 QXLReleaseInfo *last_release;
92 uint32_t last_release_offset;
93 uint32_t oom_running;
94 uint32_t vgamem_size;
95
96
97 QXLRom shadow_rom;
98 QXLRom *rom;
99 QXLModes *modes;
100 uint32_t rom_size;
101 MemoryRegion rom_bar;
102 uint16_t max_outputs;
103
104
105 uint64_t vram_size;
106 MemoryRegion vram_bar;
107 uint64_t vram32_size;
108 MemoryRegion vram32_bar;
109
110
111 MemoryRegion io_bar;
112
113
114 uint32_t ram_size_mb;
115 uint32_t vram_size_mb;
116 uint32_t vram32_size_mb;
117 uint32_t vgamem_size_mb;
118 uint32_t xres;
119 uint32_t yres;
120
121
122 int render_update_cookie_num;
123 int num_dirty_rects;
124 QXLRect dirty[QXL_NUM_DIRTY_RECTS];
125 QEMUBH *update_area_bh;
126};
127
128#define TYPE_PCI_QXL "pci-qxl"
129OBJECT_DECLARE_SIMPLE_TYPE(PCIQXLDevice, PCI_QXL)
130
131#define PANIC_ON(x) if ((x)) { \
132 printf("%s: PANIC %s failed\n", __func__, #x); \
133 abort(); \
134}
135
136#define dprint(_qxl, _level, _fmt, ...) \
137 do { \
138 if (_qxl->debug >= _level) { \
139 fprintf(stderr, "qxl-%d: ", _qxl->id); \
140 fprintf(stderr, _fmt, ## __VA_ARGS__); \
141 } \
142 } while (0)
143
144#define QXL_DEFAULT_REVISION (QXL_REVISION_STABLE_V12 + 1)
145
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166
167void *qxl_phys2virt(PCIQXLDevice *qxl, QXLPHYSICAL phys, int group_id,
168 size_t size);
169void qxl_set_guest_bug(PCIQXLDevice *qxl, const char *msg, ...)
170 G_GNUC_PRINTF(2, 3);
171
172void qxl_spice_update_area(PCIQXLDevice *qxl, uint32_t surface_id,
173 struct QXLRect *area, struct QXLRect *dirty_rects,
174 uint32_t num_dirty_rects,
175 uint32_t clear_dirty_region,
176 qxl_async_io async, QXLCookie *cookie);
177void qxl_spice_loadvm_commands(PCIQXLDevice *qxl, struct QXLCommandExt *ext,
178 uint32_t count);
179void qxl_spice_oom(PCIQXLDevice *qxl);
180void qxl_spice_reset_memslots(PCIQXLDevice *qxl);
181void qxl_spice_reset_image_cache(PCIQXLDevice *qxl);
182void qxl_spice_reset_cursor(PCIQXLDevice *qxl);
183
184
185int qxl_log_cmd_cursor(PCIQXLDevice *qxl, QXLCursorCmd *cmd, int group_id);
186int qxl_log_command(PCIQXLDevice *qxl, const char *ring, QXLCommandExt *ext);
187
188
189void qxl_render_resize(PCIQXLDevice *qxl);
190void qxl_render_update(PCIQXLDevice *qxl);
191int qxl_render_cursor(PCIQXLDevice *qxl, QXLCommandExt *ext);
192void qxl_render_update_area_done(PCIQXLDevice *qxl, QXLCookie *cookie);
193void qxl_render_update_area_bh(void *opaque);
194
195#endif
196