LXR qemu/hw/isa/i82378.c

   1/*
   2 * QEMU Intel i82378 emulation (PCI to ISA bridge)
   3 *
   4 * Copyright (c) 2010-2011 Hervé Poussineau
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2.1 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "hw/pci/pci_device.h"
  22#include "hw/irq.h"
  23#include "hw/intc/i8259.h"
  24#include "hw/timer/i8254.h"
  25#include "migration/vmstate.h"
  26#include "hw/audio/pcspk.h"
  27#include "qom/object.h"
  28
  29#define TYPE_I82378 "i82378"
  30OBJECT_DECLARE_SIMPLE_TYPE(I82378State, I82378)
  31
  32struct I82378State {
  33    PCIDevice parent_obj;
  34
  35    qemu_irq cpu_intr;
  36    qemu_irq *isa_irqs_in;
  37    MemoryRegion io;
  38};
  39
  40static const VMStateDescription vmstate_i82378 = {
  41    .name = "pci-i82378",
  42    .version_id = 0,
  43    .minimum_version_id = 0,
  44    .fields = (VMStateField[]) {
  45        VMSTATE_PCI_DEVICE(parent_obj, I82378State),
  46        VMSTATE_END_OF_LIST()
  47    },
  48};
  49
  50static void i82378_request_out0_irq(void *opaque, int irq, int level)
  51{
  52    I82378State *s = opaque;
  53    qemu_set_irq(s->cpu_intr, level);
  54}
  55
  56static void i82378_request_pic_irq(void *opaque, int irq, int level)
  57{
  58    DeviceState *dev = opaque;
  59    I82378State *s = I82378(dev);
  60
  61    qemu_set_irq(s->isa_irqs_in[irq], level);
  62}
  63
  64static void i82378_realize(PCIDevice *pci, Error **errp)
  65{
  66    DeviceState *dev = DEVICE(pci);
  67    I82378State *s = I82378(dev);
  68    uint8_t *pci_conf;
  69    ISABus *isabus;
  70    ISADevice *pit;
  71
  72    pci_conf = pci->config;
  73    pci_set_word(pci_conf + PCI_COMMAND,
  74                 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
  75    pci_set_word(pci_conf + PCI_STATUS,
  76                 PCI_STATUS_DEVSEL_MEDIUM);
  77
  78    pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */
  79
  80    isabus = isa_bus_new(dev, get_system_memory(),
  81                         pci_address_space_io(pci), errp);
  82    if (!isabus) {
  83        return;
  84    }
  85
  86    /* This device has:
  87       2 82C59 (irq)
  88       1 82C54 (pit)
  89       2 82C37 (dma)
  90       NMI
  91       Utility Bus Support Registers
  92
  93       All devices accept byte access only, except timer
  94     */
  95
  96    /* 2 82C59 (irq) */
  97    s->isa_irqs_in = i8259_init(isabus,
  98                                qemu_allocate_irq(i82378_request_out0_irq,
  99                                                  s, 0));
 100    isa_bus_register_input_irqs(isabus, s->isa_irqs_in);
 101
 102    /* 1 82C54 (pit) */
 103    pit = i8254_pit_init(isabus, 0x40, 0, NULL);
 104
 105    /* speaker */
 106    pcspk_init(isa_new(TYPE_PC_SPEAKER), isabus, pit);
 107
 108    /* 2 82C37 (dma) */
 109    isa_create_simple(isabus, "i82374");
 110}
 111
 112static void i82378_init(Object *obj)
 113{
 114    DeviceState *dev = DEVICE(obj);
 115    I82378State *s = I82378(obj);
 116
 117    qdev_init_gpio_out(dev, &s->cpu_intr, 1);
 118    qdev_init_gpio_in(dev, i82378_request_pic_irq, 16);
 119}
 120
 121static void i82378_class_init(ObjectClass *klass, void *data)
 122{
 123    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 124    DeviceClass *dc = DEVICE_CLASS(klass);
 125
 126    k->realize = i82378_realize;
 127    k->vendor_id = PCI_VENDOR_ID_INTEL;
 128    k->device_id = PCI_DEVICE_ID_INTEL_82378;
 129    k->revision = 0x03;
 130    k->class_id = PCI_CLASS_BRIDGE_ISA;
 131    dc->vmsd = &vmstate_i82378;
 132    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 133}
 134
 135static const TypeInfo i82378_type_info = {
 136    .name = TYPE_I82378,
 137    .parent = TYPE_PCI_DEVICE,
 138    .instance_size = sizeof(I82378State),
 139    .instance_init = i82378_init,
 140    .class_init = i82378_class_init,
 141    .interfaces = (InterfaceInfo[]) {
 142        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
 143        { },
 144    },
 145};
 146
 147static void i82378_register_types(void)
 148{
 149    type_register_static(&i82378_type_info);
 150}
 151
 152type_init(i82378_register_types)
 153