LXR qemu/hw/misc/omap

   1/*
   2 * TI OMAP TEST-Chip-level TAP emulation.
   3 *
   4 * Copyright (C) 2007-2008 Nokia Corporation
   5 * Written by Andrzej Zaborowski <andrew@openedhand.com>
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 or
  10 * (at your option) any later version of the License.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License along
  18 * with this program; if not, see <http://www.gnu.org/licenses/>.
  19 */
  20
  21#include "qemu/osdep.h"
  22#include "hw/hw.h"
  23#include "hw/arm/omap.h"
  24
  25/* TEST-Chip-level TAP */
  26static uint64_t omap_tap_read(void *opaque, hwaddr addr, unsigned size)
  27{
  28    struct omap_mpu_state_s *s = opaque;
  29
  30    if (size != 4) {
  31        return omap_badwidth_read32(opaque, addr);
  32    }
  33
  34    switch (addr) {
  35    case 0x204: /* IDCODE_reg */
  36        switch (s->mpu_model) {
  37        case omap2420:
  38        case omap2422:
  39        case omap2423:
  40            return 0x5b5d902f;  /* ES 2.2 */
  41        case omap2430:
  42            return 0x5b68a02f;  /* ES 2.2 */
  43        case omap3430:
  44            return 0x1b7ae02f;  /* ES 2 */
  45        default:
  46            hw_error("%s: Bad mpu model\n", __func__);
  47        }
  48
  49    case 0x208: /* PRODUCTION_ID_reg for OMAP2 */
  50    case 0x210: /* PRODUCTION_ID_reg for OMAP3 */
  51        switch (s->mpu_model) {
  52        case omap2420:
  53            return 0x000254f0;  /* POP ESHS2.1.1 in N91/93/95, ES2 in N800 */
  54        case omap2422:
  55            return 0x000400f0;
  56        case omap2423:
  57            return 0x000800f0;
  58        case omap2430:
  59            return 0x000000f0;
  60        case omap3430:
  61            return 0x000000f0;
  62        default:
  63            hw_error("%s: Bad mpu model\n", __func__);
  64        }
  65
  66    case 0x20c:
  67        switch (s->mpu_model) {
  68        case omap2420:
  69        case omap2422:
  70        case omap2423:
  71            return 0xcafeb5d9;  /* ES 2.2 */
  72        case omap2430:
  73            return 0xcafeb68a;  /* ES 2.2 */
  74        case omap3430:
  75            return 0xcafeb7ae;  /* ES 2 */
  76        default:
  77            hw_error("%s: Bad mpu model\n", __func__);
  78        }
  79
  80    case 0x218: /* DIE_ID_reg */
  81        return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
  82    case 0x21c: /* DIE_ID_reg */
  83        return 0x54 << 24;
  84    case 0x220: /* DIE_ID_reg */
  85        return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
  86    case 0x224: /* DIE_ID_reg */
  87        return ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
  88    }
  89
  90    OMAP_BAD_REG(addr);
  91    return 0;
  92}
  93
  94static void omap_tap_write(void *opaque, hwaddr addr,
  95                           uint64_t value, unsigned size)
  96{
  97    if (size != 4) {
  98        omap_badwidth_write32(opaque, addr, value);
  99        return;
 100    }
 101
 102    OMAP_BAD_REG(addr);
 103}
 104
 105static const MemoryRegionOps omap_tap_ops = {
 106    .read = omap_tap_read,
 107    .write = omap_tap_write,
 108    .endianness = DEVICE_NATIVE_ENDIAN,
 109};
 110
 111void omap_tap_init(struct omap_target_agent_s *ta,
 112                struct omap_mpu_state_s *mpu)
 113{
 114    memory_region_init_io(&mpu->tap_iomem, NULL, &omap_tap_ops, mpu, "omap.tap",
 115                          omap_l4_region_size(ta, 0));
 116    omap_l4_attach(ta, 0, &mpu->tap_iomem);
 117}
 118