LXR qemu/target/riscv/cpu

   1#ifndef TARGET_RISCV_CPU_USER_H
   2#define TARGET_RISCV_CPU_USER_H
   3
   4#define xRA 1   /* return address (aka link register) */
   5#define xSP 2   /* stack pointer */
   6#define xGP 3   /* global pointer */
   7#define xTP 4   /* thread pointer */
   8
   9#define xA0 10  /* gpr[10-17] are syscall arguments */
  10#define xA1 11
  11#define xA2 12
  12#define xA3 13
  13#define xA4 14
  14#define xA5 15
  15#define xA6 16
  16#define xA7 17  /* syscall number for RVI ABI */
  17#define xT0 5   /* syscall number for RVE ABI */
  18
  19#endif
  20