1#ifndef QEMU_SMBIOS_H
2#define QEMU_SMBIOS_H
3
4#include "qapi/qapi-types-machine.h"
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19
20#define SMBIOS_MAX_TYPE 127
21#define offsetofend(TYPE, MEMBER) \
22 (offsetof(TYPE, MEMBER) + sizeof_field(TYPE, MEMBER))
23
24
25struct smbios_phys_mem_area {
26 uint64_t address;
27 uint64_t length;
28};
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41
42struct smbios_21_entry_point {
43 uint8_t anchor_string[4];
44 uint8_t checksum;
45 uint8_t length;
46 uint8_t smbios_major_version;
47 uint8_t smbios_minor_version;
48 uint16_t max_structure_size;
49 uint8_t entry_point_revision;
50 uint8_t formatted_area[5];
51 uint8_t intermediate_anchor_string[5];
52 uint8_t intermediate_checksum;
53 uint16_t structure_table_length;
54 uint32_t structure_table_address;
55 uint16_t number_of_structures;
56 uint8_t smbios_bcd_revision;
57} QEMU_PACKED;
58
59
60
61
62
63struct smbios_30_entry_point {
64 uint8_t anchor_string[5];
65 uint8_t checksum;
66 uint8_t length;
67 uint8_t smbios_major_version;
68 uint8_t smbios_minor_version;
69 uint8_t smbios_doc_rev;
70 uint8_t entry_point_revision;
71 uint8_t reserved;
72 uint32_t structure_table_max_size;
73 uint64_t structure_table_address;
74} QEMU_PACKED;
75
76typedef union {
77 struct smbios_21_entry_point ep21;
78 struct smbios_30_entry_point ep30;
79} QEMU_PACKED SmbiosEntryPoint;
80
81
82struct smbios_structure_header {
83 uint8_t type;
84 uint8_t length;
85 uint16_t handle;
86} QEMU_PACKED;
87
88
89struct smbios_type_0 {
90 struct smbios_structure_header header;
91 uint8_t vendor_str;
92 uint8_t bios_version_str;
93 uint16_t bios_starting_address_segment;
94 uint8_t bios_release_date_str;
95 uint8_t bios_rom_size;
96 uint64_t bios_characteristics;
97 uint8_t bios_characteristics_extension_bytes[2];
98 uint8_t system_bios_major_release;
99 uint8_t system_bios_minor_release;
100 uint8_t embedded_controller_major_release;
101 uint8_t embedded_controller_minor_release;
102} QEMU_PACKED;
103
104
105
106
107struct smbios_uuid {
108 uint32_t time_low;
109 uint16_t time_mid;
110 uint16_t time_hi_and_version;
111 uint8_t clock_seq_hi_and_reserved;
112 uint8_t clock_seq_low;
113 uint8_t node[6];
114} QEMU_PACKED;
115
116
117struct smbios_type_1 {
118 struct smbios_structure_header header;
119 uint8_t manufacturer_str;
120 uint8_t product_name_str;
121 uint8_t version_str;
122 uint8_t serial_number_str;
123 struct smbios_uuid uuid;
124 uint8_t wake_up_type;
125 uint8_t sku_number_str;
126 uint8_t family_str;
127} QEMU_PACKED;
128
129
130struct smbios_type_2 {
131 struct smbios_structure_header header;
132 uint8_t manufacturer_str;
133 uint8_t product_str;
134 uint8_t version_str;
135 uint8_t serial_number_str;
136 uint8_t asset_tag_number_str;
137 uint8_t feature_flags;
138 uint8_t location_str;
139 uint16_t chassis_handle;
140 uint8_t board_type;
141 uint8_t contained_element_count;
142
143} QEMU_PACKED;
144
145
146struct smbios_type_3 {
147 struct smbios_structure_header header;
148 uint8_t manufacturer_str;
149 uint8_t type;
150 uint8_t version_str;
151 uint8_t serial_number_str;
152 uint8_t asset_tag_number_str;
153 uint8_t boot_up_state;
154 uint8_t power_supply_state;
155 uint8_t thermal_state;
156 uint8_t security_status;
157 uint32_t oem_defined;
158 uint8_t height;
159 uint8_t number_of_power_cords;
160 uint8_t contained_element_count;
161 uint8_t contained_element_record_length;
162 uint8_t sku_number_str;
163
164} QEMU_PACKED;
165
166
167struct smbios_type_4 {
168 struct smbios_structure_header header;
169 uint8_t socket_designation_str;
170 uint8_t processor_type;
171 uint8_t processor_family;
172 uint8_t processor_manufacturer_str;
173 uint32_t processor_id[2];
174 uint8_t processor_version_str;
175 uint8_t voltage;
176 uint16_t external_clock;
177 uint16_t max_speed;
178 uint16_t current_speed;
179 uint8_t status;
180 uint8_t processor_upgrade;
181 uint16_t l1_cache_handle;
182 uint16_t l2_cache_handle;
183 uint16_t l3_cache_handle;
184 uint8_t serial_number_str;
185 uint8_t asset_tag_number_str;
186 uint8_t part_number_str;
187 uint8_t core_count;
188 uint8_t core_enabled;
189 uint8_t thread_count;
190 uint16_t processor_characteristics;
191 uint16_t processor_family2;
192
193 uint16_t core_count2;
194 uint16_t core_enabled2;
195 uint16_t thread_count2;
196} QEMU_PACKED;
197
198typedef enum smbios_type_4_len_ver {
199 SMBIOS_TYPE_4_LEN_V28 = offsetofend(struct smbios_type_4,
200 processor_family2),
201 SMBIOS_TYPE_4_LEN_V30 = offsetofend(struct smbios_type_4, thread_count2),
202} smbios_type_4_len_ver;
203
204
205struct smbios_type_8 {
206 struct smbios_structure_header header;
207 uint8_t internal_reference_str;
208 uint8_t internal_connector_type;
209 uint8_t external_reference_str;
210 uint8_t external_connector_type;
211 uint8_t port_type;
212} QEMU_PACKED;
213
214
215struct smbios_type_11 {
216 struct smbios_structure_header header;
217 uint8_t count;
218} QEMU_PACKED;
219
220
221struct smbios_type_16 {
222 struct smbios_structure_header header;
223 uint8_t location;
224 uint8_t use;
225 uint8_t error_correction;
226 uint32_t maximum_capacity;
227 uint16_t memory_error_information_handle;
228 uint16_t number_of_memory_devices;
229 uint64_t extended_maximum_capacity;
230} QEMU_PACKED;
231
232
233struct smbios_type_17 {
234 struct smbios_structure_header header;
235 uint16_t physical_memory_array_handle;
236 uint16_t memory_error_information_handle;
237 uint16_t total_width;
238 uint16_t data_width;
239 uint16_t size;
240 uint8_t form_factor;
241 uint8_t device_set;
242 uint8_t device_locator_str;
243 uint8_t bank_locator_str;
244 uint8_t memory_type;
245 uint16_t type_detail;
246 uint16_t speed;
247 uint8_t manufacturer_str;
248 uint8_t serial_number_str;
249 uint8_t asset_tag_number_str;
250 uint8_t part_number_str;
251 uint8_t attributes;
252 uint32_t extended_size;
253 uint16_t configured_clock_speed;
254 uint16_t minimum_voltage;
255 uint16_t maximum_voltage;
256 uint16_t configured_voltage;
257} QEMU_PACKED;
258
259
260struct smbios_type_19 {
261 struct smbios_structure_header header;
262 uint32_t starting_address;
263 uint32_t ending_address;
264 uint16_t memory_array_handle;
265 uint8_t partition_width;
266 uint64_t extended_starting_address;
267 uint64_t extended_ending_address;
268} QEMU_PACKED;
269
270
271struct smbios_type_32 {
272 struct smbios_structure_header header;
273 uint8_t reserved[6];
274 uint8_t boot_status;
275} QEMU_PACKED;
276
277
278struct smbios_type_41 {
279 struct smbios_structure_header header;
280 uint8_t reference_designation_str;
281 uint8_t device_type;
282 uint8_t device_type_instance;
283 uint16_t segment_group_number;
284 uint8_t bus_number;
285 uint8_t device_number;
286} QEMU_PACKED;
287
288
289struct smbios_type_127 {
290 struct smbios_structure_header header;
291} QEMU_PACKED;
292
293void smbios_entry_add(QemuOpts *opts, Error **errp);
294void smbios_set_cpuid(uint32_t version, uint32_t features);
295void smbios_set_defaults(const char *manufacturer, const char *product,
296 const char *version, bool legacy_mode,
297 bool uuid_encoded, SmbiosEntryPointType ep_type);
298uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length);
299void smbios_get_tables(MachineState *ms,
300 const struct smbios_phys_mem_area *mem_array,
301 const unsigned int mem_array_size,
302 uint8_t **tables, size_t *tables_len,
303 uint8_t **anchor, size_t *anchor_len,
304 Error **errp);
305#endif
306