LXR qemu/target/mips/sysemu/addr.c

   1/*
   2 * QEMU MIPS address translation support
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a copy
   5 * of this software and associated documentation files (the "Software"), to deal
   6 * in the Software without restriction, including without limitation the rights
   7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   8 * copies of the Software, and to permit persons to whom the Software is
   9 * furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  20 * THE SOFTWARE.
  21 */
  22
  23#include "qemu/osdep.h"
  24#include "cpu.h"
  25
  26uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr)
  27{
  28    return addr & 0x1fffffffll;
  29}
  30
  31uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr)
  32{
  33    return addr | ~0x7fffffffll;
  34}
  35
  36uint64_t cpu_mips_kseg1_to_phys(void *opaque, uint64_t addr)
  37{
  38    return addr & 0x1fffffffll;
  39}
  40
  41uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr)
  42{
  43    return (addr & 0x1fffffffll) | 0xffffffffa0000000ll;
  44}
  45