qemu/include/hw/input/i8042.h
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   1/*
   2 * QEMU PS/2 Controller
   3 *
   4 * Copyright (c) 2003 Fabrice Bellard
   5 *
   6 * SPDX-License-Identifier: MIT
   7 */
   8#ifndef HW_INPUT_I8042_H
   9#define HW_INPUT_I8042_H
  10
  11#include "hw/isa/isa.h"
  12#include "hw/sysbus.h"
  13#include "hw/input/ps2.h"
  14#include "qom/object.h"
  15
  16#define I8042_KBD_IRQ      0
  17#define I8042_MOUSE_IRQ    1
  18
  19typedef struct KBDState {
  20    uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
  21    uint8_t status;
  22    uint8_t mode;
  23    uint8_t outport;
  24    uint32_t migration_flags;
  25    uint32_t obsrc;
  26    bool outport_present;
  27    bool extended_state;
  28    bool extended_state_loaded;
  29    /* Bitmask of devices with data available.  */
  30    uint8_t pending;
  31    uint8_t obdata;
  32    uint8_t cbdata;
  33    uint8_t pending_tmp;
  34    PS2KbdState ps2kbd;
  35    PS2MouseState ps2mouse;
  36    QEMUTimer *throttle_timer;
  37
  38    qemu_irq irqs[2];
  39    qemu_irq a20_out;
  40    hwaddr mask;
  41} KBDState;
  42
  43/*
  44 * QEMU interface:
  45 * + Named GPIO input "ps2-kbd-input-irq": set to 1 if the downstream PS2
  46 *   keyboard device has asserted its irq
  47 * + Named GPIO input "ps2-mouse-input-irq": set to 1 if the downstream PS2
  48 *   mouse device has asserted its irq
  49 * + Named GPIO output "a20": A20 line for x86 PCs
  50 * + Unnamed GPIO output 0-1: i8042 output irqs for keyboard (0) or mouse (1)
  51 */
  52
  53#define TYPE_I8042 "i8042"
  54OBJECT_DECLARE_SIMPLE_TYPE(ISAKBDState, I8042)
  55
  56struct ISAKBDState {
  57    ISADevice parent_obj;
  58
  59    KBDState kbd;
  60    bool kbd_throttle;
  61    MemoryRegion io[2];
  62    uint8_t kbd_irq;
  63    uint8_t mouse_irq;
  64};
  65
  66/*
  67 * QEMU interface:
  68 * + sysbus MMIO region 0: MemoryRegion defining the command/status/data
  69 *   registers (access determined by mask property and access type)
  70 * + Named GPIO input "ps2-kbd-input-irq": set to 1 if the downstream PS2
  71 *   keyboard device has asserted its irq
  72 * + Named GPIO input "ps2-mouse-input-irq": set to 1 if the downstream PS2
  73 *   mouse device has asserted its irq
  74 * + Unnamed GPIO output 0-1: i8042 output irqs for keyboard (0) or mouse (1)
  75 */
  76
  77#define TYPE_I8042_MMIO "i8042-mmio"
  78OBJECT_DECLARE_SIMPLE_TYPE(MMIOKBDState, I8042_MMIO)
  79
  80struct MMIOKBDState {
  81    SysBusDevice parent_obj;
  82
  83    KBDState kbd;
  84    uint32_t size;
  85    MemoryRegion region;
  86};
  87
  88#define I8042_A20_LINE "a20"
  89
  90
  91void i8042_isa_mouse_fake_event(ISAKBDState *isa);
  92void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
  93
  94static inline bool i8042_present(void)
  95{
  96    bool amb = false;
  97    return object_resolve_path_type("", TYPE_I8042, &amb) || amb;
  98}
  99
 100/*
 101 * ACPI v2, Table 5-10 - Fixed ACPI Description Table Boot Architecture
 102 * Flags, bit offset 1 - 8042.
 103 */
 104static inline uint16_t iapc_boot_arch_8042(void)
 105{
 106    return i8042_present() ? 0x1 << 1 : 0x0 ;
 107}
 108
 109#endif /* HW_INPUT_I8042_H */
 110