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31#include "qemu/osdep.h"
32#include "qemu/units.h"
33#include "hw/char/parallel-isa.h"
34#include "hw/loader.h"
35#include "hw/i2c/smbus_eeprom.h"
36#include "hw/rtc/mc146818rtc.h"
37#include "sysemu/kvm.h"
38#include "hw/kvm/clock.h"
39#include "hw/pci-host/q35.h"
40#include "hw/pci/pcie_port.h"
41#include "hw/qdev-properties.h"
42#include "hw/i386/x86.h"
43#include "hw/i386/pc.h"
44#include "hw/i386/amd_iommu.h"
45#include "hw/i386/intel_iommu.h"
46#include "hw/display/ramfb.h"
47#include "hw/firmware/smbios.h"
48#include "hw/ide/pci.h"
49#include "hw/ide/ahci.h"
50#include "hw/intc/ioapic.h"
51#include "hw/southbridge/ich9.h"
52#include "hw/usb.h"
53#include "hw/usb/hcd-uhci.h"
54#include "qapi/error.h"
55#include "qemu/error-report.h"
56#include "sysemu/numa.h"
57#include "hw/hyperv/vmbus-bridge.h"
58#include "hw/mem/nvdimm.h"
59#include "hw/i386/acpi-build.h"
60
61
62#define MAX_SATA_PORTS 6
63
64struct ehci_companions {
65 const char *name;
66 int func;
67 int port;
68};
69
70static const struct ehci_companions ich9_1d[] = {
71 { .name = TYPE_ICH9_USB_UHCI(1), .func = 0, .port = 0 },
72 { .name = TYPE_ICH9_USB_UHCI(2), .func = 1, .port = 2 },
73 { .name = TYPE_ICH9_USB_UHCI(3), .func = 2, .port = 4 },
74};
75
76static const struct ehci_companions ich9_1a[] = {
77 { .name = TYPE_ICH9_USB_UHCI(4), .func = 0, .port = 0 },
78 { .name = TYPE_ICH9_USB_UHCI(5), .func = 1, .port = 2 },
79 { .name = TYPE_ICH9_USB_UHCI(6), .func = 2, .port = 4 },
80};
81
82static int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
83{
84 const struct ehci_companions *comp;
85 PCIDevice *ehci, *uhci;
86 BusState *usbbus;
87 const char *name;
88 int i;
89
90 switch (slot) {
91 case 0x1d:
92 name = "ich9-usb-ehci1";
93 comp = ich9_1d;
94 break;
95 case 0x1a:
96 name = "ich9-usb-ehci2";
97 comp = ich9_1a;
98 break;
99 default:
100 return -1;
101 }
102
103 ehci = pci_new_multifunction(PCI_DEVFN(slot, 7), name);
104 pci_realize_and_unref(ehci, bus, &error_fatal);
105 usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
106
107 for (i = 0; i < 3; i++) {
108 uhci = pci_new_multifunction(PCI_DEVFN(slot, comp[i].func),
109 comp[i].name);
110 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
111 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
112 pci_realize_and_unref(uhci, bus, &error_fatal);
113 }
114 return 0;
115}
116
117
118static void pc_q35_init(MachineState *machine)
119{
120 PCMachineState *pcms = PC_MACHINE(machine);
121 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
122 X86MachineState *x86ms = X86_MACHINE(machine);
123 Object *phb;
124 PCIBus *host_bus;
125 PCIDevice *lpc;
126 DeviceState *lpc_dev;
127 BusState *idebus[MAX_SATA_PORTS];
128 ISADevice *rtc_state;
129 MemoryRegion *system_memory = get_system_memory();
130 MemoryRegion *system_io = get_system_io();
131 MemoryRegion *pci_memory;
132 MemoryRegion *rom_memory;
133 GSIState *gsi_state;
134 ISABus *isa_bus;
135 int i;
136 PCIDevice *ahci;
137 ram_addr_t lowmem;
138 DriveInfo *hd[MAX_SATA_PORTS];
139 MachineClass *mc = MACHINE_GET_CLASS(machine);
140 bool acpi_pcihp;
141 bool keep_pci_slot_hpc;
142 uint64_t pci_hole64_size = 0;
143
144
145
146
147
148
149
150
151 if (machine->ram_size >= 0xb0000000) {
152 lowmem = 0x80000000;
153 } else {
154 lowmem = 0xb0000000;
155 }
156
157
158
159
160 if (!pcms->max_ram_below_4g) {
161 pcms->max_ram_below_4g = 4 * GiB;
162 }
163 if (lowmem > pcms->max_ram_below_4g) {
164 lowmem = pcms->max_ram_below_4g;
165 if (machine->ram_size - lowmem > lowmem &&
166 lowmem & (1 * GiB - 1)) {
167 warn_report("There is possibly poor performance as the ram size "
168 " (0x%" PRIx64 ") is more then twice the size of"
169 " max-ram-below-4g (%"PRIu64") and"
170 " max-ram-below-4g is not a multiple of 1G.",
171 (uint64_t)machine->ram_size, pcms->max_ram_below_4g);
172 }
173 }
174
175 if (machine->ram_size >= lowmem) {
176 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
177 x86ms->below_4g_mem_size = lowmem;
178 } else {
179 x86ms->above_4g_mem_size = 0;
180 x86ms->below_4g_mem_size = machine->ram_size;
181 }
182
183 pc_machine_init_sgx_epc(pcms);
184 x86_cpus_init(x86ms, pcmc->default_cpu_version);
185
186 kvmclock_create(pcmc->kvmclock_create_always);
187
188
189 if (pcmc->pci_enabled) {
190 pci_memory = g_new(MemoryRegion, 1);
191 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
192 rom_memory = pci_memory;
193 } else {
194 pci_memory = NULL;
195 rom_memory = system_memory;
196 }
197
198 pc_guest_info_init(pcms);
199
200 if (pcmc->smbios_defaults) {
201
202 smbios_set_defaults("QEMU", mc->desc,
203 mc->name, pcmc->smbios_legacy_mode,
204 pcmc->smbios_uuid_encoded,
205 pcms->smbios_entry_point_type);
206 }
207
208
209 phb = OBJECT(qdev_new(TYPE_Q35_HOST_DEVICE));
210
211 if (pcmc->pci_enabled) {
212 pci_hole64_size = object_property_get_uint(phb,
213 PCI_HOST_PROP_PCI_HOLE64_SIZE,
214 &error_abort);
215 }
216
217
218 pc_memory_init(pcms, system_memory, rom_memory, pci_hole64_size);
219
220 object_property_add_child(OBJECT(machine), "q35", phb);
221 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM,
222 OBJECT(machine->ram), NULL);
223 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM,
224 OBJECT(pci_memory), NULL);
225 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM,
226 OBJECT(system_memory), NULL);
227 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM,
228 OBJECT(system_io), NULL);
229 object_property_set_int(phb, PCI_HOST_BELOW_4G_MEM_SIZE,
230 x86ms->below_4g_mem_size, NULL);
231 object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE,
232 x86ms->above_4g_mem_size, NULL);
233 object_property_set_bool(phb, PCI_HOST_BYPASS_IOMMU,
234 pcms->default_bus_bypass_iommu, NULL);
235 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
236
237
238 host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0"));
239 pcms->bus = host_bus;
240
241
242 lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC),
243 TYPE_ICH9_LPC_DEVICE);
244 qdev_prop_set_bit(DEVICE(lpc), "smm-enabled",
245 x86_machine_is_smm_enabled(x86ms));
246 pci_realize_and_unref(lpc, host_bus, &error_fatal);
247
248 rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc"));
249
250 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
251 TYPE_HOTPLUG_HANDLER,
252 (Object **)&x86ms->acpi_dev,
253 object_property_allow_set_link,
254 OBJ_PROP_LINK_STRONG);
255 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
256 OBJECT(lpc), &error_abort);
257
258 acpi_pcihp = object_property_get_bool(OBJECT(lpc),
259 ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
260 NULL);
261
262 keep_pci_slot_hpc = object_property_get_bool(OBJECT(lpc),
263 "x-keep-pci-slot-hpc",
264 NULL);
265
266 if (!keep_pci_slot_hpc && acpi_pcihp) {
267 object_register_sugar_prop(TYPE_PCIE_SLOT,
268 "x-do-not-expose-native-hotplug-cap",
269 "true", true);
270 }
271
272
273 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
274
275 lpc_dev = DEVICE(lpc);
276 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
277 qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
278 }
279 isa_bus = ISA_BUS(qdev_get_child_bus(lpc_dev, "isa.0"));
280
281 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
282 pc_i8259_create(isa_bus, gsi_state->i8259_irq);
283 }
284
285 if (pcmc->pci_enabled) {
286 ioapic_init_gsi(gsi_state, "q35");
287 }
288
289 if (tcg_enabled()) {
290 x86_register_ferr_irq(x86ms->gsi[13]);
291 }
292
293 assert(pcms->vmport != ON_OFF_AUTO__MAX);
294 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
295 pcms->vmport = ON_OFF_AUTO_ON;
296 }
297
298
299 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, !mc->no_floppy,
300 0xff0104);
301
302 if (pcms->sata_enabled) {
303
304 ahci = pci_create_simple_multifunction(host_bus,
305 PCI_DEVFN(ICH9_SATA1_DEV,
306 ICH9_SATA1_FUNC),
307 "ich9-ahci");
308 idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
309 idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
310 g_assert(MAX_SATA_PORTS == ahci_get_num_ports(ahci));
311 ide_drive_get(hd, ahci_get_num_ports(ahci));
312 ahci_ide_create_devs(ahci, hd);
313 } else {
314 idebus[0] = idebus[1] = NULL;
315 }
316
317 if (machine_usb(machine)) {
318
319 ehci_create_ich9_with_companions(host_bus, 0x1d);
320 }
321
322 if (pcms->smbus_enabled) {
323 PCIDevice *smb;
324
325
326 smb = pci_create_simple_multifunction(host_bus,
327 PCI_DEVFN(ICH9_SMB_DEV,
328 ICH9_SMB_FUNC),
329 TYPE_ICH9_SMB_DEVICE);
330 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(smb), "i2c"));
331
332 smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
333 }
334
335 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
336
337
338 pc_vga_init(isa_bus, host_bus);
339 pc_nic_init(pcmc, isa_bus, host_bus);
340
341 if (machine->nvdimms_state->is_enabled) {
342 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
343 x86_nvdimm_acpi_dsmio,
344 x86ms->fw_cfg, OBJECT(pcms));
345 }
346}
347
348#define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
349 static void pc_init_##suffix(MachineState *machine) \
350 { \
351 void (*compat)(MachineState *m) = (compatfn); \
352 if (compat) { \
353 compat(machine); \
354 } \
355 pc_q35_init(machine); \
356 } \
357 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
358
359
360static void pc_q35_machine_options(MachineClass *m)
361{
362 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
363 pcmc->pci_root_uid = 0;
364 pcmc->default_cpu_version = 1;
365
366 m->family = "pc_q35";
367 m->desc = "Standard PC (Q35 + ICH9, 2009)";
368 m->units_per_default_bus = 1;
369 m->default_machine_opts = "firmware=bios-256k.bin";
370 m->default_display = "std";
371 m->default_nic = "e1000e";
372 m->default_kernel_irqchip_split = false;
373 m->no_floppy = 1;
374 m->max_cpus = 1024;
375 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
376 machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE);
377 machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE);
378 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
379 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
380}
381
382static void pc_q35_8_1_machine_options(MachineClass *m)
383{
384 pc_q35_machine_options(m);
385 m->alias = "q35";
386}
387
388DEFINE_Q35_MACHINE(v8_1, "pc-q35-8.1", NULL,
389 pc_q35_8_1_machine_options);
390
391static void pc_q35_8_0_machine_options(MachineClass *m)
392{
393 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
394
395 pc_q35_8_1_machine_options(m);
396 m->alias = NULL;
397 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len);
398 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len);
399
400
401 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32;
402 m->max_cpus = 288;
403}
404
405DEFINE_Q35_MACHINE(v8_0, "pc-q35-8.0", NULL,
406 pc_q35_8_0_machine_options);
407
408static void pc_q35_7_2_machine_options(MachineClass *m)
409{
410 pc_q35_8_0_machine_options(m);
411 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len);
412 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len);
413}
414
415DEFINE_Q35_MACHINE(v7_2, "pc-q35-7.2", NULL,
416 pc_q35_7_2_machine_options);
417
418static void pc_q35_7_1_machine_options(MachineClass *m)
419{
420 pc_q35_7_2_machine_options(m);
421 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len);
422 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len);
423}
424
425DEFINE_Q35_MACHINE(v7_1, "pc-q35-7.1", NULL,
426 pc_q35_7_1_machine_options);
427
428static void pc_q35_7_0_machine_options(MachineClass *m)
429{
430 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
431 pc_q35_7_1_machine_options(m);
432 pcmc->enforce_amd_1tb_hole = false;
433 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len);
434 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len);
435}
436
437DEFINE_Q35_MACHINE(v7_0, "pc-q35-7.0", NULL,
438 pc_q35_7_0_machine_options);
439
440static void pc_q35_6_2_machine_options(MachineClass *m)
441{
442 pc_q35_7_0_machine_options(m);
443 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len);
444 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len);
445}
446
447DEFINE_Q35_MACHINE(v6_2, "pc-q35-6.2", NULL,
448 pc_q35_6_2_machine_options);
449
450static void pc_q35_6_1_machine_options(MachineClass *m)
451{
452 pc_q35_6_2_machine_options(m);
453 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len);
454 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len);
455 m->smp_props.prefer_sockets = true;
456}
457
458DEFINE_Q35_MACHINE(v6_1, "pc-q35-6.1", NULL,
459 pc_q35_6_1_machine_options);
460
461static void pc_q35_6_0_machine_options(MachineClass *m)
462{
463 pc_q35_6_1_machine_options(m);
464 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len);
465 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len);
466}
467
468DEFINE_Q35_MACHINE(v6_0, "pc-q35-6.0", NULL,
469 pc_q35_6_0_machine_options);
470
471static void pc_q35_5_2_machine_options(MachineClass *m)
472{
473 pc_q35_6_0_machine_options(m);
474 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
475 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
476}
477
478DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL,
479 pc_q35_5_2_machine_options);
480
481static void pc_q35_5_1_machine_options(MachineClass *m)
482{
483 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
484
485 pc_q35_5_2_machine_options(m);
486 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
487 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
488 pcmc->kvmclock_create_always = false;
489 pcmc->pci_root_uid = 1;
490}
491
492DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL,
493 pc_q35_5_1_machine_options);
494
495static void pc_q35_5_0_machine_options(MachineClass *m)
496{
497 pc_q35_5_1_machine_options(m);
498 m->numa_mem_supported = true;
499 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
500 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
501 m->auto_enable_numa_with_memdev = false;
502}
503
504DEFINE_Q35_MACHINE(v5_0, "pc-q35-5.0", NULL,
505 pc_q35_5_0_machine_options);
506
507static void pc_q35_4_2_machine_options(MachineClass *m)
508{
509 pc_q35_5_0_machine_options(m);
510 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
511 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
512}
513
514DEFINE_Q35_MACHINE(v4_2, "pc-q35-4.2", NULL,
515 pc_q35_4_2_machine_options);
516
517static void pc_q35_4_1_machine_options(MachineClass *m)
518{
519 pc_q35_4_2_machine_options(m);
520 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
521 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
522}
523
524DEFINE_Q35_MACHINE(v4_1, "pc-q35-4.1", NULL,
525 pc_q35_4_1_machine_options);
526
527static void pc_q35_4_0_1_machine_options(MachineClass *m)
528{
529 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
530 pc_q35_4_1_machine_options(m);
531 pcmc->default_cpu_version = CPU_VERSION_LEGACY;
532
533
534
535
536
537 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
538 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
539}
540
541DEFINE_Q35_MACHINE(v4_0_1, "pc-q35-4.0.1", NULL,
542 pc_q35_4_0_1_machine_options);
543
544static void pc_q35_4_0_machine_options(MachineClass *m)
545{
546 pc_q35_4_0_1_machine_options(m);
547 m->default_kernel_irqchip_split = true;
548
549}
550
551DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL,
552 pc_q35_4_0_machine_options);
553
554static void pc_q35_3_1_machine_options(MachineClass *m)
555{
556 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
557
558 pc_q35_4_0_machine_options(m);
559 m->default_kernel_irqchip_split = false;
560 m->smbus_no_migration_support = true;
561 pcmc->pvh_enabled = false;
562 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
563 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
564}
565
566DEFINE_Q35_MACHINE(v3_1, "pc-q35-3.1", NULL,
567 pc_q35_3_1_machine_options);
568
569static void pc_q35_3_0_machine_options(MachineClass *m)
570{
571 pc_q35_3_1_machine_options(m);
572 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
573 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
574}
575
576DEFINE_Q35_MACHINE(v3_0, "pc-q35-3.0", NULL,
577 pc_q35_3_0_machine_options);
578
579static void pc_q35_2_12_machine_options(MachineClass *m)
580{
581 pc_q35_3_0_machine_options(m);
582 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
583 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
584}
585
586DEFINE_Q35_MACHINE(v2_12, "pc-q35-2.12", NULL,
587 pc_q35_2_12_machine_options);
588
589static void pc_q35_2_11_machine_options(MachineClass *m)
590{
591 pc_q35_2_12_machine_options(m);
592 m->default_nic = "e1000";
593 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
594 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
595}
596
597DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL,
598 pc_q35_2_11_machine_options);
599
600static void pc_q35_2_10_machine_options(MachineClass *m)
601{
602 pc_q35_2_11_machine_options(m);
603 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
604 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
605 m->auto_enable_numa_with_memhp = false;
606}
607
608DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL,
609 pc_q35_2_10_machine_options);
610
611static void pc_q35_2_9_machine_options(MachineClass *m)
612{
613 pc_q35_2_10_machine_options(m);
614 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
615 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
616}
617
618DEFINE_Q35_MACHINE(v2_9, "pc-q35-2.9", NULL,
619 pc_q35_2_9_machine_options);
620
621static void pc_q35_2_8_machine_options(MachineClass *m)
622{
623 pc_q35_2_9_machine_options(m);
624 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
625 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
626}
627
628DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL,
629 pc_q35_2_8_machine_options);
630
631static void pc_q35_2_7_machine_options(MachineClass *m)
632{
633 pc_q35_2_8_machine_options(m);
634 m->max_cpus = 255;
635 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
636 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
637}
638
639DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL,
640 pc_q35_2_7_machine_options);
641
642static void pc_q35_2_6_machine_options(MachineClass *m)
643{
644 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
645 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
646
647 pc_q35_2_7_machine_options(m);
648 pcmc->legacy_cpu_hotplug = true;
649 x86mc->fwcfg_dma_enabled = false;
650 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
651 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
652}
653
654DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
655 pc_q35_2_6_machine_options);
656
657static void pc_q35_2_5_machine_options(MachineClass *m)
658{
659 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
660
661 pc_q35_2_6_machine_options(m);
662 x86mc->save_tsc_khz = false;
663 m->legacy_fw_cfg_order = 1;
664 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
665 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
666}
667
668DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
669 pc_q35_2_5_machine_options);
670
671static void pc_q35_2_4_machine_options(MachineClass *m)
672{
673 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
674
675 pc_q35_2_5_machine_options(m);
676 m->hw_version = "2.4.0";
677 pcmc->broken_reserved_end = true;
678 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
679 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
680}
681
682DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
683 pc_q35_2_4_machine_options);
684
