1/* 2 * QEMU PowerMac CUDA device support 3 * 4 * Copyright (c) 2004-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26#ifndef CUDA_H 27#define CUDA_H 28 29#include "hw/input/adb.h" 30#include "hw/misc/mos6522.h" 31#include "qom/object.h" 32 33/* CUDA commands (2nd byte) */ 34#define CUDA_WARM_START 0x0 35#define CUDA_AUTOPOLL 0x1 36#define CUDA_GET_6805_ADDR 0x2 37#define CUDA_GET_TIME 0x3 38#define CUDA_GET_PRAM 0x7 39#define CUDA_SET_6805_ADDR 0x8 40#define CUDA_SET_TIME 0x9 41#define CUDA_POWERDOWN 0xa 42#define CUDA_POWERUP_TIME 0xb 43#define CUDA_SET_PRAM 0xc 44#define CUDA_MS_RESET 0xd 45#define CUDA_SEND_DFAC 0xe 46#define CUDA_BATTERY_SWAP_SENSE 0x10 47#define CUDA_RESET_SYSTEM 0x11 48#define CUDA_SET_IPL 0x12 49#define CUDA_FILE_SERVER_FLAG 0x13 50#define CUDA_SET_AUTO_RATE 0x14 51#define CUDA_GET_AUTO_RATE 0x16 52#define CUDA_SET_DEVICE_LIST 0x19 53#define CUDA_GET_DEVICE_LIST 0x1a 54#define CUDA_SET_ONE_SECOND_MODE 0x1b 55#define CUDA_SET_POWER_MESSAGES 0x21 56#define CUDA_GET_SET_IIC 0x22 57#define CUDA_WAKEUP 0x23 58#define CUDA_TIMER_TICKLE 0x24 59#define CUDA_COMBINED_FORMAT_IIC 0x25 60 61 62/* MOS6522 CUDA */ 63struct MOS6522CUDAState { 64 /*< private >*/ 65 MOS6522State parent_obj; 66}; 67 68#define TYPE_MOS6522_CUDA "mos6522-cuda" 69OBJECT_DECLARE_SIMPLE_TYPE(MOS6522CUDAState, MOS6522_CUDA) 70 71/* Cuda */ 72#define TYPE_CUDA "cuda" 73OBJECT_DECLARE_SIMPLE_TYPE(CUDAState, CUDA) 74 75struct CUDAState { 76 /*< private >*/ 77 SysBusDevice parent_obj; 78 /*< public >*/ 79 MemoryRegion mem; 80 81 ADBBusState adb_bus; 82 MOS6522CUDAState mos6522_cuda; 83 84 uint32_t tick_offset; 85 uint64_t tb_frequency; 86 87 uint8_t last_b; 88 uint8_t last_acr; 89 90 /* MacOS 9 is racy and requires a delay upon setting the SR_INT bit */ 91 uint64_t sr_delay_ns; 92 QEMUTimer *sr_delay_timer; 93 94 int data_in_size; 95 int data_in_index; 96 int data_out_index; 97 98 qemu_irq irq; 99 uint8_t data_in[128]; 100 uint8_t data_out[16]; 101}; 102 103#endif /* CUDA_H */ 104