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23#include "qemu/osdep.h"
24#include "qemu/cutils.h"
25#include "qapi/error.h"
26
27#include "exec/memory.h"
28#include "hw/acpi/acpi.h"
29#include "hw/acpi/acpi_aml_interface.h"
30#include "hw/acpi/aml-build.h"
31#include "hw/acpi/bios-linker-loader.h"
32#include "hw/acpi/generic_event_device.h"
33#include "hw/acpi/utils.h"
34#include "hw/acpi/erst.h"
35#include "hw/i386/fw_cfg.h"
36#include "hw/i386/microvm.h"
37#include "hw/pci/pci.h"
38#include "hw/pci/pcie_host.h"
39#include "hw/usb/xhci.h"
40#include "hw/virtio/virtio-mmio.h"
41#include "hw/input/i8042.h"
42
43#include "acpi-common.h"
44#include "acpi-microvm.h"
45
46#include CONFIG_DEVICES
47
48static void acpi_dsdt_add_virtio(Aml *scope,
49 MicrovmMachineState *mms)
50{
51 gchar *separator;
52 long int index;
53 BusState *bus;
54 BusChild *kid;
55
56 bus = sysbus_get_default();
57 QTAILQ_FOREACH(kid, &bus->children, sibling) {
58 DeviceState *dev = kid->child;
59 Object *obj = object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MMIO);
60
61 if (obj) {
62 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(obj);
63 VirtioBusState *mmio_virtio_bus = &mmio->bus;
64 BusState *mmio_bus = &mmio_virtio_bus->parent_obj;
65
66 if (QTAILQ_EMPTY(&mmio_bus->children)) {
67 continue;
68 }
69 separator = g_strrstr(mmio_bus->name, ".");
70 if (!separator) {
71 continue;
72 }
73 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) {
74 continue;
75 }
76
77 uint32_t irq = mms->virtio_irq_base + index;
78 hwaddr base = VIRTIO_MMIO_BASE + index * 512;
79 hwaddr size = 512;
80
81 Aml *dev = aml_device("VR%02u", (unsigned)index);
82 aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005")));
83 aml_append(dev, aml_name_decl("_UID", aml_int(index)));
84 aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
85
86 Aml *crs = aml_resource_template();
87 aml_append(crs, aml_memory32_fixed(base, size, AML_READ_WRITE));
88 aml_append(crs,
89 aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
90 AML_EXCLUSIVE, &irq, 1));
91 aml_append(dev, aml_name_decl("_CRS", crs));
92 aml_append(scope, dev);
93 }
94 }
95}
96
97static void acpi_dsdt_add_xhci(Aml *scope, MicrovmMachineState *mms)
98{
99 if (machine_usb(MACHINE(mms))) {
100 xhci_sysbus_build_aml(scope, MICROVM_XHCI_BASE, MICROVM_XHCI_IRQ);
101 }
102}
103
104static void acpi_dsdt_add_pci(Aml *scope, MicrovmMachineState *mms)
105{
106 if (mms->pcie != ON_OFF_AUTO_ON) {
107 return;
108 }
109
110 acpi_dsdt_add_gpex(scope, &mms->gpex);
111}
112
113static void
114build_dsdt_microvm(GArray *table_data, BIOSLinker *linker,
115 MicrovmMachineState *mms)
116{
117 X86MachineState *x86ms = X86_MACHINE(mms);
118 Aml *dsdt, *sb_scope, *scope, *pkg;
119 bool ambiguous;
120 Object *isabus;
121 AcpiTable table = { .sig = "DSDT", .rev = 2, .oem_id = x86ms->oem_id,
122 .oem_table_id = x86ms->oem_table_id };
123
124 isabus = object_resolve_path_type("", TYPE_ISA_BUS, &ambiguous);
125 assert(isabus);
126 assert(!ambiguous);
127
128 acpi_table_begin(&table, table_data);
129 dsdt = init_aml_allocator();
130
131 sb_scope = aml_scope("_SB");
132 fw_cfg_add_acpi_dsdt(sb_scope, x86ms->fw_cfg);
133 qbus_build_aml(BUS(isabus), sb_scope);
134 build_ged_aml(sb_scope, GED_DEVICE, x86ms->acpi_dev,
135 GED_MMIO_IRQ, AML_SYSTEM_MEMORY, GED_MMIO_BASE);
136 acpi_dsdt_add_power_button(sb_scope);
137 acpi_dsdt_add_virtio(sb_scope, mms);
138 acpi_dsdt_add_xhci(sb_scope, mms);
139 acpi_dsdt_add_pci(sb_scope, mms);
140 aml_append(dsdt, sb_scope);
141
142
143 scope = aml_scope("\\");
144 pkg = aml_package(4);
145 aml_append(pkg, aml_int(ACPI_GED_SLP_TYP_S5));
146 aml_append(pkg, aml_int(0));
147 aml_append(pkg, aml_int(0));
148 aml_append(pkg, aml_int(0));
149 aml_append(scope, aml_name_decl("_S5", pkg));
150 aml_append(dsdt, scope);
151
152
153 g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
154
155 acpi_table_end(linker, &table);
156 free_aml_allocator();
157}
158
159static void acpi_build_microvm(AcpiBuildTables *tables,
160 MicrovmMachineState *mms)
161{
162 MachineState *machine = MACHINE(mms);
163 X86MachineState *x86ms = X86_MACHINE(mms);
164 GArray *table_offsets;
165 GArray *tables_blob = tables->table_data;
166 unsigned dsdt, xsdt;
167 AcpiFadtData pmfadt = {
168
169 .rev = 5,
170 .flags = ((1 << ACPI_FADT_F_HW_REDUCED_ACPI) |
171 (1 << ACPI_FADT_F_RESET_REG_SUP)),
172
173
174 .sleep_ctl = {
175 .space_id = AML_AS_SYSTEM_MEMORY,
176 .bit_width = 8,
177 .address = GED_MMIO_BASE_REGS + ACPI_GED_REG_SLEEP_CTL,
178 },
179 .sleep_sts = {
180 .space_id = AML_AS_SYSTEM_MEMORY,
181 .bit_width = 8,
182 .address = GED_MMIO_BASE_REGS + ACPI_GED_REG_SLEEP_STS,
183 },
184
185
186 .reset_reg = {
187 .space_id = AML_AS_SYSTEM_MEMORY,
188 .bit_width = 8,
189 .address = GED_MMIO_BASE_REGS + ACPI_GED_REG_RESET,
190 },
191 .reset_val = ACPI_GED_RESET_VALUE,
192
193
194
195
196 .iapc_boot_arch = iapc_boot_arch_8042(),
197 };
198
199 table_offsets = g_array_new(false, true ,
200 sizeof(uint32_t));
201 bios_linker_loader_alloc(tables->linker,
202 ACPI_BUILD_TABLE_FILE, tables_blob,
203 64 ,
204 false );
205
206 dsdt = tables_blob->len;
207 build_dsdt_microvm(tables_blob, tables->linker, mms);
208
209 pmfadt.dsdt_tbl_offset = &dsdt;
210 pmfadt.xdsdt_tbl_offset = &dsdt;
211 acpi_add_table(table_offsets, tables_blob);
212 build_fadt(tables_blob, tables->linker, &pmfadt, x86ms->oem_id,
213 x86ms->oem_table_id);
214
215 acpi_add_table(table_offsets, tables_blob);
216 acpi_build_madt(tables_blob, tables->linker, X86_MACHINE(machine),
217 ACPI_DEVICE_IF(x86ms->acpi_dev), x86ms->oem_id,
218 x86ms->oem_table_id);
219
220#ifdef CONFIG_ACPI_ERST
221 {
222 Object *erst_dev;
223 erst_dev = find_erst_dev();
224 if (erst_dev) {
225 acpi_add_table(table_offsets, tables_blob);
226 build_erst(tables_blob, tables->linker, erst_dev,
227 x86ms->oem_id, x86ms->oem_table_id);
228 }
229 }
230#endif
231
232 xsdt = tables_blob->len;
233 build_xsdt(tables_blob, tables->linker, table_offsets, x86ms->oem_id,
234 x86ms->oem_table_id);
235
236
237 {
238 AcpiRsdpData rsdp_data = {
239
240 .revision = 2,
241 .oem_id = x86ms->oem_id,
242 .xsdt_tbl_offset = &xsdt,
243 .rsdt_tbl_offset = NULL,
244 };
245 build_rsdp(tables->rsdp, tables->linker, &rsdp_data);
246 }
247
248
249 g_array_free(table_offsets, true);
250}
251
252static void acpi_build_no_update(void *build_opaque)
253{
254
255}
256
257void acpi_setup_microvm(MicrovmMachineState *mms)
258{
259 X86MachineState *x86ms = X86_MACHINE(mms);
260 AcpiBuildTables tables;
261
262 assert(x86ms->fw_cfg);
263
264 if (!x86_machine_is_acpi_enabled(x86ms)) {
265 return;
266 }
267
268 acpi_build_tables_init(&tables);
269 acpi_build_microvm(&tables, mms);
270
271
272 acpi_add_rom_blob(acpi_build_no_update, NULL, tables.table_data,
273 ACPI_BUILD_TABLE_FILE);
274 acpi_add_rom_blob(acpi_build_no_update, NULL, tables.linker->cmd_blob,
275 ACPI_BUILD_LOADER_FILE);
276 acpi_add_rom_blob(acpi_build_no_update, NULL, tables.rsdp,
277 ACPI_BUILD_RSDP_FILE);
278
279 acpi_build_tables_cleanup(&tables, false);
280}
281
