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18#include "qemu/osdep.h"
19#include "qemu/error-report.h"
20#include "qemu/cutils.h"
21#include "qemu/units.h"
22#include "qapi/error.h"
23#include "qapi/visitor.h"
24#include "qapi/qapi-visit-common.h"
25#include "sysemu/sysemu.h"
26#include "sysemu/cpus.h"
27#include "sysemu/numa.h"
28#include "sysemu/reset.h"
29#include "sysemu/runstate.h"
30#include "acpi-microvm.h"
31#include "microvm-dt.h"
32
33#include "hw/loader.h"
34#include "hw/irq.h"
35#include "hw/kvm/clock.h"
36#include "hw/i386/microvm.h"
37#include "hw/i386/x86.h"
38#include "target/i386/cpu.h"
39#include "hw/intc/i8259.h"
40#include "hw/timer/i8254.h"
41#include "hw/rtc/mc146818rtc.h"
42#include "hw/char/serial.h"
43#include "hw/display/ramfb.h"
44#include "hw/i386/topology.h"
45#include "hw/i386/e820_memory_layout.h"
46#include "hw/i386/fw_cfg.h"
47#include "hw/virtio/virtio-mmio.h"
48#include "hw/acpi/acpi.h"
49#include "hw/acpi/generic_event_device.h"
50#include "hw/pci-host/gpex.h"
51#include "hw/usb/xhci.h"
52
53#include "elf.h"
54#include "kvm/kvm_i386.h"
55#include "hw/xen/start_info.h"
56
57#define MICROVM_QBOOT_FILENAME "qboot.rom"
58#define MICROVM_BIOS_FILENAME "bios-microvm.bin"
59
60static void microvm_set_rtc(MicrovmMachineState *mms, MC146818RtcState *s)
61{
62 X86MachineState *x86ms = X86_MACHINE(mms);
63 int val;
64
65 val = MIN(x86ms->below_4g_mem_size / KiB, 640);
66 mc146818rtc_set_cmos_data(s, 0x15, val);
67 mc146818rtc_set_cmos_data(s, 0x16, val >> 8);
68
69 if (x86ms->below_4g_mem_size > 1 * MiB) {
70 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
71 } else {
72 val = 0;
73 }
74 if (val > 65535) {
75 val = 65535;
76 }
77 mc146818rtc_set_cmos_data(s, 0x17, val);
78 mc146818rtc_set_cmos_data(s, 0x18, val >> 8);
79 mc146818rtc_set_cmos_data(s, 0x30, val);
80 mc146818rtc_set_cmos_data(s, 0x31, val >> 8);
81
82 if (x86ms->below_4g_mem_size > 16 * MiB) {
83 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
84 } else {
85 val = 0;
86 }
87 if (val > 65535) {
88 val = 65535;
89 }
90 mc146818rtc_set_cmos_data(s, 0x34, val);
91 mc146818rtc_set_cmos_data(s, 0x35, val >> 8);
92
93 val = x86ms->above_4g_mem_size / 65536;
94 mc146818rtc_set_cmos_data(s, 0x5b, val);
95 mc146818rtc_set_cmos_data(s, 0x5c, val >> 8);
96 mc146818rtc_set_cmos_data(s, 0x5d, val >> 16);
97}
98
99static void create_gpex(MicrovmMachineState *mms)
100{
101 X86MachineState *x86ms = X86_MACHINE(mms);
102 MemoryRegion *mmio32_alias;
103 MemoryRegion *mmio64_alias;
104 MemoryRegion *mmio_reg;
105 MemoryRegion *ecam_alias;
106 MemoryRegion *ecam_reg;
107 DeviceState *dev;
108 int i;
109
110 dev = qdev_new(TYPE_GPEX_HOST);
111 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
112
113
114 ecam_alias = g_new0(MemoryRegion, 1);
115 ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
116 memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam",
117 ecam_reg, 0, mms->gpex.ecam.size);
118 memory_region_add_subregion(get_system_memory(),
119 mms->gpex.ecam.base, ecam_alias);
120
121
122
123
124
125
126 mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
127 if (mms->gpex.mmio32.size) {
128 mmio32_alias = g_new0(MemoryRegion, 1);
129 memory_region_init_alias(mmio32_alias, OBJECT(dev), "pcie-mmio32", mmio_reg,
130 mms->gpex.mmio32.base, mms->gpex.mmio32.size);
131 memory_region_add_subregion(get_system_memory(),
132 mms->gpex.mmio32.base, mmio32_alias);
133 }
134 if (mms->gpex.mmio64.size) {
135 mmio64_alias = g_new0(MemoryRegion, 1);
136 memory_region_init_alias(mmio64_alias, OBJECT(dev), "pcie-mmio64", mmio_reg,
137 mms->gpex.mmio64.base, mms->gpex.mmio64.size);
138 memory_region_add_subregion(get_system_memory(),
139 mms->gpex.mmio64.base, mmio64_alias);
140 }
141
142 for (i = 0; i < GPEX_NUM_IRQS; i++) {
143 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
144 x86ms->gsi[mms->gpex.irq + i]);
145 }
146}
147
148static int microvm_ioapics(MicrovmMachineState *mms)
149{
150 if (!x86_machine_is_acpi_enabled(X86_MACHINE(mms))) {
151 return 1;
152 }
153 if (mms->ioapic2 == ON_OFF_AUTO_OFF) {
154 return 1;
155 }
156 return 2;
157}
158
159static void microvm_devices_init(MicrovmMachineState *mms)
160{
161 const char *default_firmware;
162 X86MachineState *x86ms = X86_MACHINE(mms);
163 ISABus *isa_bus;
164 GSIState *gsi_state;
165 int ioapics;
166 int i;
167
168
169 ioapics = microvm_ioapics(mms);
170 gsi_state = g_malloc0(sizeof(*gsi_state));
171 x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state,
172 IOAPIC_NUM_PINS * ioapics);
173
174 isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(),
175 &error_abort);
176 isa_bus_register_input_irqs(isa_bus, x86ms->gsi);
177
178 ioapic_init_gsi(gsi_state, "machine");
179 if (ioapics > 1) {
180 x86ms->ioapic2 = ioapic_init_secondary(gsi_state);
181 }
182
183 kvmclock_create(true);
184
185 mms->virtio_irq_base = 5;
186 mms->virtio_num_transports = 8;
187 if (x86ms->ioapic2) {
188 mms->pcie_irq_base = 16;
189
190 mms->virtio_irq_base = IO_APIC_SECONDARY_IRQBASE;
191 mms->virtio_num_transports = IOAPIC_NUM_PINS;
192 } else if (x86_machine_is_acpi_enabled(x86ms)) {
193 mms->pcie_irq_base = 12;
194 mms->virtio_irq_base = 16;
195 }
196
197 for (i = 0; i < mms->virtio_num_transports; i++) {
198 sysbus_create_simple("virtio-mmio",
199 VIRTIO_MMIO_BASE + i * 512,
200 x86ms->gsi[mms->virtio_irq_base + i]);
201 }
202
203
204 if (x86_machine_is_acpi_enabled(x86ms)) {
205 DeviceState *dev = qdev_new(TYPE_ACPI_GED_X86);
206 qdev_prop_set_uint32(dev, "ged-event", ACPI_GED_PWR_DOWN_EVT);
207 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, GED_MMIO_BASE);
208
209 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, GED_MMIO_BASE_REGS);
210 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
211 x86ms->gsi[GED_MMIO_IRQ]);
212 sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
213 x86ms->acpi_dev = HOTPLUG_HANDLER(dev);
214 }
215
216 if (x86_machine_is_acpi_enabled(x86ms) && machine_usb(MACHINE(mms))) {
217 DeviceState *dev = qdev_new(TYPE_XHCI_SYSBUS);
218 qdev_prop_set_uint32(dev, "intrs", 1);
219 qdev_prop_set_uint32(dev, "slots", XHCI_MAXSLOTS);
220 qdev_prop_set_uint32(dev, "p2", 8);
221 qdev_prop_set_uint32(dev, "p3", 8);
222 sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
223 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MICROVM_XHCI_BASE);
224 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
225 x86ms->gsi[MICROVM_XHCI_IRQ]);
226 }
227
228 if (x86_machine_is_acpi_enabled(x86ms) && mms->pcie == ON_OFF_AUTO_ON) {
229
230 hwaddr phys_size = (hwaddr)1 << X86_CPU(first_cpu)->phys_bits;
231 if (phys_size > 0x1000000ll) {
232 mms->gpex.mmio64.size = phys_size / 4;
233 mms->gpex.mmio64.base = phys_size - mms->gpex.mmio64.size;
234 }
235 mms->gpex.mmio32.base = PCIE_MMIO_BASE;
236 mms->gpex.mmio32.size = PCIE_MMIO_SIZE;
237 mms->gpex.ecam.base = PCIE_ECAM_BASE;
238 mms->gpex.ecam.size = PCIE_ECAM_SIZE;
239 mms->gpex.irq = mms->pcie_irq_base;
240 create_gpex(mms);
241 x86ms->pci_irq_mask = ((1 << (mms->pcie_irq_base + 0)) |
242 (1 << (mms->pcie_irq_base + 1)) |
243 (1 << (mms->pcie_irq_base + 2)) |
244 (1 << (mms->pcie_irq_base + 3)));
245 } else {
246 x86ms->pci_irq_mask = 0;
247 }
248
249 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
250 qemu_irq *i8259;
251
252 i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq());
253 for (i = 0; i < ISA_NUM_IRQS; i++) {
254 gsi_state->i8259_irq[i] = i8259[i];
255 }
256 g_free(i8259);
257 }
258
259 if (x86ms->pit == ON_OFF_AUTO_ON || x86ms->pit == ON_OFF_AUTO_AUTO) {
260 if (kvm_pit_in_kernel()) {
261 kvm_pit_init(isa_bus, 0x40);
262 } else {
263 i8254_pit_init(isa_bus, 0x40, 0, NULL);
264 }
265 }
266
267 if (mms->rtc == ON_OFF_AUTO_ON ||
268 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) {
269 microvm_set_rtc(mms, mc146818_rtc_init(isa_bus, 2000, NULL));
270 }
271
272 if (mms->isa_serial) {
273 serial_hds_isa_init(isa_bus, 0, 1);
274 }
275
276 default_firmware = x86_machine_is_acpi_enabled(x86ms)
277 ? MICROVM_BIOS_FILENAME
278 : MICROVM_QBOOT_FILENAME;
279 x86_bios_rom_init(MACHINE(mms), default_firmware, get_system_memory(), true);
280}
281
282static void microvm_memory_init(MicrovmMachineState *mms)
283{
284 MachineState *machine = MACHINE(mms);
285 X86MachineState *x86ms = X86_MACHINE(mms);
286 MemoryRegion *ram_below_4g, *ram_above_4g;
287 MemoryRegion *system_memory = get_system_memory();
288 FWCfgState *fw_cfg;
289 ram_addr_t lowmem = 0xc0000000;
290 int i;
291
292 if (machine->ram_size > lowmem) {
293 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
294 x86ms->below_4g_mem_size = lowmem;
295 } else {
296 x86ms->above_4g_mem_size = 0;
297 x86ms->below_4g_mem_size = machine->ram_size;
298 }
299
300 ram_below_4g = g_malloc(sizeof(*ram_below_4g));
301 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram,
302 0, x86ms->below_4g_mem_size);
303 memory_region_add_subregion(system_memory, 0, ram_below_4g);
304
305 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM);
306
307 if (x86ms->above_4g_mem_size > 0) {
308 ram_above_4g = g_malloc(sizeof(*ram_above_4g));
309 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g",
310 machine->ram,
311 x86ms->below_4g_mem_size,
312 x86ms->above_4g_mem_size);
313 memory_region_add_subregion(system_memory, 0x100000000ULL,
314 ram_above_4g);
315 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
316 }
317
318 fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
319 &address_space_memory);
320
321 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus);
322 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus);
323 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
324 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1);
325 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
326 sizeof(struct e820_entry) * e820_get_num_entries());
327
328 rom_set_fw(fw_cfg);
329
330 if (machine->kernel_filename != NULL) {
331 x86_load_linux(x86ms, fw_cfg, 0, true);
332 }
333
334 if (mms->option_roms) {
335 for (i = 0; i < nb_option_roms; i++) {
336 rom_add_option(option_rom[i].name, option_rom[i].bootindex);
337 }
338 }
339
340 x86ms->fw_cfg = fw_cfg;
341 x86ms->ioapic_as = &address_space_memory;
342}
343
344static gchar *microvm_get_mmio_cmdline(gchar *name, uint32_t virtio_irq_base)
345{
346 gchar *cmdline;
347 gchar *separator;
348 long int index;
349 int ret;
350
351 separator = g_strrstr(name, ".");
352 if (!separator) {
353 return NULL;
354 }
355
356 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) {
357 return NULL;
358 }
359
360 cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN);
361 ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN,
362 " virtio_mmio.device=512@0x%lx:%ld",
363 VIRTIO_MMIO_BASE + index * 512,
364 virtio_irq_base + index);
365 if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) {
366 g_free(cmdline);
367 return NULL;
368 }
369
370 return cmdline;
371}
372
373static void microvm_fix_kernel_cmdline(MachineState *machine)
374{
375 X86MachineState *x86ms = X86_MACHINE(machine);
376 MicrovmMachineState *mms = MICROVM_MACHINE(machine);
377 BusState *bus;
378 BusChild *kid;
379 char *cmdline;
380
381
382
383
384
385
386
387
388 cmdline = g_strdup(machine->kernel_cmdline);
389 bus = sysbus_get_default();
390 QTAILQ_FOREACH(kid, &bus->children, sibling) {
391 DeviceState *dev = kid->child;
392
393 if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MMIO)) {
394 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev));
395 VirtioBusState *mmio_virtio_bus = &mmio->bus;
396 BusState *mmio_bus = &mmio_virtio_bus->parent_obj;
397
398 if (!QTAILQ_EMPTY(&mmio_bus->children)) {
399 gchar *mmio_cmdline = microvm_get_mmio_cmdline
400 (mmio_bus->name, mms->virtio_irq_base);
401 if (mmio_cmdline) {
402 char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL);
403 g_free(mmio_cmdline);
404 g_free(cmdline);
405 cmdline = newcmd;
406 }
407 }
408 }
409 }
410
411 fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1);
412 fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline);
413
414 g_free(cmdline);
415}
416
417static void microvm_device_pre_plug_cb(HotplugHandler *hotplug_dev,
418 DeviceState *dev, Error **errp)
419{
420 X86CPU *cpu = X86_CPU(dev);
421
422 cpu->host_phys_bits = true;
423 x86_cpu_pre_plug(hotplug_dev, dev, errp);
424}
425
426static void microvm_device_plug_cb(HotplugHandler *hotplug_dev,
427 DeviceState *dev, Error **errp)
428{
429 x86_cpu_plug(hotplug_dev, dev, errp);
430}
431
432static void microvm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
433 DeviceState *dev, Error **errp)
434{
435 error_setg(errp, "unplug not supported by microvm");
436}
437
438static void microvm_device_unplug_cb(HotplugHandler *hotplug_dev,
439 DeviceState *dev, Error **errp)
440{
441 error_setg(errp, "unplug not supported by microvm");
442}
443
444static HotplugHandler *microvm_get_hotplug_handler(MachineState *machine,
445 DeviceState *dev)
446{
447 if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
448 return HOTPLUG_HANDLER(machine);
449 }
450 return NULL;
451}
452
453static void microvm_machine_state_init(MachineState *machine)
454{
455 MicrovmMachineState *mms = MICROVM_MACHINE(machine);
456 X86MachineState *x86ms = X86_MACHINE(machine);
457
458 microvm_memory_init(mms);
459
460 x86_cpus_init(x86ms, CPU_VERSION_LATEST);
461
462 microvm_devices_init(mms);
463}
464
465static void microvm_machine_reset(MachineState *machine, ShutdownCause reason)
466{
467 MicrovmMachineState *mms = MICROVM_MACHINE(machine);
468 CPUState *cs;
469 X86CPU *cpu;
470
471 if (!x86_machine_is_acpi_enabled(X86_MACHINE(machine)) &&
472 machine->kernel_filename != NULL &&
473 mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) {
474 microvm_fix_kernel_cmdline(machine);
475 mms->kernel_cmdline_fixed = true;
476 }
477
478 qemu_devices_reset(reason);
479
480 CPU_FOREACH(cs) {
481 cpu = X86_CPU(cs);
482
483 x86_cpu_after_reset(cpu);
484 }
485}
486
487static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name,
488 void *opaque, Error **errp)
489{
490 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
491 OnOffAuto rtc = mms->rtc;
492
493 visit_type_OnOffAuto(v, name, &rtc, errp);
494}
495
496static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name,
497 void *opaque, Error **errp)
498{
499 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
500
501 visit_type_OnOffAuto(v, name, &mms->rtc, errp);
502}
503
504static void microvm_machine_get_pcie(Object *obj, Visitor *v, const char *name,
505 void *opaque, Error **errp)
506{
507 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
508 OnOffAuto pcie = mms->pcie;
509
510 visit_type_OnOffAuto(v, name, &pcie, errp);
511}
512
513static void microvm_machine_set_pcie(Object *obj, Visitor *v, const char *name,
514 void *opaque, Error **errp)
515{
516 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
517
518 visit_type_OnOffAuto(v, name, &mms->pcie, errp);
519}
520
521static void microvm_machine_get_ioapic2(Object *obj, Visitor *v, const char *name,
522 void *opaque, Error **errp)
523{
524 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
525 OnOffAuto ioapic2 = mms->ioapic2;
526
527 visit_type_OnOffAuto(v, name, &ioapic2, errp);
528}
529
530static void microvm_machine_set_ioapic2(Object *obj, Visitor *v, const char *name,
531 void *opaque, Error **errp)
532{
533 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
534
535 visit_type_OnOffAuto(v, name, &mms->ioapic2, errp);
536}
537
538static bool microvm_machine_get_isa_serial(Object *obj, Error **errp)
539{
540 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
541
542 return mms->isa_serial;
543}
544
545static void microvm_machine_set_isa_serial(Object *obj, bool value,
546 Error **errp)
547{
548 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
549
550 mms->isa_serial = value;
551}
552
553static bool microvm_machine_get_option_roms(Object *obj, Error **errp)
554{
555 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
556
557 return mms->option_roms;
558}
559
560static void microvm_machine_set_option_roms(Object *obj, bool value,
561 Error **errp)
562{
563 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
564
565 mms->option_roms = value;
566}
567
568static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp)
569{
570 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
571
572 return mms->auto_kernel_cmdline;
573}
574
575static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value,
576 Error **errp)
577{
578 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
579
580 mms->auto_kernel_cmdline = value;
581}
582
583static void microvm_machine_done(Notifier *notifier, void *data)
584{
585 MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState,
586 machine_done);
587
588 acpi_setup_microvm(mms);
589 dt_setup_microvm(mms);
590}
591
592static void microvm_powerdown_req(Notifier *notifier, void *data)
593{
594 MicrovmMachineState *mms = container_of(notifier, MicrovmMachineState,
595 powerdown_req);
596 X86MachineState *x86ms = X86_MACHINE(mms);
597
598 if (x86ms->acpi_dev) {
599 Object *obj = OBJECT(x86ms->acpi_dev);
600 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
601 adevc->send_event(ACPI_DEVICE_IF(x86ms->acpi_dev),
602 ACPI_POWER_DOWN_STATUS);
603 }
604}
605
606static void microvm_machine_initfn(Object *obj)
607{
608 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
609
610
611 mms->rtc = ON_OFF_AUTO_AUTO;
612 mms->pcie = ON_OFF_AUTO_AUTO;
613 mms->ioapic2 = ON_OFF_AUTO_AUTO;
614 mms->isa_serial = true;
615 mms->option_roms = true;
616 mms->auto_kernel_cmdline = true;
617
618
619 mms->kernel_cmdline_fixed = false;
620
621 mms->machine_done.notify = microvm_machine_done;
622 qemu_add_machine_init_done_notifier(&mms->machine_done);
623 mms->powerdown_req.notify = microvm_powerdown_req;
624 qemu_register_powerdown_notifier(&mms->powerdown_req);
625}
626
627GlobalProperty microvm_properties[] = {
628
629
630
631
632 { "pcie-root-port", "io-reserve", "0" },
633};
634
635static void microvm_class_init(ObjectClass *oc, void *data)
636{
637 X86MachineClass *x86mc = X86_MACHINE_CLASS(oc);
638 MachineClass *mc = MACHINE_CLASS(oc);
639 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
640
641 mc->init = microvm_machine_state_init;
642
643 mc->family = "microvm_i386";
644 mc->desc = "microvm (i386)";
645 mc->units_per_default_bus = 1;
646 mc->no_floppy = 1;
647 mc->max_cpus = 288;
648 mc->has_hotpluggable_cpus = false;
649 mc->auto_enable_numa_with_memhp = false;
650 mc->auto_enable_numa_with_memdev = false;
651 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
652 mc->nvdimm_supported = false;
653 mc->default_ram_id = "microvm.ram";
654
655
656 mc->default_kernel_irqchip_split = true;
657
658
659 mc->reset = microvm_machine_reset;
660
661
662 mc->get_hotplug_handler = microvm_get_hotplug_handler;
663 hc->pre_plug = microvm_device_pre_plug_cb;
664 hc->plug = microvm_device_plug_cb;
665 hc->unplug_request = microvm_device_unplug_request_cb;
666 hc->unplug = microvm_device_unplug_cb;
667
668 x86mc->fwcfg_dma_enabled = true;
669
670 object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto",
671 microvm_machine_get_rtc,
672 microvm_machine_set_rtc,
673 NULL, NULL);
674 object_class_property_set_description(oc, MICROVM_MACHINE_RTC,
675 "Enable MC146818 RTC");
676
677 object_class_property_add(oc, MICROVM_MACHINE_PCIE, "OnOffAuto",
678 microvm_machine_get_pcie,
679 microvm_machine_set_pcie,
680 NULL, NULL);
681 object_class_property_set_description(oc, MICROVM_MACHINE_PCIE,
682 "Enable PCIe");
683
684 object_class_property_add(oc, MICROVM_MACHINE_IOAPIC2, "OnOffAuto",
685 microvm_machine_get_ioapic2,
686 microvm_machine_set_ioapic2,
687 NULL, NULL);
688 object_class_property_set_description(oc, MICROVM_MACHINE_IOAPIC2,
689 "Enable second IO-APIC");
690
691 object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL,
692 microvm_machine_get_isa_serial,
693 microvm_machine_set_isa_serial);
694 object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL,
695 "Set off to disable the instantiation an ISA serial port");
696
697 object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS,
698 microvm_machine_get_option_roms,
699 microvm_machine_set_option_roms);
700 object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS,
701 "Set off to disable loading option ROMs");
702
703 object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
704 microvm_machine_get_auto_kernel_cmdline,
705 microvm_machine_set_auto_kernel_cmdline);
706 object_class_property_set_description(oc,
707 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
708 "Set off to disable adding virtio-mmio devices to the kernel cmdline");
709
710 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
711
712 compat_props_add(mc->compat_props, microvm_properties,
713 G_N_ELEMENTS(microvm_properties));
714}
715
716static const TypeInfo microvm_machine_info = {
717 .name = TYPE_MICROVM_MACHINE,
718 .parent = TYPE_X86_MACHINE,
719 .instance_size = sizeof(MicrovmMachineState),
720 .instance_init = microvm_machine_initfn,
721 .class_size = sizeof(MicrovmMachineClass),
722 .class_init = microvm_class_init,
723 .interfaces = (InterfaceInfo[]) {
724 { TYPE_HOTPLUG_HANDLER },
725 { }
726 },
727};
728
729static void microvm_machine_init(void)
730{
731 type_register_static(µvm_machine_info);
732}
733type_init(microvm_machine_init);
734
