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8#include "qemu/osdep.h"
9#include "disas/dis-asm.h"
10#include "qemu/bitops.h"
11#include "cpu-csr.h"
12
13typedef struct {
14 disassemble_info *info;
15 uint64_t pc;
16 uint32_t insn;
17} DisasContext;
18
19static inline int plus_1(DisasContext *ctx, int x)
20{
21 return x + 1;
22}
23
24static inline int shl_1(DisasContext *ctx, int x)
25{
26 return x << 1;
27}
28
29static inline int shl_2(DisasContext *ctx, int x)
30{
31 return x << 2;
32}
33
34static inline int shl_3(DisasContext *ctx, int x)
35{
36 return x << 3;
37}
38
39#define CSR_NAME(REG) \
40 [LOONGARCH_CSR_##REG] = (#REG)
41
42static const char * const csr_names[] = {
43 CSR_NAME(CRMD),
44 CSR_NAME(PRMD),
45 CSR_NAME(EUEN),
46 CSR_NAME(MISC),
47 CSR_NAME(ECFG),
48 CSR_NAME(ESTAT),
49 CSR_NAME(ERA),
50 CSR_NAME(BADV),
51 CSR_NAME(BADI),
52 CSR_NAME(EENTRY),
53 CSR_NAME(TLBIDX),
54 CSR_NAME(TLBEHI),
55 CSR_NAME(TLBELO0),
56 CSR_NAME(TLBELO1),
57 CSR_NAME(ASID),
58 CSR_NAME(PGDL),
59 CSR_NAME(PGDH),
60 CSR_NAME(PGD),
61 CSR_NAME(PWCL),
62 CSR_NAME(PWCH),
63 CSR_NAME(STLBPS),
64 CSR_NAME(RVACFG),
65 CSR_NAME(CPUID),
66 CSR_NAME(PRCFG1),
67 CSR_NAME(PRCFG2),
68 CSR_NAME(PRCFG3),
69 CSR_NAME(SAVE(0)),
70 CSR_NAME(SAVE(1)),
71 CSR_NAME(SAVE(2)),
72 CSR_NAME(SAVE(3)),
73 CSR_NAME(SAVE(4)),
74 CSR_NAME(SAVE(5)),
75 CSR_NAME(SAVE(6)),
76 CSR_NAME(SAVE(7)),
77 CSR_NAME(SAVE(8)),
78 CSR_NAME(SAVE(9)),
79 CSR_NAME(SAVE(10)),
80 CSR_NAME(SAVE(11)),
81 CSR_NAME(SAVE(12)),
82 CSR_NAME(SAVE(13)),
83 CSR_NAME(SAVE(14)),
84 CSR_NAME(SAVE(15)),
85 CSR_NAME(TID),
86 CSR_NAME(TCFG),
87 CSR_NAME(TVAL),
88 CSR_NAME(CNTC),
89 CSR_NAME(TICLR),
90 CSR_NAME(LLBCTL),
91 CSR_NAME(IMPCTL1),
92 CSR_NAME(IMPCTL2),
93 CSR_NAME(TLBRENTRY),
94 CSR_NAME(TLBRBADV),
95 CSR_NAME(TLBRERA),
96 CSR_NAME(TLBRSAVE),
97 CSR_NAME(TLBRELO0),
98 CSR_NAME(TLBRELO1),
99 CSR_NAME(TLBREHI),
100 CSR_NAME(TLBRPRMD),
101 CSR_NAME(MERRCTL),
102 CSR_NAME(MERRINFO1),
103 CSR_NAME(MERRINFO2),
104 CSR_NAME(MERRENTRY),
105 CSR_NAME(MERRERA),
106 CSR_NAME(MERRSAVE),
107 CSR_NAME(CTAG),
108 CSR_NAME(DMW(0)),
109 CSR_NAME(DMW(1)),
110 CSR_NAME(DMW(2)),
111 CSR_NAME(DMW(3)),
112 CSR_NAME(DBG),
113 CSR_NAME(DERA),
114 CSR_NAME(DSAVE),
115};
116
117static const char *get_csr_name(unsigned num)
118{
119 return ((num < ARRAY_SIZE(csr_names)) && (csr_names[num] != NULL)) ?
120 csr_names[num] : "Undefined CSR";
121}
122
123#define output(C, INSN, FMT, ...) \
124{ \
125 (C)->info->fprintf_func((C)->info->stream, "%08x %-9s\t" FMT, \
126 (C)->insn, INSN, ##__VA_ARGS__); \
127}
128
129#include "decode-insns.c.inc"
130
131int print_insn_loongarch(bfd_vma memaddr, struct disassemble_info *info)
132{
133 bfd_byte buffer[4];
134 uint32_t insn;
135 int status;
136
137 status = (*info->read_memory_func)(memaddr, buffer, 4, info);
138 if (status != 0) {
139 (*info->memory_error_func)(status, memaddr, info);
140 return -1;
141 }
142 insn = bfd_getl32(buffer);
143 DisasContext ctx = {
144 .info = info,
145 .pc = memaddr,
146 .insn = insn
147 };
148
149 if (!decode(&ctx, insn)) {
150 output(&ctx, "illegal", "");
151 }
152 return 4;
153}
154
155static void output_r_i(DisasContext *ctx, arg_r_i *a, const char *mnemonic)
156{
157 output(ctx, mnemonic, "r%d, %d", a->rd, a->imm);
158}
159
160static void output_rrr(DisasContext *ctx, arg_rrr *a, const char *mnemonic)
161{
162 output(ctx, mnemonic, "r%d, r%d, r%d", a->rd, a->rj, a->rk);
163}
164
165static void output_rr_i(DisasContext *ctx, arg_rr_i *a, const char *mnemonic)
166{
167 output(ctx, mnemonic, "r%d, r%d, %d", a->rd, a->rj, a->imm);
168}
169
170static void output_rrr_sa(DisasContext *ctx, arg_rrr_sa *a,
171 const char *mnemonic)
172{
173 output(ctx, mnemonic, "r%d, r%d, r%d, %d", a->rd, a->rj, a->rk, a->sa);
174}
175
176static void output_rr(DisasContext *ctx, arg_rr *a, const char *mnemonic)
177{
178 output(ctx, mnemonic, "r%d, r%d", a->rd, a->rj);
179}
180
181static void output_rr_ms_ls(DisasContext *ctx, arg_rr_ms_ls *a,
182 const char *mnemonic)
183{
184 output(ctx, mnemonic, "r%d, r%d, %d, %d", a->rd, a->rj, a->ms, a->ls);
185}
186
187static void output_hint_r_i(DisasContext *ctx, arg_hint_r_i *a,
188 const char *mnemonic)
189{
190 output(ctx, mnemonic, "%d, r%d, %d", a->hint, a->rj, a->imm);
191}
192
193static void output_i(DisasContext *ctx, arg_i *a, const char *mnemonic)
194{
195 output(ctx, mnemonic, "%d", a->imm);
196}
197
198static void output_rr_jk(DisasContext *ctx, arg_rr_jk *a,
199 const char *mnemonic)
200{
201 output(ctx, mnemonic, "r%d, r%d", a->rj, a->rk);
202}
203
204static void output_ff(DisasContext *ctx, arg_ff *a, const char *mnemonic)
205{
206 output(ctx, mnemonic, "f%d, f%d", a->fd, a->fj);
207}
208
209static void output_fff(DisasContext *ctx, arg_fff *a, const char *mnemonic)
210{
211 output(ctx, mnemonic, "f%d, f%d, f%d", a->fd, a->fj, a->fk);
212}
213
214static void output_ffff(DisasContext *ctx, arg_ffff *a, const char *mnemonic)
215{
216 output(ctx, mnemonic, "f%d, f%d, f%d, f%d", a->fd, a->fj, a->fk, a->fa);
217}
218
219static void output_fffc(DisasContext *ctx, arg_fffc *a, const char *mnemonic)
220{
221 output(ctx, mnemonic, "f%d, f%d, f%d, %d", a->fd, a->fj, a->fk, a->ca);
222}
223
224static void output_fr(DisasContext *ctx, arg_fr *a, const char *mnemonic)
225{
226 output(ctx, mnemonic, "f%d, r%d", a->fd, a->rj);
227}
228
229static void output_rf(DisasContext *ctx, arg_rf *a, const char *mnemonic)
230{
231 output(ctx, mnemonic, "r%d, f%d", a->rd, a->fj);
232}
233
234static void output_fcsrd_r(DisasContext *ctx, arg_fcsrd_r *a,
235 const char *mnemonic)
236{
237 output(ctx, mnemonic, "fcsr%d, r%d", a->fcsrd, a->rj);
238}
239
240static void output_r_fcsrs(DisasContext *ctx, arg_r_fcsrs *a,
241 const char *mnemonic)
242{
243 output(ctx, mnemonic, "r%d, fcsr%d", a->rd, a->fcsrs);
244}
245
246static void output_cf(DisasContext *ctx, arg_cf *a, const char *mnemonic)
247{
248 output(ctx, mnemonic, "fcc%d, f%d", a->cd, a->fj);
249}
250
251static void output_fc(DisasContext *ctx, arg_fc *a, const char *mnemonic)
252{
253 output(ctx, mnemonic, "f%d, fcc%d", a->fd, a->cj);
254}
255
256static void output_cr(DisasContext *ctx, arg_cr *a, const char *mnemonic)
257{
258 output(ctx, mnemonic, "fcc%d, r%d", a->cd, a->rj);
259}
260
261static void output_rc(DisasContext *ctx, arg_rc *a, const char *mnemonic)
262{
263 output(ctx, mnemonic, "r%d, fcc%d", a->rd, a->cj);
264}
265
266static void output_frr(DisasContext *ctx, arg_frr *a, const char *mnemonic)
267{
268 output(ctx, mnemonic, "f%d, r%d, r%d", a->fd, a->rj, a->rk);
269}
270
271static void output_fr_i(DisasContext *ctx, arg_fr_i *a, const char *mnemonic)
272{
273 output(ctx, mnemonic, "f%d, r%d, %d", a->fd, a->rj, a->imm);
274}
275
276static void output_r_offs(DisasContext *ctx, arg_r_offs *a,
277 const char *mnemonic)
278{
279 output(ctx, mnemonic, "r%d, %d # 0x%" PRIx64, a->rj, a->offs,
280 ctx->pc + a->offs);
281}
282
283static void output_c_offs(DisasContext *ctx, arg_c_offs *a,
284 const char *mnemonic)
285{
286 output(ctx, mnemonic, "fcc%d, %d # 0x%" PRIx64, a->cj, a->offs,
287 ctx->pc + a->offs);
288}
289
290static void output_offs(DisasContext *ctx, arg_offs *a,
291 const char *mnemonic)
292{
293 output(ctx, mnemonic, "%d # 0x%" PRIx64, a->offs, ctx->pc + a->offs);
294}
295
296static void output_rr_offs(DisasContext *ctx, arg_rr_offs *a,
297 const char *mnemonic)
298{
299 output(ctx, mnemonic, "r%d, r%d, %d # 0x%" PRIx64, a->rj,
300 a->rd, a->offs, ctx->pc + a->offs);
301}
302
303static void output_r_csr(DisasContext *ctx, arg_r_csr *a,
304 const char *mnemonic)
305{
306 output(ctx, mnemonic, "r%d, %d # %s", a->rd, a->csr, get_csr_name(a->csr));
307}
308
309static void output_rr_csr(DisasContext *ctx, arg_rr_csr *a,
310 const char *mnemonic)
311{
312 output(ctx, mnemonic, "r%d, r%d, %d # %s",
313 a->rd, a->rj, a->csr, get_csr_name(a->csr));
314}
315
316static void output_empty(DisasContext *ctx, arg_empty *a,
317 const char *mnemonic)
318{
319 output(ctx, mnemonic, "");
320}
321
322static void output_i_rr(DisasContext *ctx, arg_i_rr *a, const char *mnemonic)
323{
324 output(ctx, mnemonic, "%d, r%d, r%d", a->imm, a->rj, a->rk);
325}
326
327static void output_cop_r_i(DisasContext *ctx, arg_cop_r_i *a,
328 const char *mnemonic)
329{
330 output(ctx, mnemonic, "%d, r%d, %d", a->cop, a->rj, a->imm);
331}
332
333static void output_j_i(DisasContext *ctx, arg_j_i *a, const char *mnemonic)
334{
335 output(ctx, mnemonic, "r%d, %d", a->rj, a->imm);
336}
337
338#define INSN(insn, type) \
339static bool trans_##insn(DisasContext *ctx, arg_##type * a) \
340{ \
341 output_##type(ctx, a, #insn); \
342 return true; \
343}
344
345INSN(clo_w, rr)
346INSN(clz_w, rr)
347INSN(cto_w, rr)
348INSN(ctz_w, rr)
349INSN(clo_d, rr)
350INSN(clz_d, rr)
351INSN(cto_d, rr)
352INSN(ctz_d, rr)
353INSN(revb_2h, rr)
354INSN(revb_4h, rr)
355INSN(revb_2w, rr)
356INSN(revb_d, rr)
357INSN(revh_2w, rr)
358INSN(revh_d, rr)
359INSN(bitrev_4b, rr)
360INSN(bitrev_8b, rr)
361INSN(bitrev_w, rr)
362INSN(bitrev_d, rr)
363INSN(ext_w_h, rr)
364INSN(ext_w_b, rr)
365INSN(rdtimel_w, rr)
366INSN(rdtimeh_w, rr)
367INSN(rdtime_d, rr)
368INSN(cpucfg, rr)
369INSN(asrtle_d, rr_jk)
370INSN(asrtgt_d, rr_jk)
371INSN(alsl_w, rrr_sa)
372INSN(alsl_wu, rrr_sa)
373INSN(bytepick_w, rrr_sa)
374INSN(bytepick_d, rrr_sa)
375INSN(add_w, rrr)
376INSN(add_d, rrr)
377INSN(sub_w, rrr)
378INSN(sub_d, rrr)
379INSN(slt, rrr)
380INSN(sltu, rrr)
381INSN(maskeqz, rrr)
382INSN(masknez, rrr)
383INSN(nor, rrr)
384INSN(and, rrr)
385INSN(or, rrr)
386INSN(xor, rrr)
387INSN(orn, rrr)
388INSN(andn, rrr)
389INSN(sll_w, rrr)
390INSN(srl_w, rrr)
391INSN(sra_w, rrr)
392INSN(sll_d, rrr)
393INSN(srl_d, rrr)
394INSN(sra_d, rrr)
395INSN(rotr_w, rrr)
396INSN(rotr_d, rrr)
397INSN(mul_w, rrr)
398INSN(mulh_w, rrr)
399INSN(mulh_wu, rrr)
400INSN(mul_d, rrr)
401INSN(mulh_d, rrr)
402INSN(mulh_du, rrr)
403INSN(mulw_d_w, rrr)
404INSN(mulw_d_wu, rrr)
405INSN(div_w, rrr)
406INSN(mod_w, rrr)
407INSN(div_wu, rrr)
408INSN(mod_wu, rrr)
409INSN(div_d, rrr)
410INSN(mod_d, rrr)
411INSN(div_du, rrr)
412INSN(mod_du, rrr)
413INSN(crc_w_b_w, rrr)
414INSN(crc_w_h_w, rrr)
415INSN(crc_w_w_w, rrr)
416INSN(crc_w_d_w, rrr)
417INSN(crcc_w_b_w, rrr)
418INSN(crcc_w_h_w, rrr)
419INSN(crcc_w_w_w, rrr)
420INSN(crcc_w_d_w, rrr)
421INSN(break, i)
422INSN(syscall, i)
423INSN(alsl_d, rrr_sa)
424INSN(slli_w, rr_i)
425INSN(slli_d, rr_i)
426INSN(srli_w, rr_i)
427INSN(srli_d, rr_i)
428INSN(srai_w, rr_i)
429INSN(srai_d, rr_i)
430INSN(rotri_w, rr_i)
431INSN(rotri_d, rr_i)
432INSN(bstrins_w, rr_ms_ls)
433INSN(bstrpick_w, rr_ms_ls)
434INSN(bstrins_d, rr_ms_ls)
435INSN(bstrpick_d, rr_ms_ls)
436INSN(fadd_s, fff)
437INSN(fadd_d, fff)
438INSN(fsub_s, fff)
439INSN(fsub_d, fff)
440INSN(fmul_s, fff)
441INSN(fmul_d, fff)
442INSN(fdiv_s, fff)
443INSN(fdiv_d, fff)
444INSN(fmax_s, fff)
445INSN(fmax_d, fff)
446INSN(fmin_s, fff)
447INSN(fmin_d, fff)
448INSN(fmaxa_s, fff)
449INSN(fmaxa_d, fff)
450INSN(fmina_s, fff)
451INSN(fmina_d, fff)
452INSN(fscaleb_s, fff)
453INSN(fscaleb_d, fff)
454INSN(fcopysign_s, fff)
455INSN(fcopysign_d, fff)
456INSN(fabs_s, ff)
457INSN(fabs_d, ff)
458INSN(fneg_s, ff)
459INSN(fneg_d, ff)
460INSN(flogb_s, ff)
461INSN(flogb_d, ff)
462INSN(fclass_s, ff)
463INSN(fclass_d, ff)
464INSN(fsqrt_s, ff)
465INSN(fsqrt_d, ff)
466INSN(frecip_s, ff)
467INSN(frecip_d, ff)
468INSN(frsqrt_s, ff)
469INSN(frsqrt_d, ff)
470INSN(fmov_s, ff)
471INSN(fmov_d, ff)
472INSN(movgr2fr_w, fr)
473INSN(movgr2fr_d, fr)
474INSN(movgr2frh_w, fr)
475INSN(movfr2gr_s, rf)
476INSN(movfr2gr_d, rf)
477INSN(movfrh2gr_s, rf)
478INSN(movgr2fcsr, fcsrd_r)
479INSN(movfcsr2gr, r_fcsrs)
480INSN(movfr2cf, cf)
481INSN(movcf2fr, fc)
482INSN(movgr2cf, cr)
483INSN(movcf2gr, rc)
484INSN(fcvt_s_d, ff)
485INSN(fcvt_d_s, ff)
486INSN(ftintrm_w_s, ff)
487INSN(ftintrm_w_d, ff)
488INSN(ftintrm_l_s, ff)
489INSN(ftintrm_l_d, ff)
490INSN(ftintrp_w_s, ff)
491INSN(ftintrp_w_d, ff)
492INSN(ftintrp_l_s, ff)
493INSN(ftintrp_l_d, ff)
494INSN(ftintrz_w_s, ff)
495INSN(ftintrz_w_d, ff)
496INSN(ftintrz_l_s, ff)
497INSN(ftintrz_l_d, ff)
498INSN(ftintrne_w_s, ff)
499INSN(ftintrne_w_d, ff)
500INSN(ftintrne_l_s, ff)
501INSN(ftintrne_l_d, ff)
502INSN(ftint_w_s, ff)
503INSN(ftint_w_d, ff)
504INSN(ftint_l_s, ff)
505INSN(ftint_l_d, ff)
506INSN(ffint_s_w, ff)
507INSN(ffint_s_l, ff)
508INSN(ffint_d_w, ff)
509INSN(ffint_d_l, ff)
510INSN(frint_s, ff)
511INSN(frint_d, ff)
512INSN(slti, rr_i)
513INSN(sltui, rr_i)
514INSN(addi_w, rr_i)
515INSN(addi_d, rr_i)
516INSN(lu52i_d, rr_i)
517INSN(andi, rr_i)
518INSN(ori, rr_i)
519INSN(xori, rr_i)
520INSN(fmadd_s, ffff)
521INSN(fmadd_d, ffff)
522INSN(fmsub_s, ffff)
523INSN(fmsub_d, ffff)
524INSN(fnmadd_s, ffff)
525INSN(fnmadd_d, ffff)
526INSN(fnmsub_s, ffff)
527INSN(fnmsub_d, ffff)
528INSN(fsel, fffc)
529INSN(addu16i_d, rr_i)
530INSN(lu12i_w, r_i)
531INSN(lu32i_d, r_i)
532INSN(ll_w, rr_i)
533INSN(sc_w, rr_i)
534INSN(ll_d, rr_i)
535INSN(sc_d, rr_i)
536INSN(ldptr_w, rr_i)
537INSN(stptr_w, rr_i)
538INSN(ldptr_d, rr_i)
539INSN(stptr_d, rr_i)
540INSN(ld_b, rr_i)
541INSN(ld_h, rr_i)
542INSN(ld_w, rr_i)
543INSN(ld_d, rr_i)
544INSN(st_b, rr_i)
545INSN(st_h, rr_i)
546INSN(st_w, rr_i)
547INSN(st_d, rr_i)
548INSN(ld_bu, rr_i)
549INSN(ld_hu, rr_i)
550INSN(ld_wu, rr_i)
551INSN(preld, hint_r_i)
552INSN(fld_s, fr_i)
553INSN(fst_s, fr_i)
554INSN(fld_d, fr_i)
555INSN(fst_d, fr_i)
556INSN(ldx_b, rrr)
557INSN(ldx_h, rrr)
558INSN(ldx_w, rrr)
559INSN(ldx_d, rrr)
560INSN(stx_b, rrr)
561INSN(stx_h, rrr)
562INSN(stx_w, rrr)
563INSN(stx_d, rrr)
564INSN(ldx_bu, rrr)
565INSN(ldx_hu, rrr)
566INSN(ldx_wu, rrr)
567INSN(fldx_s, frr)
568INSN(fldx_d, frr)
569INSN(fstx_s, frr)
570INSN(fstx_d, frr)
571INSN(amswap_w, rrr)
572INSN(amswap_d, rrr)
573INSN(amadd_w, rrr)
574INSN(amadd_d, rrr)
575INSN(amand_w, rrr)
576INSN(amand_d, rrr)
577INSN(amor_w, rrr)
578INSN(amor_d, rrr)
579INSN(amxor_w, rrr)
580INSN(amxor_d, rrr)
581INSN(ammax_w, rrr)
582INSN(ammax_d, rrr)
583INSN(ammin_w, rrr)
584INSN(ammin_d, rrr)
585INSN(ammax_wu, rrr)
586INSN(ammax_du, rrr)
587INSN(ammin_wu, rrr)
588INSN(ammin_du, rrr)
589INSN(amswap_db_w, rrr)
590INSN(amswap_db_d, rrr)
591INSN(amadd_db_w, rrr)
592INSN(amadd_db_d, rrr)
593INSN(amand_db_w, rrr)
594INSN(amand_db_d, rrr)
595INSN(amor_db_w, rrr)
596INSN(amor_db_d, rrr)
597INSN(amxor_db_w, rrr)
598INSN(amxor_db_d, rrr)
599INSN(ammax_db_w, rrr)
600INSN(ammax_db_d, rrr)
601INSN(ammin_db_w, rrr)
602INSN(ammin_db_d, rrr)
603INSN(ammax_db_wu, rrr)
604INSN(ammax_db_du, rrr)
605INSN(ammin_db_wu, rrr)
606INSN(ammin_db_du, rrr)
607INSN(dbar, i)
608INSN(ibar, i)
609INSN(fldgt_s, frr)
610INSN(fldgt_d, frr)
611INSN(fldle_s, frr)
612INSN(fldle_d, frr)
613INSN(fstgt_s, frr)
614INSN(fstgt_d, frr)
615INSN(fstle_s, frr)
616INSN(fstle_d, frr)
617INSN(ldgt_b, rrr)
618INSN(ldgt_h, rrr)
619INSN(ldgt_w, rrr)
620INSN(ldgt_d, rrr)
621INSN(ldle_b, rrr)
622INSN(ldle_h, rrr)
623INSN(ldle_w, rrr)
624INSN(ldle_d, rrr)
625INSN(stgt_b, rrr)
626INSN(stgt_h, rrr)
627INSN(stgt_w, rrr)
628INSN(stgt_d, rrr)
629INSN(stle_b, rrr)
630INSN(stle_h, rrr)
631INSN(stle_w, rrr)
632INSN(stle_d, rrr)
633INSN(beqz, r_offs)
634INSN(bnez, r_offs)
635INSN(bceqz, c_offs)
636INSN(bcnez, c_offs)
637INSN(jirl, rr_i)
638INSN(b, offs)
639INSN(bl, offs)
640INSN(beq, rr_offs)
641INSN(bne, rr_offs)
642INSN(blt, rr_offs)
643INSN(bge, rr_offs)
644INSN(bltu, rr_offs)
645INSN(bgeu, rr_offs)
646INSN(csrrd, r_csr)
647INSN(csrwr, r_csr)
648INSN(csrxchg, rr_csr)
649INSN(iocsrrd_b, rr)
650INSN(iocsrrd_h, rr)
651INSN(iocsrrd_w, rr)
652INSN(iocsrrd_d, rr)
653INSN(iocsrwr_b, rr)
654INSN(iocsrwr_h, rr)
655INSN(iocsrwr_w, rr)
656INSN(iocsrwr_d, rr)
657INSN(tlbsrch, empty)
658INSN(tlbrd, empty)
659INSN(tlbwr, empty)
660INSN(tlbfill, empty)
661INSN(tlbclr, empty)
662INSN(tlbflush, empty)
663INSN(invtlb, i_rr)
664INSN(cacop, cop_r_i)
665INSN(lddir, rr_i)
666INSN(ldpte, j_i)
667INSN(ertn, empty)
668INSN(idle, i)
669INSN(dbcl, i)
670
671#define output_fcmp(C, PREFIX, SUFFIX) \
672{ \
673 (C)->info->fprintf_func((C)->info->stream, "%08x %s%s\tfcc%d, f%d, f%d", \
674 (C)->insn, PREFIX, SUFFIX, a->cd, \
675 a->fj, a->fk); \
676}
677
678static bool output_cff_fcond(DisasContext *ctx, arg_cff_fcond * a,
679 const char *suffix)
680{
681 bool ret = true;
682 switch (a->fcond) {
683 case 0x0:
684 output_fcmp(ctx, "fcmp_caf_", suffix);
685 break;
686 case 0x1:
687 output_fcmp(ctx, "fcmp_saf_", suffix);
688 break;
689 case 0x2:
690 output_fcmp(ctx, "fcmp_clt_", suffix);
691 break;
692 case 0x3:
693 output_fcmp(ctx, "fcmp_slt_", suffix);
694 break;
695 case 0x4:
696 output_fcmp(ctx, "fcmp_ceq_", suffix);
697 break;
698 case 0x5:
699 output_fcmp(ctx, "fcmp_seq_", suffix);
700 break;
701 case 0x6:
702 output_fcmp(ctx, "fcmp_cle_", suffix);
703 break;
704 case 0x7:
705 output_fcmp(ctx, "fcmp_sle_", suffix);
706 break;
707 case 0x8:
708 output_fcmp(ctx, "fcmp_cun_", suffix);
709 break;
710 case 0x9:
711 output_fcmp(ctx, "fcmp_sun_", suffix);
712 break;
713 case 0xA:
714 output_fcmp(ctx, "fcmp_cult_", suffix);
715 break;
716 case 0xB:
717 output_fcmp(ctx, "fcmp_sult_", suffix);
718 break;
719 case 0xC:
720 output_fcmp(ctx, "fcmp_cueq_", suffix);
721 break;
722 case 0xD:
723 output_fcmp(ctx, "fcmp_sueq_", suffix);
724 break;
725 case 0xE:
726 output_fcmp(ctx, "fcmp_cule_", suffix);
727 break;
728 case 0xF:
729 output_fcmp(ctx, "fcmp_sule_", suffix);
730 break;
731 case 0x10:
732 output_fcmp(ctx, "fcmp_cne_", suffix);
733 break;
734 case 0x11:
735 output_fcmp(ctx, "fcmp_sne_", suffix);
736 break;
737 case 0x14:
738 output_fcmp(ctx, "fcmp_cor_", suffix);
739 break;
740 case 0x15:
741 output_fcmp(ctx, "fcmp_sor_", suffix);
742 break;
743 case 0x18:
744 output_fcmp(ctx, "fcmp_cune_", suffix);
745 break;
746 case 0x19:
747 output_fcmp(ctx, "fcmp_sune_", suffix);
748 break;
749 default:
750 ret = false;
751 }
752 return ret;
753}
754
755#define FCMP_INSN(suffix) \
756static bool trans_fcmp_cond_##suffix(DisasContext *ctx, \
757 arg_cff_fcond * a) \
758{ \
759 return output_cff_fcond(ctx, a, #suffix); \
760}
761
762FCMP_INSN(s)
763FCMP_INSN(d)
764
765#define PCADD_INSN(name) \
766static bool trans_##name(DisasContext *ctx, arg_##name *a) \
767{ \
768 output(ctx, #name, "r%d, %d # 0x%" PRIx64, \
769 a->rd, a->imm, gen_##name(ctx->pc, a->imm)); \
770 return true; \
771}
772
773static uint64_t gen_pcaddi(uint64_t pc, int imm)
774{
775 return pc + (imm << 2);
776}
777
778static uint64_t gen_pcalau12i(uint64_t pc, int imm)
779{
780 return (pc + (imm << 12)) & ~0xfff;
781}
782
783static uint64_t gen_pcaddu12i(uint64_t pc, int imm)
784{
785 return pc + (imm << 12);
786}
787
788static uint64_t gen_pcaddu18i(uint64_t pc, int imm)
789{
790 return pc + ((uint64_t)(imm) << 18);
791}
792
793PCADD_INSN(pcaddi)
794PCADD_INSN(pcalau12i)
795PCADD_INSN(pcaddu12i)
796PCADD_INSN(pcaddu18i)
797
798#define INSN_LSX(insn, type) \
799static bool trans_##insn(DisasContext *ctx, arg_##type * a) \
800{ \
801 output_##type(ctx, a, #insn); \
802 return true; \
803}
804
805static void output_cv(DisasContext *ctx, arg_cv *a,
806 const char *mnemonic)
807{
808 output(ctx, mnemonic, "fcc%d, v%d", a->cd, a->vj);
809}
810
811static void output_vvv(DisasContext *ctx, arg_vvv *a, const char *mnemonic)
812{
813 output(ctx, mnemonic, "v%d, v%d, v%d", a->vd, a->vj, a->vk);
814}
815
816static void output_vv_i(DisasContext *ctx, arg_vv_i *a, const char *mnemonic)
817{
818 output(ctx, mnemonic, "v%d, v%d, 0x%x", a->vd, a->vj, a->imm);
819}
820
821static void output_vv(DisasContext *ctx, arg_vv *a, const char *mnemonic)
822{
823 output(ctx, mnemonic, "v%d, v%d", a->vd, a->vj);
824}
825
826static void output_vvvv(DisasContext *ctx, arg_vvvv *a, const char *mnemonic)
827{
828 output(ctx, mnemonic, "v%d, v%d, v%d, v%d", a->vd, a->vj, a->vk, a->va);
829}
830
831static void output_vr_i(DisasContext *ctx, arg_vr_i *a, const char *mnemonic)
832{
833 output(ctx, mnemonic, "v%d, r%d, 0x%x", a->vd, a->rj, a->imm);
834}
835
836static void output_vr_ii(DisasContext *ctx, arg_vr_ii *a, const char *mnemonic)
837{
838 output(ctx, mnemonic, "v%d, r%d, 0x%x, 0x%x", a->vd, a->rj, a->imm, a->imm2);
839}
840
841static void output_rv_i(DisasContext *ctx, arg_rv_i *a, const char *mnemonic)
842{
843 output(ctx, mnemonic, "r%d, v%d, 0x%x", a->rd, a->vj, a->imm);
844}
845
846static void output_vr(DisasContext *ctx, arg_vr *a, const char *mnemonic)
847{
848 output(ctx, mnemonic, "v%d, r%d", a->vd, a->rj);
849}
850
851static void output_vvr(DisasContext *ctx, arg_vvr *a, const char *mnemonic)
852{
853 output(ctx, mnemonic, "v%d, v%d, r%d", a->vd, a->vj, a->rk);
854}
855
856static void output_vrr(DisasContext *ctx, arg_vrr *a, const char *mnemonic)
857{
858 output(ctx, mnemonic, "v%d, r%d, r%d", a->vd, a->rj, a->rk);
859}
860
861static void output_v_i(DisasContext *ctx, arg_v_i *a, const char *mnemonic)
862{
863 output(ctx, mnemonic, "v%d, 0x%x", a->vd, a->imm);
864}
865
866INSN_LSX(vadd_b, vvv)
867INSN_LSX(vadd_h, vvv)
868INSN_LSX(vadd_w, vvv)
869INSN_LSX(vadd_d, vvv)
870INSN_LSX(vadd_q, vvv)
871INSN_LSX(vsub_b, vvv)
872INSN_LSX(vsub_h, vvv)
873INSN_LSX(vsub_w, vvv)
874INSN_LSX(vsub_d, vvv)
875INSN_LSX(vsub_q, vvv)
876
877INSN_LSX(vaddi_bu, vv_i)
878INSN_LSX(vaddi_hu, vv_i)
879INSN_LSX(vaddi_wu, vv_i)
880INSN_LSX(vaddi_du, vv_i)
881INSN_LSX(vsubi_bu, vv_i)
882INSN_LSX(vsubi_hu, vv_i)
883INSN_LSX(vsubi_wu, vv_i)
884INSN_LSX(vsubi_du, vv_i)
885
886INSN_LSX(vneg_b, vv)
887INSN_LSX(vneg_h, vv)
888INSN_LSX(vneg_w, vv)
889INSN_LSX(vneg_d, vv)
890
891INSN_LSX(vsadd_b, vvv)
892INSN_LSX(vsadd_h, vvv)
893INSN_LSX(vsadd_w, vvv)
894INSN_LSX(vsadd_d, vvv)
895INSN_LSX(vsadd_bu, vvv)
896INSN_LSX(vsadd_hu, vvv)
897INSN_LSX(vsadd_wu, vvv)
898INSN_LSX(vsadd_du, vvv)
899INSN_LSX(vssub_b, vvv)
900INSN_LSX(vssub_h, vvv)
901INSN_LSX(vssub_w, vvv)
902INSN_LSX(vssub_d, vvv)
903INSN_LSX(vssub_bu, vvv)
904INSN_LSX(vssub_hu, vvv)
905INSN_LSX(vssub_wu, vvv)
906INSN_LSX(vssub_du, vvv)
907
908INSN_LSX(vhaddw_h_b, vvv)
909INSN_LSX(vhaddw_w_h, vvv)
910INSN_LSX(vhaddw_d_w, vvv)
911INSN_LSX(vhaddw_q_d, vvv)
912INSN_LSX(vhaddw_hu_bu, vvv)
913INSN_LSX(vhaddw_wu_hu, vvv)
914INSN_LSX(vhaddw_du_wu, vvv)
915INSN_LSX(vhaddw_qu_du, vvv)
916INSN_LSX(vhsubw_h_b, vvv)
917INSN_LSX(vhsubw_w_h, vvv)
918INSN_LSX(vhsubw_d_w, vvv)
919INSN_LSX(vhsubw_q_d, vvv)
920INSN_LSX(vhsubw_hu_bu, vvv)
921INSN_LSX(vhsubw_wu_hu, vvv)
922INSN_LSX(vhsubw_du_wu, vvv)
923INSN_LSX(vhsubw_qu_du, vvv)
924
925INSN_LSX(vaddwev_h_b, vvv)
926INSN_LSX(vaddwev_w_h, vvv)
927INSN_LSX(vaddwev_d_w, vvv)
928INSN_LSX(vaddwev_q_d, vvv)
929INSN_LSX(vaddwod_h_b, vvv)
930INSN_LSX(vaddwod_w_h, vvv)
931INSN_LSX(vaddwod_d_w, vvv)
932INSN_LSX(vaddwod_q_d, vvv)
933INSN_LSX(vsubwev_h_b, vvv)
934INSN_LSX(vsubwev_w_h, vvv)
935INSN_LSX(vsubwev_d_w, vvv)
936INSN_LSX(vsubwev_q_d, vvv)
937INSN_LSX(vsubwod_h_b, vvv)
938INSN_LSX(vsubwod_w_h, vvv)
939INSN_LSX(vsubwod_d_w, vvv)
940INSN_LSX(vsubwod_q_d, vvv)
941
942INSN_LSX(vaddwev_h_bu, vvv)
943INSN_LSX(vaddwev_w_hu, vvv)
944INSN_LSX(vaddwev_d_wu, vvv)
945INSN_LSX(vaddwev_q_du, vvv)
946INSN_LSX(vaddwod_h_bu, vvv)
947INSN_LSX(vaddwod_w_hu, vvv)
948INSN_LSX(vaddwod_d_wu, vvv)
949INSN_LSX(vaddwod_q_du, vvv)
950INSN_LSX(vsubwev_h_bu, vvv)
951INSN_LSX(vsubwev_w_hu, vvv)
952INSN_LSX(vsubwev_d_wu, vvv)
953INSN_LSX(vsubwev_q_du, vvv)
954INSN_LSX(vsubwod_h_bu, vvv)
955INSN_LSX(vsubwod_w_hu, vvv)
956INSN_LSX(vsubwod_d_wu, vvv)
957INSN_LSX(vsubwod_q_du, vvv)
958
959INSN_LSX(vaddwev_h_bu_b, vvv)
960INSN_LSX(vaddwev_w_hu_h, vvv)
961INSN_LSX(vaddwev_d_wu_w, vvv)
962INSN_LSX(vaddwev_q_du_d, vvv)
963INSN_LSX(vaddwod_h_bu_b, vvv)
964INSN_LSX(vaddwod_w_hu_h, vvv)
965INSN_LSX(vaddwod_d_wu_w, vvv)
966INSN_LSX(vaddwod_q_du_d, vvv)
967
968INSN_LSX(vavg_b, vvv)
969INSN_LSX(vavg_h, vvv)
970INSN_LSX(vavg_w, vvv)
971INSN_LSX(vavg_d, vvv)
972INSN_LSX(vavg_bu, vvv)
973INSN_LSX(vavg_hu, vvv)
974INSN_LSX(vavg_wu, vvv)
975INSN_LSX(vavg_du, vvv)
976INSN_LSX(vavgr_b, vvv)
977INSN_LSX(vavgr_h, vvv)
978INSN_LSX(vavgr_w, vvv)
979INSN_LSX(vavgr_d, vvv)
980INSN_LSX(vavgr_bu, vvv)
981INSN_LSX(vavgr_hu, vvv)
982INSN_LSX(vavgr_wu, vvv)
983INSN_LSX(vavgr_du, vvv)
984
985INSN_LSX(vabsd_b, vvv)
986INSN_LSX(vabsd_h, vvv)
987INSN_LSX(vabsd_w, vvv)
988INSN_LSX(vabsd_d, vvv)
989INSN_LSX(vabsd_bu, vvv)
990INSN_LSX(vabsd_hu, vvv)
991INSN_LSX(vabsd_wu, vvv)
992INSN_LSX(vabsd_du, vvv)
993
994INSN_LSX(vadda_b, vvv)
995INSN_LSX(vadda_h, vvv)
996INSN_LSX(vadda_w, vvv)
997INSN_LSX(vadda_d, vvv)
998
999INSN_LSX(vmax_b, vvv)
1000INSN_LSX(vmax_h, vvv)
1001INSN_LSX(vmax_w, vvv)
1002INSN_LSX(vmax_d, vvv)
1003INSN_LSX(vmin_b, vvv)
1004INSN_LSX(vmin_h, vvv)
1005INSN_LSX(vmin_w, vvv)
1006INSN_LSX(vmin_d, vvv)
1007INSN_LSX(vmax_bu, vvv)
1008INSN_LSX(vmax_hu, vvv)
1009INSN_LSX(vmax_wu, vvv)
1010INSN_LSX(vmax_du, vvv)
1011INSN_LSX(vmin_bu, vvv)
1012INSN_LSX(vmin_hu, vvv)
1013INSN_LSX(vmin_wu, vvv)
1014INSN_LSX(vmin_du, vvv)
1015INSN_LSX(vmaxi_b, vv_i)
1016INSN_LSX(vmaxi_h, vv_i)
1017INSN_LSX(vmaxi_w, vv_i)
1018INSN_LSX(vmaxi_d, vv_i)
1019INSN_LSX(vmini_b, vv_i)
1020INSN_LSX(vmini_h, vv_i)
1021INSN_LSX(vmini_w, vv_i)
1022INSN_LSX(vmini_d, vv_i)
1023INSN_LSX(vmaxi_bu, vv_i)
1024INSN_LSX(vmaxi_hu, vv_i)
1025INSN_LSX(vmaxi_wu, vv_i)
1026INSN_LSX(vmaxi_du, vv_i)
1027INSN_LSX(vmini_bu, vv_i)
1028INSN_LSX(vmini_hu, vv_i)
1029INSN_LSX(vmini_wu, vv_i)
1030INSN_LSX(vmini_du, vv_i)
1031
1032INSN_LSX(vmul_b, vvv)
1033INSN_LSX(vmul_h, vvv)
1034INSN_LSX(vmul_w, vvv)
1035INSN_LSX(vmul_d, vvv)
1036INSN_LSX(vmuh_b, vvv)
1037INSN_LSX(vmuh_h, vvv)
1038INSN_LSX(vmuh_w, vvv)
1039INSN_LSX(vmuh_d, vvv)
1040INSN_LSX(vmuh_bu, vvv)
1041INSN_LSX(vmuh_hu, vvv)
1042INSN_LSX(vmuh_wu, vvv)
1043INSN_LSX(vmuh_du, vvv)
1044
1045INSN_LSX(vmulwev_h_b, vvv)
1046INSN_LSX(vmulwev_w_h, vvv)
1047INSN_LSX(vmulwev_d_w, vvv)
1048INSN_LSX(vmulwev_q_d, vvv)
1049INSN_LSX(vmulwod_h_b, vvv)
1050INSN_LSX(vmulwod_w_h, vvv)
1051INSN_LSX(vmulwod_d_w, vvv)
1052INSN_LSX(vmulwod_q_d, vvv)
1053INSN_LSX(vmulwev_h_bu, vvv)
1054INSN_LSX(vmulwev_w_hu, vvv)
1055INSN_LSX(vmulwev_d_wu, vvv)
1056INSN_LSX(vmulwev_q_du, vvv)
1057INSN_LSX(vmulwod_h_bu, vvv)
1058INSN_LSX(vmulwod_w_hu, vvv)
1059INSN_LSX(vmulwod_d_wu, vvv)
1060INSN_LSX(vmulwod_q_du, vvv)
1061INSN_LSX(vmulwev_h_bu_b, vvv)
1062INSN_LSX(vmulwev_w_hu_h, vvv)
1063INSN_LSX(vmulwev_d_wu_w, vvv)
1064INSN_LSX(vmulwev_q_du_d, vvv)
1065INSN_LSX(vmulwod_h_bu_b, vvv)
1066INSN_LSX(vmulwod_w_hu_h, vvv)
1067INSN_LSX(vmulwod_d_wu_w, vvv)
1068INSN_LSX(vmulwod_q_du_d, vvv)
1069
1070INSN_LSX(vmadd_b, vvv)
1071INSN_LSX(vmadd_h, vvv)
1072INSN_LSX(vmadd_w, vvv)
1073INSN_LSX(vmadd_d, vvv)
1074INSN_LSX(vmsub_b, vvv)
1075INSN_LSX(vmsub_h, vvv)
1076INSN_LSX(vmsub_w, vvv)
1077INSN_LSX(vmsub_d, vvv)
1078
1079INSN_LSX(vmaddwev_h_b, vvv)
1080INSN_LSX(vmaddwev_w_h, vvv)
1081INSN_LSX(vmaddwev_d_w, vvv)
1082INSN_LSX(vmaddwev_q_d, vvv)
1083INSN_LSX(vmaddwod_h_b, vvv)
1084INSN_LSX(vmaddwod_w_h, vvv)
1085INSN_LSX(vmaddwod_d_w, vvv)
1086INSN_LSX(vmaddwod_q_d, vvv)
1087INSN_LSX(vmaddwev_h_bu, vvv)
1088INSN_LSX(vmaddwev_w_hu, vvv)
1089INSN_LSX(vmaddwev_d_wu, vvv)
1090INSN_LSX(vmaddwev_q_du, vvv)
1091INSN_LSX(vmaddwod_h_bu, vvv)
1092INSN_LSX(vmaddwod_w_hu, vvv)
1093INSN_LSX(vmaddwod_d_wu, vvv)
1094INSN_LSX(vmaddwod_q_du, vvv)
1095INSN_LSX(vmaddwev_h_bu_b, vvv)
1096INSN_LSX(vmaddwev_w_hu_h, vvv)
1097INSN_LSX(vmaddwev_d_wu_w, vvv)
1098INSN_LSX(vmaddwev_q_du_d, vvv)
1099INSN_LSX(vmaddwod_h_bu_b, vvv)
1100INSN_LSX(vmaddwod_w_hu_h, vvv)
1101INSN_LSX(vmaddwod_d_wu_w, vvv)
1102INSN_LSX(vmaddwod_q_du_d, vvv)
1103
1104INSN_LSX(vdiv_b, vvv)
1105INSN_LSX(vdiv_h, vvv)
1106INSN_LSX(vdiv_w, vvv)
1107INSN_LSX(vdiv_d, vvv)
1108INSN_LSX(vdiv_bu, vvv)
1109INSN_LSX(vdiv_hu, vvv)
1110INSN_LSX(vdiv_wu, vvv)
1111INSN_LSX(vdiv_du, vvv)
1112INSN_LSX(vmod_b, vvv)
1113INSN_LSX(vmod_h, vvv)
1114INSN_LSX(vmod_w, vvv)
1115INSN_LSX(vmod_d, vvv)
1116INSN_LSX(vmod_bu, vvv)
1117INSN_LSX(vmod_hu, vvv)
1118INSN_LSX(vmod_wu, vvv)
1119INSN_LSX(vmod_du, vvv)
1120
1121INSN_LSX(vsat_b, vv_i)
1122INSN_LSX(vsat_h, vv_i)
1123INSN_LSX(vsat_w, vv_i)
1124INSN_LSX(vsat_d, vv_i)
1125INSN_LSX(vsat_bu, vv_i)
1126INSN_LSX(vsat_hu, vv_i)
1127INSN_LSX(vsat_wu, vv_i)
1128INSN_LSX(vsat_du, vv_i)
1129
1130INSN_LSX(vexth_h_b, vv)
1131INSN_LSX(vexth_w_h, vv)
1132INSN_LSX(vexth_d_w, vv)
1133INSN_LSX(vexth_q_d, vv)
1134INSN_LSX(vexth_hu_bu, vv)
1135INSN_LSX(vexth_wu_hu, vv)
1136INSN_LSX(vexth_du_wu, vv)
1137INSN_LSX(vexth_qu_du, vv)
1138
1139INSN_LSX(vsigncov_b, vvv)
1140INSN_LSX(vsigncov_h, vvv)
1141INSN_LSX(vsigncov_w, vvv)
1142INSN_LSX(vsigncov_d, vvv)
1143
1144INSN_LSX(vmskltz_b, vv)
1145INSN_LSX(vmskltz_h, vv)
1146INSN_LSX(vmskltz_w, vv)
1147INSN_LSX(vmskltz_d, vv)
1148INSN_LSX(vmskgez_b, vv)
1149INSN_LSX(vmsknz_b, vv)
1150
1151INSN_LSX(vldi, v_i)
1152
1153INSN_LSX(vand_v, vvv)
1154INSN_LSX(vor_v, vvv)
1155INSN_LSX(vxor_v, vvv)
1156INSN_LSX(vnor_v, vvv)
1157INSN_LSX(vandn_v, vvv)
1158INSN_LSX(vorn_v, vvv)
1159
1160INSN_LSX(vandi_b, vv_i)
1161INSN_LSX(vori_b, vv_i)
1162INSN_LSX(vxori_b, vv_i)
1163INSN_LSX(vnori_b, vv_i)
1164
1165INSN_LSX(vsll_b, vvv)
1166INSN_LSX(vsll_h, vvv)
1167INSN_LSX(vsll_w, vvv)
1168INSN_LSX(vsll_d, vvv)
1169INSN_LSX(vslli_b, vv_i)
1170INSN_LSX(vslli_h, vv_i)
1171INSN_LSX(vslli_w, vv_i)
1172INSN_LSX(vslli_d, vv_i)
1173
1174INSN_LSX(vsrl_b, vvv)
1175INSN_LSX(vsrl_h, vvv)
1176INSN_LSX(vsrl_w, vvv)
1177INSN_LSX(vsrl_d, vvv)
1178INSN_LSX(vsrli_b, vv_i)
1179INSN_LSX(vsrli_h, vv_i)
1180INSN_LSX(vsrli_w, vv_i)
1181INSN_LSX(vsrli_d, vv_i)
1182
1183INSN_LSX(vsra_b, vvv)
1184INSN_LSX(vsra_h, vvv)
1185INSN_LSX(vsra_w, vvv)
1186INSN_LSX(vsra_d, vvv)
1187INSN_LSX(vsrai_b, vv_i)
1188INSN_LSX(vsrai_h, vv_i)
1189INSN_LSX(vsrai_w, vv_i)
1190INSN_LSX(vsrai_d, vv_i)
1191
1192INSN_LSX(vrotr_b, vvv)
1193INSN_LSX(vrotr_h, vvv)
1194INSN_LSX(vrotr_w, vvv)
1195INSN_LSX(vrotr_d, vvv)
1196INSN_LSX(vrotri_b, vv_i)
1197INSN_LSX(vrotri_h, vv_i)
1198INSN_LSX(vrotri_w, vv_i)
1199INSN_LSX(vrotri_d, vv_i)
1200
1201INSN_LSX(vsllwil_h_b, vv_i)
1202INSN_LSX(vsllwil_w_h, vv_i)
1203INSN_LSX(vsllwil_d_w, vv_i)
1204INSN_LSX(vextl_q_d, vv)
1205INSN_LSX(vsllwil_hu_bu, vv_i)
1206INSN_LSX(vsllwil_wu_hu, vv_i)
1207INSN_LSX(vsllwil_du_wu, vv_i)
1208INSN_LSX(vextl_qu_du, vv)
1209
1210INSN_LSX(vsrlr_b, vvv)
1211INSN_LSX(vsrlr_h, vvv)
1212INSN_LSX(vsrlr_w, vvv)
1213INSN_LSX(vsrlr_d, vvv)
1214INSN_LSX(vsrlri_b, vv_i)
1215INSN_LSX(vsrlri_h, vv_i)
1216INSN_LSX(vsrlri_w, vv_i)
1217INSN_LSX(vsrlri_d, vv_i)
1218
1219INSN_LSX(vsrar_b, vvv)
1220INSN_LSX(vsrar_h, vvv)
1221INSN_LSX(vsrar_w, vvv)
1222INSN_LSX(vsrar_d, vvv)
1223INSN_LSX(vsrari_b, vv_i)
1224INSN_LSX(vsrari_h, vv_i)
1225INSN_LSX(vsrari_w, vv_i)
1226INSN_LSX(vsrari_d, vv_i)
1227
1228INSN_LSX(vsrln_b_h, vvv)
1229INSN_LSX(vsrln_h_w, vvv)
1230INSN_LSX(vsrln_w_d, vvv)
1231INSN_LSX(vsran_b_h, vvv)
1232INSN_LSX(vsran_h_w, vvv)
1233INSN_LSX(vsran_w_d, vvv)
1234
1235INSN_LSX(vsrlni_b_h, vv_i)
1236INSN_LSX(vsrlni_h_w, vv_i)
1237INSN_LSX(vsrlni_w_d, vv_i)
1238INSN_LSX(vsrlni_d_q, vv_i)
1239INSN_LSX(vsrani_b_h, vv_i)
1240INSN_LSX(vsrani_h_w, vv_i)
1241INSN_LSX(vsrani_w_d, vv_i)
1242INSN_LSX(vsrani_d_q, vv_i)
1243
1244INSN_LSX(vsrlrn_b_h, vvv)
1245INSN_LSX(vsrlrn_h_w, vvv)
1246INSN_LSX(vsrlrn_w_d, vvv)
1247INSN_LSX(vsrarn_b_h, vvv)
1248INSN_LSX(vsrarn_h_w, vvv)
1249INSN_LSX(vsrarn_w_d, vvv)
1250
1251INSN_LSX(vsrlrni_b_h, vv_i)
1252INSN_LSX(vsrlrni_h_w, vv_i)
1253INSN_LSX(vsrlrni_w_d, vv_i)
1254INSN_LSX(vsrlrni_d_q, vv_i)
1255INSN_LSX(vsrarni_b_h, vv_i)
1256INSN_LSX(vsrarni_h_w, vv_i)
1257INSN_LSX(vsrarni_w_d, vv_i)
1258INSN_LSX(vsrarni_d_q, vv_i)
1259
1260INSN_LSX(vssrln_b_h, vvv)
1261INSN_LSX(vssrln_h_w, vvv)
1262INSN_LSX(vssrln_w_d, vvv)
1263INSN_LSX(vssran_b_h, vvv)
1264INSN_LSX(vssran_h_w, vvv)
1265INSN_LSX(vssran_w_d, vvv)
1266INSN_LSX(vssrln_bu_h, vvv)
1267INSN_LSX(vssrln_hu_w, vvv)
1268INSN_LSX(vssrln_wu_d, vvv)
1269INSN_LSX(vssran_bu_h, vvv)
1270INSN_LSX(vssran_hu_w, vvv)
1271INSN_LSX(vssran_wu_d, vvv)
1272
1273INSN_LSX(vssrlni_b_h, vv_i)
1274INSN_LSX(vssrlni_h_w, vv_i)
1275INSN_LSX(vssrlni_w_d, vv_i)
1276INSN_LSX(vssrlni_d_q, vv_i)
1277INSN_LSX(vssrani_b_h, vv_i)
1278INSN_LSX(vssrani_h_w, vv_i)
1279INSN_LSX(vssrani_w_d, vv_i)
1280INSN_LSX(vssrani_d_q, vv_i)
1281INSN_LSX(vssrlni_bu_h, vv_i)
1282INSN_LSX(vssrlni_hu_w, vv_i)
1283INSN_LSX(vssrlni_wu_d, vv_i)
1284INSN_LSX(vssrlni_du_q, vv_i)
1285INSN_LSX(vssrani_bu_h, vv_i)
1286INSN_LSX(vssrani_hu_w, vv_i)
1287INSN_LSX(vssrani_wu_d, vv_i)
1288INSN_LSX(vssrani_du_q, vv_i)
1289
1290INSN_LSX(vssrlrn_b_h, vvv)
1291INSN_LSX(vssrlrn_h_w, vvv)
1292INSN_LSX(vssrlrn_w_d, vvv)
1293INSN_LSX(vssrarn_b_h, vvv)
1294INSN_LSX(vssrarn_h_w, vvv)
1295INSN_LSX(vssrarn_w_d, vvv)
1296INSN_LSX(vssrlrn_bu_h, vvv)
1297INSN_LSX(vssrlrn_hu_w, vvv)
1298INSN_LSX(vssrlrn_wu_d, vvv)
1299INSN_LSX(vssrarn_bu_h, vvv)
1300INSN_LSX(vssrarn_hu_w, vvv)
1301INSN_LSX(vssrarn_wu_d, vvv)
1302
1303INSN_LSX(vssrlrni_b_h, vv_i)
1304INSN_LSX(vssrlrni_h_w, vv_i)
1305INSN_LSX(vssrlrni_w_d, vv_i)
1306INSN_LSX(vssrlrni_d_q, vv_i)
1307INSN_LSX(vssrlrni_bu_h, vv_i)
1308INSN_LSX(vssrlrni_hu_w, vv_i)
1309INSN_LSX(vssrlrni_wu_d, vv_i)
1310INSN_LSX(vssrlrni_du_q, vv_i)
1311INSN_LSX(vssrarni_b_h, vv_i)
1312INSN_LSX(vssrarni_h_w, vv_i)
1313INSN_LSX(vssrarni_w_d, vv_i)
1314INSN_LSX(vssrarni_d_q, vv_i)
1315INSN_LSX(vssrarni_bu_h, vv_i)
1316INSN_LSX(vssrarni_hu_w, vv_i)
1317INSN_LSX(vssrarni_wu_d, vv_i)
1318INSN_LSX(vssrarni_du_q, vv_i)
1319
1320INSN_LSX(vclo_b, vv)
1321INSN_LSX(vclo_h, vv)
1322INSN_LSX(vclo_w, vv)
1323INSN_LSX(vclo_d, vv)
1324INSN_LSX(vclz_b, vv)
1325INSN_LSX(vclz_h, vv)
1326INSN_LSX(vclz_w, vv)
1327INSN_LSX(vclz_d, vv)
1328
1329INSN_LSX(vpcnt_b, vv)
1330INSN_LSX(vpcnt_h, vv)
1331INSN_LSX(vpcnt_w, vv)
1332INSN_LSX(vpcnt_d, vv)
1333
1334INSN_LSX(vbitclr_b, vvv)
1335INSN_LSX(vbitclr_h, vvv)
1336INSN_LSX(vbitclr_w, vvv)
1337INSN_LSX(vbitclr_d, vvv)
1338INSN_LSX(vbitclri_b, vv_i)
1339INSN_LSX(vbitclri_h, vv_i)
1340INSN_LSX(vbitclri_w, vv_i)
1341INSN_LSX(vbitclri_d, vv_i)
1342INSN_LSX(vbitset_b, vvv)
1343INSN_LSX(vbitset_h, vvv)
1344INSN_LSX(vbitset_w, vvv)
1345INSN_LSX(vbitset_d, vvv)
1346INSN_LSX(vbitseti_b, vv_i)
1347INSN_LSX(vbitseti_h, vv_i)
1348INSN_LSX(vbitseti_w, vv_i)
1349INSN_LSX(vbitseti_d, vv_i)
1350INSN_LSX(vbitrev_b, vvv)
1351INSN_LSX(vbitrev_h, vvv)
1352INSN_LSX(vbitrev_w, vvv)
1353INSN_LSX(vbitrev_d, vvv)
1354INSN_LSX(vbitrevi_b, vv_i)
1355INSN_LSX(vbitrevi_h, vv_i)
1356INSN_LSX(vbitrevi_w, vv_i)
1357INSN_LSX(vbitrevi_d, vv_i)
1358
1359INSN_LSX(vfrstp_b, vvv)
1360INSN_LSX(vfrstp_h, vvv)
1361INSN_LSX(vfrstpi_b, vv_i)
1362INSN_LSX(vfrstpi_h, vv_i)
1363
1364INSN_LSX(vfadd_s, vvv)
1365INSN_LSX(vfadd_d, vvv)
1366INSN_LSX(vfsub_s, vvv)
1367INSN_LSX(vfsub_d, vvv)
1368INSN_LSX(vfmul_s, vvv)
1369INSN_LSX(vfmul_d, vvv)
1370INSN_LSX(vfdiv_s, vvv)
1371INSN_LSX(vfdiv_d, vvv)
1372
1373INSN_LSX(vfmadd_s, vvvv)
1374INSN_LSX(vfmadd_d, vvvv)
1375INSN_LSX(vfmsub_s, vvvv)
1376INSN_LSX(vfmsub_d, vvvv)
1377INSN_LSX(vfnmadd_s, vvvv)
1378INSN_LSX(vfnmadd_d, vvvv)
1379INSN_LSX(vfnmsub_s, vvvv)
1380INSN_LSX(vfnmsub_d, vvvv)
1381
1382INSN_LSX(vfmax_s, vvv)
1383INSN_LSX(vfmax_d, vvv)
1384INSN_LSX(vfmin_s, vvv)
1385INSN_LSX(vfmin_d, vvv)
1386
1387INSN_LSX(vfmaxa_s, vvv)
1388INSN_LSX(vfmaxa_d, vvv)
1389INSN_LSX(vfmina_s, vvv)
1390INSN_LSX(vfmina_d, vvv)
1391
1392INSN_LSX(vflogb_s, vv)
1393INSN_LSX(vflogb_d, vv)
1394
1395INSN_LSX(vfclass_s, vv)
1396INSN_LSX(vfclass_d, vv)
1397
1398INSN_LSX(vfsqrt_s, vv)
1399INSN_LSX(vfsqrt_d, vv)
1400INSN_LSX(vfrecip_s, vv)
1401INSN_LSX(vfrecip_d, vv)
1402INSN_LSX(vfrsqrt_s, vv)
1403INSN_LSX(vfrsqrt_d, vv)
1404
1405INSN_LSX(vfcvtl_s_h, vv)
1406INSN_LSX(vfcvth_s_h, vv)
1407INSN_LSX(vfcvtl_d_s, vv)
1408INSN_LSX(vfcvth_d_s, vv)
1409INSN_LSX(vfcvt_h_s, vvv)
1410INSN_LSX(vfcvt_s_d, vvv)
1411
1412INSN_LSX(vfrint_s, vv)
1413INSN_LSX(vfrint_d, vv)
1414INSN_LSX(vfrintrm_s, vv)
1415INSN_LSX(vfrintrm_d, vv)
1416INSN_LSX(vfrintrp_s, vv)
1417INSN_LSX(vfrintrp_d, vv)
1418INSN_LSX(vfrintrz_s, vv)
1419INSN_LSX(vfrintrz_d, vv)
1420INSN_LSX(vfrintrne_s, vv)
1421INSN_LSX(vfrintrne_d, vv)
1422
1423INSN_LSX(vftint_w_s, vv)
1424INSN_LSX(vftint_l_d, vv)
1425INSN_LSX(vftintrm_w_s, vv)
1426INSN_LSX(vftintrm_l_d, vv)
1427INSN_LSX(vftintrp_w_s, vv)
1428INSN_LSX(vftintrp_l_d, vv)
1429INSN_LSX(vftintrz_w_s, vv)
1430INSN_LSX(vftintrz_l_d, vv)
1431INSN_LSX(vftintrne_w_s, vv)
1432INSN_LSX(vftintrne_l_d, vv)
1433INSN_LSX(vftint_wu_s, vv)
1434INSN_LSX(vftint_lu_d, vv)
1435INSN_LSX(vftintrz_wu_s, vv)
1436INSN_LSX(vftintrz_lu_d, vv)
1437INSN_LSX(vftint_w_d, vvv)
1438INSN_LSX(vftintrm_w_d, vvv)
1439INSN_LSX(vftintrp_w_d, vvv)
1440INSN_LSX(vftintrz_w_d, vvv)
1441INSN_LSX(vftintrne_w_d, vvv)
1442INSN_LSX(vftintl_l_s, vv)
1443INSN_LSX(vftinth_l_s, vv)
1444INSN_LSX(vftintrml_l_s, vv)
1445INSN_LSX(vftintrmh_l_s, vv)
1446INSN_LSX(vftintrpl_l_s, vv)
1447INSN_LSX(vftintrph_l_s, vv)
1448INSN_LSX(vftintrzl_l_s, vv)
1449INSN_LSX(vftintrzh_l_s, vv)
1450INSN_LSX(vftintrnel_l_s, vv)
1451INSN_LSX(vftintrneh_l_s, vv)
1452
1453INSN_LSX(vffint_s_w, vv)
1454INSN_LSX(vffint_s_wu, vv)
1455INSN_LSX(vffint_d_l, vv)
1456INSN_LSX(vffint_d_lu, vv)
1457INSN_LSX(vffintl_d_w, vv)
1458INSN_LSX(vffinth_d_w, vv)
1459INSN_LSX(vffint_s_l, vvv)
1460
1461INSN_LSX(vseq_b, vvv)
1462INSN_LSX(vseq_h, vvv)
1463INSN_LSX(vseq_w, vvv)
1464INSN_LSX(vseq_d, vvv)
1465INSN_LSX(vseqi_b, vv_i)
1466INSN_LSX(vseqi_h, vv_i)
1467INSN_LSX(vseqi_w, vv_i)
1468INSN_LSX(vseqi_d, vv_i)
1469
1470INSN_LSX(vsle_b, vvv)
1471INSN_LSX(vsle_h, vvv)
1472INSN_LSX(vsle_w, vvv)
1473INSN_LSX(vsle_d, vvv)
1474INSN_LSX(vslei_b, vv_i)
1475INSN_LSX(vslei_h, vv_i)
1476INSN_LSX(vslei_w, vv_i)
1477INSN_LSX(vslei_d, vv_i)
1478INSN_LSX(vsle_bu, vvv)
1479INSN_LSX(vsle_hu, vvv)
1480INSN_LSX(vsle_wu, vvv)
1481INSN_LSX(vsle_du, vvv)
1482INSN_LSX(vslei_bu, vv_i)
1483INSN_LSX(vslei_hu, vv_i)
1484INSN_LSX(vslei_wu, vv_i)
1485INSN_LSX(vslei_du, vv_i)
1486
1487INSN_LSX(vslt_b, vvv)
1488INSN_LSX(vslt_h, vvv)
1489INSN_LSX(vslt_w, vvv)
1490INSN_LSX(vslt_d, vvv)
1491INSN_LSX(vslti_b, vv_i)
1492INSN_LSX(vslti_h, vv_i)
1493INSN_LSX(vslti_w, vv_i)
1494INSN_LSX(vslti_d, vv_i)
1495INSN_LSX(vslt_bu, vvv)
1496INSN_LSX(vslt_hu, vvv)
1497INSN_LSX(vslt_wu, vvv)
1498INSN_LSX(vslt_du, vvv)
1499INSN_LSX(vslti_bu, vv_i)
1500INSN_LSX(vslti_hu, vv_i)
1501INSN_LSX(vslti_wu, vv_i)
1502INSN_LSX(vslti_du, vv_i)
1503
1504#define output_vfcmp(C, PREFIX, SUFFIX) \
1505{ \
1506 (C)->info->fprintf_func((C)->info->stream, "%08x %s%s\t%d, f%d, f%d", \
1507 (C)->insn, PREFIX, SUFFIX, a->vd, \
1508 a->vj, a->vk); \
1509}
1510
1511static bool output_vvv_fcond(DisasContext *ctx, arg_vvv_fcond * a,
1512 const char *suffix)
1513{
1514 bool ret = true;
1515 switch (a->fcond) {
1516 case 0x0:
1517 output_vfcmp(ctx, "vfcmp_caf_", suffix);
1518 break;
1519 case 0x1:
1520 output_vfcmp(ctx, "vfcmp_saf_", suffix);
1521 break;
1522 case 0x2:
1523 output_vfcmp(ctx, "vfcmp_clt_", suffix);
1524 break;
1525 case 0x3:
1526 output_vfcmp(ctx, "vfcmp_slt_", suffix);
1527 break;
1528 case 0x4:
1529 output_vfcmp(ctx, "vfcmp_ceq_", suffix);
1530 break;
1531 case 0x5:
1532 output_vfcmp(ctx, "vfcmp_seq_", suffix);
1533 break;
1534 case 0x6:
1535 output_vfcmp(ctx, "vfcmp_cle_", suffix);
1536 break;
1537 case 0x7:
1538 output_vfcmp(ctx, "vfcmp_sle_", suffix);
1539 break;
1540 case 0x8:
1541 output_vfcmp(ctx, "vfcmp_cun_", suffix);
1542 break;
1543 case 0x9:
1544 output_vfcmp(ctx, "vfcmp_sun_", suffix);
1545 break;
1546 case 0xA:
1547 output_vfcmp(ctx, "vfcmp_cult_", suffix);
1548 break;
1549 case 0xB:
1550 output_vfcmp(ctx, "vfcmp_sult_", suffix);
1551 break;
1552 case 0xC:
1553 output_vfcmp(ctx, "vfcmp_cueq_", suffix);
1554 break;
1555 case 0xD:
1556 output_vfcmp(ctx, "vfcmp_sueq_", suffix);
1557 break;
1558 case 0xE:
1559 output_vfcmp(ctx, "vfcmp_cule_", suffix);
1560 break;
1561 case 0xF:
1562 output_vfcmp(ctx, "vfcmp_sule_", suffix);
1563 break;
1564 case 0x10:
1565 output_vfcmp(ctx, "vfcmp_cne_", suffix);
1566 break;
1567 case 0x11:
1568 output_vfcmp(ctx, "vfcmp_sne_", suffix);
1569 break;
1570 case 0x14:
1571 output_vfcmp(ctx, "vfcmp_cor_", suffix);
1572 break;
1573 case 0x15:
1574 output_vfcmp(ctx, "vfcmp_sor_", suffix);
1575 break;
1576 case 0x18:
1577 output_vfcmp(ctx, "vfcmp_cune_", suffix);
1578 break;
1579 case 0x19:
1580 output_vfcmp(ctx, "vfcmp_sune_", suffix);
1581 break;
1582 default:
1583 ret = false;
1584 }
1585 return ret;
1586}
1587
1588#define LSX_FCMP_INSN(suffix) \
1589static bool trans_vfcmp_cond_##suffix(DisasContext *ctx, \
1590 arg_vvv_fcond * a) \
1591{ \
1592 return output_vvv_fcond(ctx, a, #suffix); \
1593}
1594
1595LSX_FCMP_INSN(s)
1596LSX_FCMP_INSN(d)
1597
1598INSN_LSX(vbitsel_v, vvvv)
1599INSN_LSX(vbitseli_b, vv_i)
1600
1601INSN_LSX(vseteqz_v, cv)
1602INSN_LSX(vsetnez_v, cv)
1603INSN_LSX(vsetanyeqz_b, cv)
1604INSN_LSX(vsetanyeqz_h, cv)
1605INSN_LSX(vsetanyeqz_w, cv)
1606INSN_LSX(vsetanyeqz_d, cv)
1607INSN_LSX(vsetallnez_b, cv)
1608INSN_LSX(vsetallnez_h, cv)
1609INSN_LSX(vsetallnez_w, cv)
1610INSN_LSX(vsetallnez_d, cv)
1611
1612INSN_LSX(vinsgr2vr_b, vr_i)
1613INSN_LSX(vinsgr2vr_h, vr_i)
1614INSN_LSX(vinsgr2vr_w, vr_i)
1615INSN_LSX(vinsgr2vr_d, vr_i)
1616INSN_LSX(vpickve2gr_b, rv_i)
1617INSN_LSX(vpickve2gr_h, rv_i)
1618INSN_LSX(vpickve2gr_w, rv_i)
1619INSN_LSX(vpickve2gr_d, rv_i)
1620INSN_LSX(vpickve2gr_bu, rv_i)
1621INSN_LSX(vpickve2gr_hu, rv_i)
1622INSN_LSX(vpickve2gr_wu, rv_i)
1623INSN_LSX(vpickve2gr_du, rv_i)
1624
1625INSN_LSX(vreplgr2vr_b, vr)
1626INSN_LSX(vreplgr2vr_h, vr)
1627INSN_LSX(vreplgr2vr_w, vr)
1628INSN_LSX(vreplgr2vr_d, vr)
1629
1630INSN_LSX(vreplve_b, vvr)
1631INSN_LSX(vreplve_h, vvr)
1632INSN_LSX(vreplve_w, vvr)
1633INSN_LSX(vreplve_d, vvr)
1634INSN_LSX(vreplvei_b, vv_i)
1635INSN_LSX(vreplvei_h, vv_i)
1636INSN_LSX(vreplvei_w, vv_i)
1637INSN_LSX(vreplvei_d, vv_i)
1638
1639INSN_LSX(vbsll_v, vv_i)
1640INSN_LSX(vbsrl_v, vv_i)
1641
1642INSN_LSX(vpackev_b, vvv)
1643INSN_LSX(vpackev_h, vvv)
1644INSN_LSX(vpackev_w, vvv)
1645INSN_LSX(vpackev_d, vvv)
1646INSN_LSX(vpackod_b, vvv)
1647INSN_LSX(vpackod_h, vvv)
1648INSN_LSX(vpackod_w, vvv)
1649INSN_LSX(vpackod_d, vvv)
1650
1651INSN_LSX(vpickev_b, vvv)
1652INSN_LSX(vpickev_h, vvv)
1653INSN_LSX(vpickev_w, vvv)
1654INSN_LSX(vpickev_d, vvv)
1655INSN_LSX(vpickod_b, vvv)
1656INSN_LSX(vpickod_h, vvv)
1657INSN_LSX(vpickod_w, vvv)
1658INSN_LSX(vpickod_d, vvv)
1659
1660INSN_LSX(vilvl_b, vvv)
1661INSN_LSX(vilvl_h, vvv)
1662INSN_LSX(vilvl_w, vvv)
1663INSN_LSX(vilvl_d, vvv)
1664INSN_LSX(vilvh_b, vvv)
1665INSN_LSX(vilvh_h, vvv)
1666INSN_LSX(vilvh_w, vvv)
1667INSN_LSX(vilvh_d, vvv)
1668
1669INSN_LSX(vshuf_b, vvvv)
1670INSN_LSX(vshuf_h, vvv)
1671INSN_LSX(vshuf_w, vvv)
1672INSN_LSX(vshuf_d, vvv)
1673INSN_LSX(vshuf4i_b, vv_i)
1674INSN_LSX(vshuf4i_h, vv_i)
1675INSN_LSX(vshuf4i_w, vv_i)
1676INSN_LSX(vshuf4i_d, vv_i)
1677
1678INSN_LSX(vpermi_w, vv_i)
1679
1680INSN_LSX(vextrins_d, vv_i)
1681INSN_LSX(vextrins_w, vv_i)
1682INSN_LSX(vextrins_h, vv_i)
1683INSN_LSX(vextrins_b, vv_i)
1684
1685INSN_LSX(vld, vr_i)
1686INSN_LSX(vst, vr_i)
1687INSN_LSX(vldx, vrr)
1688INSN_LSX(vstx, vrr)
1689
1690INSN_LSX(vldrepl_d, vr_i)
1691INSN_LSX(vldrepl_w, vr_i)
1692INSN_LSX(vldrepl_h, vr_i)
1693INSN_LSX(vldrepl_b, vr_i)
1694INSN_LSX(vstelm_d, vr_ii)
1695INSN_LSX(vstelm_w, vr_ii)
1696INSN_LSX(vstelm_h, vr_ii)
1697INSN_LSX(vstelm_b, vr_ii)
1698
