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21#include "qemu/osdep.h"
22#include "qemu-common.h"
23#include "disas/bfd.h"
24
25#include "target-cris/opcode-cris.h"
26
27
28#define CONST_STRNEQ(STR1,STR2) (strncmp ((STR1), (STR2), sizeof (STR2) - 1) == 0)
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51#ifndef NULL
52#define NULL (0)
53#endif
54
55
56const struct cris_spec_reg
57cris_spec_regs[] =
58{
59 {"bz", 0, 1, cris_ver_v32p, NULL},
60 {"p0", 0, 1, 0, NULL},
61 {"vr", 1, 1, 0, NULL},
62 {"p1", 1, 1, 0, NULL},
63 {"pid", 2, 1, cris_ver_v32p, NULL},
64 {"p2", 2, 1, cris_ver_v32p, NULL},
65 {"p2", 2, 1, cris_ver_warning, NULL},
66 {"srs", 3, 1, cris_ver_v32p, NULL},
67 {"p3", 3, 1, cris_ver_v32p, NULL},
68 {"p3", 3, 1, cris_ver_warning, NULL},
69 {"wz", 4, 2, cris_ver_v32p, NULL},
70 {"p4", 4, 2, 0, NULL},
71 {"ccr", 5, 2, cris_ver_v0_10, NULL},
72 {"exs", 5, 4, cris_ver_v32p, NULL},
73 {"p5", 5, 2, cris_ver_v0_10, NULL},
74 {"p5", 5, 4, cris_ver_v32p, NULL},
75 {"dcr0",6, 2, cris_ver_v0_3, NULL},
76 {"eda", 6, 4, cris_ver_v32p, NULL},
77 {"p6", 6, 2, cris_ver_v0_3, NULL},
78 {"p6", 6, 4, cris_ver_v32p, NULL},
79 {"dcr1/mof", 7, 4, cris_ver_v10p,
80 "Register `dcr1/mof' with ambiguous size specified. Guessing 4 bytes"},
81 {"dcr1/mof", 7, 2, cris_ver_v0_3,
82 "Register `dcr1/mof' with ambiguous size specified. Guessing 2 bytes"},
83 {"mof", 7, 4, cris_ver_v10p, NULL},
84 {"dcr1",7, 2, cris_ver_v0_3, NULL},
85 {"p7", 7, 4, cris_ver_v10p, NULL},
86 {"p7", 7, 2, cris_ver_v0_3, NULL},
87 {"dz", 8, 4, cris_ver_v32p, NULL},
88 {"p8", 8, 4, 0, NULL},
89 {"ibr", 9, 4, cris_ver_v0_10, NULL},
90 {"ebp", 9, 4, cris_ver_v32p, NULL},
91 {"p9", 9, 4, 0, NULL},
92 {"irp", 10, 4, cris_ver_v0_10, NULL},
93 {"erp", 10, 4, cris_ver_v32p, NULL},
94 {"p10", 10, 4, 0, NULL},
95 {"srp", 11, 4, 0, NULL},
96 {"p11", 11, 4, 0, NULL},
97
98 {"bar/dtp0", 12, 4, cris_ver_warning,
99 "Ambiguous register `bar/dtp0' specified"},
100 {"nrp", 12, 4, cris_ver_v32p, NULL},
101 {"bar", 12, 4, cris_ver_v8_10, NULL},
102 {"dtp0",12, 4, cris_ver_v0_3, NULL},
103 {"p12", 12, 4, 0, NULL},
104
105 {"dccr/dtp1",13, 4, cris_ver_warning,
106 "Ambiguous register `dccr/dtp1' specified"},
107 {"ccs", 13, 4, cris_ver_v32p, NULL},
108 {"dccr",13, 4, cris_ver_v8_10, NULL},
109 {"dtp1",13, 4, cris_ver_v0_3, NULL},
110 {"p13", 13, 4, 0, NULL},
111 {"brp", 14, 4, cris_ver_v3_10, NULL},
112 {"usp", 14, 4, cris_ver_v32p, NULL},
113 {"p14", 14, 4, cris_ver_v3p, NULL},
114 {"usp", 15, 4, cris_ver_v10, NULL},
115 {"spc", 15, 4, cris_ver_v32p, NULL},
116 {"p15", 15, 4, cris_ver_v10p, NULL},
117 {NULL, 0, 0, cris_ver_version_all, NULL}
118};
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122
123const struct cris_support_reg cris_support_regs[] =
124{
125 {"s0", 0},
126 {"s1", 1},
127 {"s2", 2},
128 {"s3", 3},
129 {"s4", 4},
130 {"s5", 5},
131 {"s6", 6},
132 {"s7", 7},
133 {"s8", 8},
134 {"s9", 9},
135 {"s10", 10},
136 {"s11", 11},
137 {"s12", 12},
138 {"s13", 13},
139 {"s14", 14},
140 {"s15", 15},
141 {NULL, 0}
142};
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219const struct cris_opcode
220cris_opcodes[] =
221{
222 {"abs", 0x06B0, 0x0940, "r,R", 0, SIZE_NONE, 0,
223 cris_abs_op},
224
225 {"add", 0x0600, 0x09c0, "m r,R", 0, SIZE_NONE, 0,
226 cris_reg_mode_add_sub_cmp_and_or_move_op},
227
228 {"add", 0x0A00, 0x01c0, "m s,R", 0, SIZE_FIELD, 0,
229 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
230
231 {"add", 0x0A00, 0x01c0, "m S,D", 0, SIZE_NONE,
232 cris_ver_v0_10,
233 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
234
235 {"add", 0x0a00, 0x05c0, "m S,R,r", 0, SIZE_NONE,
236 cris_ver_v0_10,
237 cris_three_operand_add_sub_cmp_and_or_op},
238
239 {"add", 0x0A00, 0x01c0, "m s,R", 0, SIZE_FIELD,
240 cris_ver_v32p,
241 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
242
243 {"addc", 0x0570, 0x0A80, "r,R", 0, SIZE_FIX_32,
244 cris_ver_v32p,
245 cris_not_implemented_op},
246
247 {"addc", 0x09A0, 0x0250, "s,R", 0, SIZE_FIX_32,
248 cris_ver_v32p,
249 cris_not_implemented_op},
250
251 {"addi", 0x0540, 0x0A80, "x,r,A", 0, SIZE_NONE,
252 cris_ver_v32p,
253 cris_addi_op},
254
255 {"addi", 0x0500, 0x0Ac0, "x,r", 0, SIZE_NONE, 0,
256 cris_addi_op},
257
258
259
260 {"addoq", 0x0100, 0x0E00, "Q,A", 0, SIZE_NONE,
261 cris_ver_v32p,
262 cris_not_implemented_op},
263
264 {"addo", 0x0940, 0x0280, "m s,R,A", 0, SIZE_FIELD_SIGNED,
265 cris_ver_v32p,
266 cris_not_implemented_op},
267
268
269
270
271 {"addo", 0x0100, 0x0E00, "O,A", 0, SIZE_NONE,
272 cris_ver_v32p,
273 cris_not_implemented_op},
274
275 {"addq", 0x0200, 0x0Dc0, "I,R", 0, SIZE_NONE, 0,
276 cris_quick_mode_add_sub_op},
277
278 {"adds", 0x0420, 0x0Bc0, "z r,R", 0, SIZE_NONE, 0,
279 cris_reg_mode_add_sub_cmp_and_or_move_op},
280
281
282 {"adds", 0x0820, 0x03c0, "z s,R", 0, SIZE_FIELD, 0,
283 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
284
285 {"adds", 0x0820, 0x03c0, "z S,D", 0, SIZE_NONE,
286 cris_ver_v0_10,
287 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
288
289 {"adds", 0x0820, 0x07c0, "z S,R,r", 0, SIZE_NONE,
290 cris_ver_v0_10,
291 cris_three_operand_add_sub_cmp_and_or_op},
292
293 {"addu", 0x0400, 0x0be0, "z r,R", 0, SIZE_NONE, 0,
294 cris_reg_mode_add_sub_cmp_and_or_move_op},
295
296
297 {"addu", 0x0800, 0x03e0, "z s,R", 0, SIZE_FIELD, 0,
298 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
299
300 {"addu", 0x0800, 0x03e0, "z S,D", 0, SIZE_NONE,
301 cris_ver_v0_10,
302 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
303
304 {"addu", 0x0800, 0x07e0, "z S,R,r", 0, SIZE_NONE,
305 cris_ver_v0_10,
306 cris_three_operand_add_sub_cmp_and_or_op},
307
308 {"and", 0x0700, 0x08C0, "m r,R", 0, SIZE_NONE, 0,
309 cris_reg_mode_add_sub_cmp_and_or_move_op},
310
311 {"and", 0x0B00, 0x00C0, "m s,R", 0, SIZE_FIELD, 0,
312 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
313
314 {"and", 0x0B00, 0x00C0, "m S,D", 0, SIZE_NONE,
315 cris_ver_v0_10,
316 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
317
318 {"and", 0x0B00, 0x04C0, "m S,R,r", 0, SIZE_NONE,
319 cris_ver_v0_10,
320 cris_three_operand_add_sub_cmp_and_or_op},
321
322 {"andq", 0x0300, 0x0CC0, "i,R", 0, SIZE_NONE, 0,
323 cris_quick_mode_and_cmp_move_or_op},
324
325 {"asr", 0x0780, 0x0840, "m r,R", 0, SIZE_NONE, 0,
326 cris_asr_op},
327
328 {"asrq", 0x03a0, 0x0c40, "c,R", 0, SIZE_NONE, 0,
329 cris_asrq_op},
330
331 {"ax", 0x15B0, 0xEA4F, "", 0, SIZE_NONE, 0,
332 cris_ax_ei_setf_op},
333
334
335 {"b", 0x0dff, 0x0200, "b", 1, SIZE_NONE, 0,
336 cris_sixteen_bit_offset_branch_op},
337
338 {"ba",
339 BA_QUICK_OPCODE,
340 0x0F00+(0xF-CC_A)*0x1000, "o", 1, SIZE_NONE, 0,
341 cris_eight_bit_offset_branch_op},
342
343
344
345 {"ba", BA_DWORD_OPCODE,
346 0xffff & (~BA_DWORD_OPCODE), "n", 0, SIZE_FIX_32,
347 cris_ver_v32p,
348 cris_none_reg_mode_jump_op},
349
350 {"bas", 0x0EBF, 0x0140, "n,P", 0, SIZE_FIX_32,
351 cris_ver_v32p,
352 cris_none_reg_mode_jump_op},
353
354 {"basc", 0x0EFF, 0x0100, "n,P", 0, SIZE_FIX_32,
355 cris_ver_v32p,
356 cris_none_reg_mode_jump_op},
357
358 {"bcc",
359 BRANCH_QUICK_OPCODE+CC_CC*0x1000,
360 0x0f00+(0xF-CC_CC)*0x1000, "o", 1, SIZE_NONE, 0,
361 cris_eight_bit_offset_branch_op},
362
363 {"bcs",
364 BRANCH_QUICK_OPCODE+CC_CS*0x1000,
365 0x0f00+(0xF-CC_CS)*0x1000, "o", 1, SIZE_NONE, 0,
366 cris_eight_bit_offset_branch_op},
367
368 {"bdap",
369 BDAP_INDIR_OPCODE, BDAP_INDIR_Z_BITS, "pm s,R", 0, SIZE_FIELD_SIGNED,
370 cris_ver_v0_10,
371 cris_bdap_prefix},
372
373 {"bdap",
374 BDAP_QUICK_OPCODE, BDAP_QUICK_Z_BITS, "pO", 0, SIZE_NONE,
375 cris_ver_v0_10,
376 cris_quick_mode_bdap_prefix},
377
378 {"beq",
379 BRANCH_QUICK_OPCODE+CC_EQ*0x1000,
380 0x0f00+(0xF-CC_EQ)*0x1000, "o", 1, SIZE_NONE, 0,
381 cris_eight_bit_offset_branch_op},
382
383
384
385
386 {"bwf",
387 BRANCH_QUICK_OPCODE+CC_EXT*0x1000,
388 0x0f00+(0xF-CC_EXT)*0x1000, "o", 1, SIZE_NONE,
389 cris_ver_v10,
390 cris_eight_bit_offset_branch_op},
391
392 {"bext",
393 BRANCH_QUICK_OPCODE+CC_EXT*0x1000,
394 0x0f00+(0xF-CC_EXT)*0x1000, "o", 1, SIZE_NONE,
395 cris_ver_v0_3,
396 cris_eight_bit_offset_branch_op},
397
398 {"bge",
399 BRANCH_QUICK_OPCODE+CC_GE*0x1000,
400 0x0f00+(0xF-CC_GE)*0x1000, "o", 1, SIZE_NONE, 0,
401 cris_eight_bit_offset_branch_op},
402
403 {"bgt",
404 BRANCH_QUICK_OPCODE+CC_GT*0x1000,
405 0x0f00+(0xF-CC_GT)*0x1000, "o", 1, SIZE_NONE, 0,
406 cris_eight_bit_offset_branch_op},
407
408 {"bhi",
409 BRANCH_QUICK_OPCODE+CC_HI*0x1000,
410 0x0f00+(0xF-CC_HI)*0x1000, "o", 1, SIZE_NONE, 0,
411 cris_eight_bit_offset_branch_op},
412
413 {"bhs",
414 BRANCH_QUICK_OPCODE+CC_HS*0x1000,
415 0x0f00+(0xF-CC_HS)*0x1000, "o", 1, SIZE_NONE, 0,
416 cris_eight_bit_offset_branch_op},
417
418 {"biap", BIAP_OPCODE, BIAP_Z_BITS, "pm r,R", 0, SIZE_NONE,
419 cris_ver_v0_10,
420 cris_biap_prefix},
421
422 {"ble",
423 BRANCH_QUICK_OPCODE+CC_LE*0x1000,
424 0x0f00+(0xF-CC_LE)*0x1000, "o", 1, SIZE_NONE, 0,
425 cris_eight_bit_offset_branch_op},
426
427 {"blo",
428 BRANCH_QUICK_OPCODE+CC_LO*0x1000,
429 0x0f00+(0xF-CC_LO)*0x1000, "o", 1, SIZE_NONE, 0,
430 cris_eight_bit_offset_branch_op},
431
432 {"bls",
433 BRANCH_QUICK_OPCODE+CC_LS*0x1000,
434 0x0f00+(0xF-CC_LS)*0x1000, "o", 1, SIZE_NONE, 0,
435 cris_eight_bit_offset_branch_op},
436
437 {"blt",
438 BRANCH_QUICK_OPCODE+CC_LT*0x1000,
439 0x0f00+(0xF-CC_LT)*0x1000, "o", 1, SIZE_NONE, 0,
440 cris_eight_bit_offset_branch_op},
441
442 {"bmi",
443 BRANCH_QUICK_OPCODE+CC_MI*0x1000,
444 0x0f00+(0xF-CC_MI)*0x1000, "o", 1, SIZE_NONE, 0,
445 cris_eight_bit_offset_branch_op},
446
447 {"bmod", 0x0ab0, 0x0140, "s,R", 0, SIZE_FIX_32,
448 cris_ver_sim_v0_10,
449 cris_not_implemented_op},
450
451 {"bmod", 0x0ab0, 0x0140, "S,D", 0, SIZE_NONE,
452 cris_ver_sim_v0_10,
453 cris_not_implemented_op},
454
455 {"bmod", 0x0ab0, 0x0540, "S,R,r", 0, SIZE_NONE,
456 cris_ver_sim_v0_10,
457 cris_not_implemented_op},
458
459 {"bne",
460 BRANCH_QUICK_OPCODE+CC_NE*0x1000,
461 0x0f00+(0xF-CC_NE)*0x1000, "o", 1, SIZE_NONE, 0,
462 cris_eight_bit_offset_branch_op},
463
464 {"bound", 0x05c0, 0x0A00, "m r,R", 0, SIZE_NONE, 0,
465 cris_two_operand_bound_op},
466
467 {"bound", 0x09c0, 0x0200, "m s,R", 0, SIZE_FIELD,
468 cris_ver_v0_10,
469 cris_two_operand_bound_op},
470
471 {"bound", 0x0dcf, 0x0200, "m Y,R", 0, SIZE_FIELD, 0,
472 cris_two_operand_bound_op},
473 {"bound", 0x09c0, 0x0200, "m S,D", 0, SIZE_NONE,
474 cris_ver_v0_10,
475 cris_two_operand_bound_op},
476 {"bound", 0x09c0, 0x0600, "m S,R,r", 0, SIZE_NONE,
477 cris_ver_v0_10,
478 cris_three_operand_bound_op},
479
480 {"bpl",
481 BRANCH_QUICK_OPCODE+CC_PL*0x1000,
482 0x0f00+(0xF-CC_PL)*0x1000, "o", 1, SIZE_NONE, 0,
483 cris_eight_bit_offset_branch_op},
484
485 {"break", 0xe930, 0x16c0, "C", 0, SIZE_NONE,
486 cris_ver_v3p,
487 cris_break_op},
488
489 {"bsb",
490 BRANCH_QUICK_OPCODE+CC_EXT*0x1000,
491 0x0f00+(0xF-CC_EXT)*0x1000, "o", 1, SIZE_NONE,
492 cris_ver_v32p,
493 cris_eight_bit_offset_branch_op},
494
495 {"bsr", 0xBEBF, 0x4140, "n", 0, SIZE_FIX_32,
496 cris_ver_v32p,
497 cris_none_reg_mode_jump_op},
498
499 {"bsrc", 0xBEFF, 0x4100, "n", 0, SIZE_FIX_32,
500 cris_ver_v32p,
501 cris_none_reg_mode_jump_op},
502
503 {"bstore", 0x0af0, 0x0100, "s,R", 0, SIZE_FIX_32,
504 cris_ver_warning,
505 cris_not_implemented_op},
506
507 {"bstore", 0x0af0, 0x0100, "S,D", 0, SIZE_NONE,
508 cris_ver_warning,
509 cris_not_implemented_op},
510
511 {"bstore", 0x0af0, 0x0500, "S,R,r", 0, SIZE_NONE,
512 cris_ver_warning,
513 cris_not_implemented_op},
514
515 {"btst", 0x04F0, 0x0B00, "r,R", 0, SIZE_NONE, 0,
516 cris_btst_nop_op},
517 {"btstq", 0x0380, 0x0C60, "c,R", 0, SIZE_NONE, 0,
518 cris_btst_nop_op},
519
520 {"bvc",
521 BRANCH_QUICK_OPCODE+CC_VC*0x1000,
522 0x0f00+(0xF-CC_VC)*0x1000, "o", 1, SIZE_NONE, 0,
523 cris_eight_bit_offset_branch_op},
524
525 {"bvs",
526 BRANCH_QUICK_OPCODE+CC_VS*0x1000,
527 0x0f00+(0xF-CC_VS)*0x1000, "o", 1, SIZE_NONE, 0,
528 cris_eight_bit_offset_branch_op},
529
530 {"clear", 0x0670, 0x3980, "M r", 0, SIZE_NONE, 0,
531 cris_reg_mode_clear_op},
532
533 {"clear", 0x0A70, 0x3180, "M y", 0, SIZE_NONE, 0,
534 cris_none_reg_mode_clear_test_op},
535
536 {"clear", 0x0A70, 0x3180, "M S", 0, SIZE_NONE,
537 cris_ver_v0_10,
538 cris_none_reg_mode_clear_test_op},
539
540 {"clearf", 0x05F0, 0x0A00, "f", 0, SIZE_NONE, 0,
541 cris_clearf_di_op},
542
543 {"cmp", 0x06C0, 0x0900, "m r,R", 0, SIZE_NONE, 0,
544 cris_reg_mode_add_sub_cmp_and_or_move_op},
545
546 {"cmp", 0x0Ac0, 0x0100, "m s,R", 0, SIZE_FIELD, 0,
547 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
548
549 {"cmp", 0x0Ac0, 0x0100, "m S,D", 0, SIZE_NONE,
550 cris_ver_v0_10,
551 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
552
553 {"cmpq", 0x02C0, 0x0D00, "i,R", 0, SIZE_NONE, 0,
554 cris_quick_mode_and_cmp_move_or_op},
555
556
557 {"cmps", 0x08e0, 0x0300, "z s,R", 0, SIZE_FIELD, 0,
558 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
559
560 {"cmps", 0x08e0, 0x0300, "z S,D", 0, SIZE_NONE,
561 cris_ver_v0_10,
562 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
563
564
565 {"cmpu", 0x08c0, 0x0320, "z s,R" , 0, SIZE_FIELD, 0,
566 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
567
568 {"cmpu", 0x08c0, 0x0320, "z S,D", 0, SIZE_NONE,
569 cris_ver_v0_10,
570 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
571
572 {"di", 0x25F0, 0xDA0F, "", 0, SIZE_NONE, 0,
573 cris_clearf_di_op},
574
575 {"dip", DIP_OPCODE, DIP_Z_BITS, "ps", 0, SIZE_FIX_32,
576 cris_ver_v0_10,
577 cris_dip_prefix},
578
579 {"div", 0x0980, 0x0640, "m R,r", 0, SIZE_FIELD, 0,
580 cris_not_implemented_op},
581
582 {"dstep", 0x06f0, 0x0900, "r,R", 0, SIZE_NONE, 0,
583 cris_dstep_logshift_mstep_neg_not_op},
584
585 {"ei", 0x25B0, 0xDA4F, "", 0, SIZE_NONE, 0,
586 cris_ax_ei_setf_op},
587
588 {"fidxd", 0x0ab0, 0xf540, "[r]", 0, SIZE_NONE,
589 cris_ver_v32p,
590 cris_not_implemented_op},
591
592 {"fidxi", 0x0d30, 0xF2C0, "[r]", 0, SIZE_NONE,
593 cris_ver_v32p,
594 cris_not_implemented_op},
595
596 {"ftagd", 0x1AB0, 0xE540, "[r]", 0, SIZE_NONE,
597 cris_ver_v32p,
598 cris_not_implemented_op},
599
600 {"ftagi", 0x1D30, 0xE2C0, "[r]", 0, SIZE_NONE,
601 cris_ver_v32p,
602 cris_not_implemented_op},
603
604 {"halt", 0xF930, 0x06CF, "", 0, SIZE_NONE,
605 cris_ver_v32p,
606 cris_not_implemented_op},
607
608 {"jas", 0x09B0, 0x0640, "r,P", 0, SIZE_NONE,
609 cris_ver_v32p,
610 cris_reg_mode_jump_op},
611
612 {"jas", 0x0DBF, 0x0240, "N,P", 0, SIZE_FIX_32,
613 cris_ver_v32p,
614 cris_reg_mode_jump_op},
615
616 {"jasc", 0x0B30, 0x04C0, "r,P", 0, SIZE_NONE,
617 cris_ver_v32p,
618 cris_reg_mode_jump_op},
619
620 {"jasc", 0x0F3F, 0x00C0, "N,P", 0, SIZE_FIX_32,
621 cris_ver_v32p,
622 cris_reg_mode_jump_op},
623
624 {"jbrc", 0x69b0, 0x9640, "r", 0, SIZE_NONE,
625 cris_ver_v8_10,
626 cris_reg_mode_jump_op},
627
628 {"jbrc", 0x6930, 0x92c0, "s", 0, SIZE_FIX_32,
629 cris_ver_v8_10,
630 cris_none_reg_mode_jump_op},
631
632 {"jbrc", 0x6930, 0x92c0, "S", 0, SIZE_NONE,
633 cris_ver_v8_10,
634 cris_none_reg_mode_jump_op},
635
636 {"jir", 0xA9b0, 0x5640, "r", 0, SIZE_NONE,
637 cris_ver_v8_10,
638 cris_reg_mode_jump_op},
639
640 {"jir", 0xA930, 0x52c0, "s", 0, SIZE_FIX_32,
641 cris_ver_v8_10,
642 cris_none_reg_mode_jump_op},
643
644 {"jir", 0xA930, 0x52c0, "S", 0, SIZE_NONE,
645 cris_ver_v8_10,
646 cris_none_reg_mode_jump_op},
647
648 {"jirc", 0x29b0, 0xd640, "r", 0, SIZE_NONE,
649 cris_ver_v8_10,
650 cris_reg_mode_jump_op},
651
652 {"jirc", 0x2930, 0xd2c0, "s", 0, SIZE_FIX_32,
653 cris_ver_v8_10,
654 cris_none_reg_mode_jump_op},
655
656 {"jirc", 0x2930, 0xd2c0, "S", 0, SIZE_NONE,
657 cris_ver_v8_10,
658 cris_none_reg_mode_jump_op},
659
660 {"jsr", 0xB9b0, 0x4640, "r", 0, SIZE_NONE, 0,
661 cris_reg_mode_jump_op},
662
663 {"jsr", 0xB930, 0x42c0, "s", 0, SIZE_FIX_32,
664 cris_ver_v0_10,
665 cris_none_reg_mode_jump_op},
666
667 {"jsr", 0xBDBF, 0x4240, "N", 0, SIZE_FIX_32,
668 cris_ver_v32p,
669 cris_none_reg_mode_jump_op},
670
671 {"jsr", 0xB930, 0x42c0, "S", 0, SIZE_NONE,
672 cris_ver_v0_10,
673 cris_none_reg_mode_jump_op},
674
675 {"jsrc", 0x39b0, 0xc640, "r", 0, SIZE_NONE,
676 cris_ver_v8_10,
677 cris_reg_mode_jump_op},
678
679 {"jsrc", 0x3930, 0xc2c0, "s", 0, SIZE_FIX_32,
680 cris_ver_v8_10,
681 cris_none_reg_mode_jump_op},
682
683 {"jsrc", 0x3930, 0xc2c0, "S", 0, SIZE_NONE,
684 cris_ver_v8_10,
685 cris_none_reg_mode_jump_op},
686
687 {"jsrc", 0xBB30, 0x44C0, "r", 0, SIZE_NONE,
688 cris_ver_v32p,
689 cris_reg_mode_jump_op},
690
691 {"jsrc", 0xBF3F, 0x40C0, "N", 0, SIZE_FIX_32,
692 cris_ver_v32p,
693 cris_reg_mode_jump_op},
694
695 {"jump", 0x09b0, 0xF640, "r", 0, SIZE_NONE, 0,
696 cris_reg_mode_jump_op},
697
698 {"jump",
699 JUMP_INDIR_OPCODE, JUMP_INDIR_Z_BITS, "s", 0, SIZE_FIX_32,
700 cris_ver_v0_10,
701 cris_none_reg_mode_jump_op},
702
703 {"jump",
704 JUMP_INDIR_OPCODE, JUMP_INDIR_Z_BITS, "S", 0, SIZE_NONE,
705 cris_ver_v0_10,
706 cris_none_reg_mode_jump_op},
707
708 {"jump", 0x09F0, 0x060F, "P", 0, SIZE_NONE,
709 cris_ver_v32p,
710 cris_none_reg_mode_jump_op},
711
712 {"jump",
713 JUMP_PC_INCR_OPCODE_V32,
714 (0xffff & ~JUMP_PC_INCR_OPCODE_V32), "N", 0, SIZE_FIX_32,
715 cris_ver_v32p,
716 cris_none_reg_mode_jump_op},
717
718 {"jmpu", 0x8930, 0x72c0, "s", 0, SIZE_FIX_32,
719 cris_ver_v10,
720 cris_none_reg_mode_jump_op},
721
722 {"jmpu", 0x8930, 0x72c0, "S", 0, SIZE_NONE,
723 cris_ver_v10,
724 cris_none_reg_mode_jump_op},
725
726 {"lapc", 0x0970, 0x0680, "U,R", 0, SIZE_NONE,
727 cris_ver_v32p,
728 cris_not_implemented_op},
729
730 {"lapc", 0x0D7F, 0x0280, "dn,R", 0, SIZE_FIX_32,
731 cris_ver_v32p,
732 cris_not_implemented_op},
733
734 {"lapcq", 0x0970, 0x0680, "u,R", 0, SIZE_NONE,
735 cris_ver_v32p,
736 cris_addi_op},
737
738 {"lsl", 0x04C0, 0x0B00, "m r,R", 0, SIZE_NONE, 0,
739 cris_dstep_logshift_mstep_neg_not_op},
740
741 {"lslq", 0x03c0, 0x0C20, "c,R", 0, SIZE_NONE, 0,
742 cris_dstep_logshift_mstep_neg_not_op},
743
744 {"lsr", 0x07C0, 0x0800, "m r,R", 0, SIZE_NONE, 0,
745 cris_dstep_logshift_mstep_neg_not_op},
746
747 {"lsrq", 0x03e0, 0x0C00, "c,R", 0, SIZE_NONE, 0,
748 cris_dstep_logshift_mstep_neg_not_op},
749
750 {"lz", 0x0730, 0x08C0, "r,R", 0, SIZE_NONE,
751 cris_ver_v3p,
752 cris_not_implemented_op},
753
754 {"mcp", 0x07f0, 0x0800, "P,r", 0, SIZE_NONE,
755 cris_ver_v32p,
756 cris_not_implemented_op},
757
758 {"move", 0x0640, 0x0980, "m r,R", 0, SIZE_NONE, 0,
759 cris_reg_mode_add_sub_cmp_and_or_move_op},
760
761 {"move", 0x0A40, 0x0180, "m s,R", 0, SIZE_FIELD, 0,
762 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
763
764 {"move", 0x0A40, 0x0180, "m S,D", 0, SIZE_NONE,
765 cris_ver_v0_10,
766 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
767
768 {"move", 0x0630, 0x09c0, "r,P", 0, SIZE_NONE, 0,
769 cris_move_to_preg_op},
770
771 {"move", 0x0670, 0x0980, "P,r", 0, SIZE_NONE, 0,
772 cris_reg_mode_move_from_preg_op},
773
774 {"move", 0x0BC0, 0x0000, "m R,y", 0, SIZE_FIELD, 0,
775 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
776
777 {"move", 0x0BC0, 0x0000, "m D,S", 0, SIZE_NONE,
778 cris_ver_v0_10,
779 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
780
781 {"move",
782 MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS,
783 "s,P", 0, SIZE_SPEC_REG, 0,
784 cris_move_to_preg_op},
785
786 {"move", 0x0A30, 0x01c0, "S,P", 0, SIZE_NONE,
787 cris_ver_v0_10,
788 cris_move_to_preg_op},
789
790 {"move", 0x0A70, 0x0180, "P,y", 0, SIZE_SPEC_REG, 0,
791 cris_none_reg_mode_move_from_preg_op},
792
793 {"move", 0x0A70, 0x0180, "P,S", 0, SIZE_NONE,
794 cris_ver_v0_10,
795 cris_none_reg_mode_move_from_preg_op},
796
797 {"move", 0x0B70, 0x0480, "r,T", 0, SIZE_NONE,
798 cris_ver_v32p,
799 cris_not_implemented_op},
800
801 {"move", 0x0F70, 0x0080, "T,r", 0, SIZE_NONE,
802 cris_ver_v32p,
803 cris_not_implemented_op},
804
805 {"movem", 0x0BF0, 0x0000, "R,y", 0, SIZE_FIX_32, 0,
806 cris_move_reg_to_mem_movem_op},
807
808 {"movem", 0x0BF0, 0x0000, "D,S", 0, SIZE_NONE,
809 cris_ver_v0_10,
810 cris_move_reg_to_mem_movem_op},
811
812 {"movem", 0x0BB0, 0x0040, "s,R", 0, SIZE_FIX_32, 0,
813 cris_move_mem_to_reg_movem_op},
814
815 {"movem", 0x0BB0, 0x0040, "S,D", 0, SIZE_NONE,
816 cris_ver_v0_10,
817 cris_move_mem_to_reg_movem_op},
818
819 {"moveq", 0x0240, 0x0D80, "i,R", 0, SIZE_NONE, 0,
820 cris_quick_mode_and_cmp_move_or_op},
821
822 {"movs", 0x0460, 0x0B80, "z r,R", 0, SIZE_NONE, 0,
823 cris_reg_mode_add_sub_cmp_and_or_move_op},
824
825
826 {"movs", 0x0860, 0x0380, "z s,R", 0, SIZE_FIELD, 0,
827 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
828
829 {"movs", 0x0860, 0x0380, "z S,D", 0, SIZE_NONE,
830 cris_ver_v0_10,
831 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
832
833 {"movu", 0x0440, 0x0Ba0, "z r,R", 0, SIZE_NONE, 0,
834 cris_reg_mode_add_sub_cmp_and_or_move_op},
835
836
837 {"movu", 0x0840, 0x03a0, "z s,R", 0, SIZE_FIELD, 0,
838 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
839
840 {"movu", 0x0840, 0x03a0, "z S,D", 0, SIZE_NONE,
841 cris_ver_v0_10,
842 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
843
844 {"mstep", 0x07f0, 0x0800, "r,R", 0, SIZE_NONE,
845 cris_ver_v0_10,
846 cris_dstep_logshift_mstep_neg_not_op},
847
848 {"muls", 0x0d00, 0x02c0, "m r,R", 0, SIZE_NONE,
849 cris_ver_v10p,
850 cris_muls_op},
851
852 {"mulu", 0x0900, 0x06c0, "m r,R", 0, SIZE_NONE,
853 cris_ver_v10p,
854 cris_mulu_op},
855
856 {"neg", 0x0580, 0x0A40, "m r,R", 0, SIZE_NONE, 0,
857 cris_dstep_logshift_mstep_neg_not_op},
858
859 {"nop", NOP_OPCODE, NOP_Z_BITS, "", 0, SIZE_NONE,
860 cris_ver_v0_10,
861 cris_btst_nop_op},
862
863 {"nop", NOP_OPCODE_V32, NOP_Z_BITS_V32, "", 0, SIZE_NONE,
864 cris_ver_v32p,
865 cris_btst_nop_op},
866
867 {"not", 0x8770, 0x7880, "r", 0, SIZE_NONE, 0,
868 cris_dstep_logshift_mstep_neg_not_op},
869
870 {"or", 0x0740, 0x0880, "m r,R", 0, SIZE_NONE, 0,
871 cris_reg_mode_add_sub_cmp_and_or_move_op},
872
873 {"or", 0x0B40, 0x0080, "m s,R", 0, SIZE_FIELD, 0,
874 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
875
876 {"or", 0x0B40, 0x0080, "m S,D", 0, SIZE_NONE,
877 cris_ver_v0_10,
878 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
879
880 {"or", 0x0B40, 0x0480, "m S,R,r", 0, SIZE_NONE,
881 cris_ver_v0_10,
882 cris_three_operand_add_sub_cmp_and_or_op},
883
884 {"orq", 0x0340, 0x0C80, "i,R", 0, SIZE_NONE, 0,
885 cris_quick_mode_and_cmp_move_or_op},
886
887 {"pop", 0x0E6E, 0x0191, "!R", 0, SIZE_NONE,
888 cris_ver_v0_10,
889 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
890
891 {"pop", 0x0e3e, 0x01c1, "!P", 0, SIZE_NONE,
892 cris_ver_v0_10,
893 cris_none_reg_mode_move_from_preg_op},
894
895 {"push", 0x0FEE, 0x0011, "BR", 0, SIZE_NONE,
896 cris_ver_v0_10,
897 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
898
899 {"push", 0x0E7E, 0x0181, "BP", 0, SIZE_NONE,
900 cris_ver_v0_10,
901 cris_move_to_preg_op},
902
903 {"rbf", 0x3b30, 0xc0c0, "y", 0, SIZE_NONE,
904 cris_ver_v10,
905 cris_not_implemented_op},
906
907 {"rbf", 0x3b30, 0xc0c0, "S", 0, SIZE_NONE,
908 cris_ver_v10,
909 cris_not_implemented_op},
910
911 {"rfe", 0x2930, 0xD6CF, "", 0, SIZE_NONE,
912 cris_ver_v32p,
913 cris_not_implemented_op},
914
915 {"rfg", 0x4930, 0xB6CF, "", 0, SIZE_NONE,
916 cris_ver_v32p,
917 cris_not_implemented_op},
918
919 {"rfn", 0x5930, 0xA6CF, "", 0, SIZE_NONE,
920 cris_ver_v32p,
921 cris_not_implemented_op},
922
923 {"ret", 0xB67F, 0x4980, "", 1, SIZE_NONE,
924 cris_ver_v0_10,
925 cris_reg_mode_move_from_preg_op},
926
927 {"ret", 0xB9F0, 0x460F, "", 1, SIZE_NONE,
928 cris_ver_v32p,
929 cris_reg_mode_move_from_preg_op},
930
931 {"retb", 0xe67f, 0x1980, "", 1, SIZE_NONE,
932 cris_ver_v0_10,
933 cris_reg_mode_move_from_preg_op},
934
935 {"rete", 0xA9F0, 0x560F, "", 1, SIZE_NONE,
936 cris_ver_v32p,
937 cris_reg_mode_move_from_preg_op},
938
939 {"reti", 0xA67F, 0x5980, "", 1, SIZE_NONE,
940 cris_ver_v0_10,
941 cris_reg_mode_move_from_preg_op},
942
943 {"retn", 0xC9F0, 0x360F, "", 1, SIZE_NONE,
944 cris_ver_v32p,
945 cris_reg_mode_move_from_preg_op},
946
947 {"sbfs", 0x3b70, 0xc080, "y", 0, SIZE_NONE,
948 cris_ver_v10,
949 cris_not_implemented_op},
950
951 {"sbfs", 0x3b70, 0xc080, "S", 0, SIZE_NONE,
952 cris_ver_v10,
953 cris_not_implemented_op},
954
955 {"sa",
956 0x0530+CC_A*0x1000,
957 0x0AC0+(0xf-CC_A)*0x1000, "r", 0, SIZE_NONE, 0,
958 cris_scc_op},
959
960 {"ssb",
961 0x0530+CC_EXT*0x1000,
962 0x0AC0+(0xf-CC_EXT)*0x1000, "r", 0, SIZE_NONE,
963 cris_ver_v32p,
964 cris_scc_op},
965
966 {"scc",
967 0x0530+CC_CC*0x1000,
968 0x0AC0+(0xf-CC_CC)*0x1000, "r", 0, SIZE_NONE, 0,
969 cris_scc_op},
970
971 {"scs",
972 0x0530+CC_CS*0x1000,
973 0x0AC0+(0xf-CC_CS)*0x1000, "r", 0, SIZE_NONE, 0,
974 cris_scc_op},
975
976 {"seq",
977 0x0530+CC_EQ*0x1000,
978 0x0AC0+(0xf-CC_EQ)*0x1000, "r", 0, SIZE_NONE, 0,
979 cris_scc_op},
980
981 {"setf", 0x05b0, 0x0A40, "f", 0, SIZE_NONE, 0,
982 cris_ax_ei_setf_op},
983
984 {"sfe", 0x3930, 0xC6CF, "", 0, SIZE_NONE,
985 cris_ver_v32p,
986 cris_not_implemented_op},
987
988
989
990 {"swf",
991 0x0530+CC_EXT*0x1000,
992 0x0AC0+(0xf-CC_EXT)*0x1000, "r", 0, SIZE_NONE,
993 cris_ver_v10,
994 cris_scc_op},
995
996 {"sext",
997 0x0530+CC_EXT*0x1000,
998 0x0AC0+(0xf-CC_EXT)*0x1000, "r", 0, SIZE_NONE,
999 cris_ver_v0_3,
1000 cris_scc_op},
1001
1002 {"sge",
1003 0x0530+CC_GE*0x1000,
1004 0x0AC0+(0xf-CC_GE)*0x1000, "r", 0, SIZE_NONE, 0,
1005 cris_scc_op},
1006
1007 {"sgt",
1008 0x0530+CC_GT*0x1000,
1009 0x0AC0+(0xf-CC_GT)*0x1000, "r", 0, SIZE_NONE, 0,
1010 cris_scc_op},
1011
1012 {"shi",
1013 0x0530+CC_HI*0x1000,
1014 0x0AC0+(0xf-CC_HI)*0x1000, "r", 0, SIZE_NONE, 0,
1015 cris_scc_op},
1016
1017 {"shs",
1018 0x0530+CC_HS*0x1000,
1019 0x0AC0+(0xf-CC_HS)*0x1000, "r", 0, SIZE_NONE, 0,
1020 cris_scc_op},
1021
1022 {"sle",
1023 0x0530+CC_LE*0x1000,
1024 0x0AC0+(0xf-CC_LE)*0x1000, "r", 0, SIZE_NONE, 0,
1025 cris_scc_op},
1026
1027 {"slo",
1028 0x0530+CC_LO*0x1000,
1029 0x0AC0+(0xf-CC_LO)*0x1000, "r", 0, SIZE_NONE, 0,
1030 cris_scc_op},
1031
1032 {"sls",
1033 0x0530+CC_LS*0x1000,
1034 0x0AC0+(0xf-CC_LS)*0x1000, "r", 0, SIZE_NONE, 0,
1035 cris_scc_op},
1036
1037 {"slt",
1038 0x0530+CC_LT*0x1000,
1039 0x0AC0+(0xf-CC_LT)*0x1000, "r", 0, SIZE_NONE, 0,
1040 cris_scc_op},
1041
1042 {"smi",
1043 0x0530+CC_MI*0x1000,
1044 0x0AC0+(0xf-CC_MI)*0x1000, "r", 0, SIZE_NONE, 0,
1045 cris_scc_op},
1046
1047 {"sne",
1048 0x0530+CC_NE*0x1000,
1049 0x0AC0+(0xf-CC_NE)*0x1000, "r", 0, SIZE_NONE, 0,
1050 cris_scc_op},
1051
1052 {"spl",
1053 0x0530+CC_PL*0x1000,
1054 0x0AC0+(0xf-CC_PL)*0x1000, "r", 0, SIZE_NONE, 0,
1055 cris_scc_op},
1056
1057 {"sub", 0x0680, 0x0940, "m r,R", 0, SIZE_NONE, 0,
1058 cris_reg_mode_add_sub_cmp_and_or_move_op},
1059
1060 {"sub", 0x0a80, 0x0140, "m s,R", 0, SIZE_FIELD, 0,
1061 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
1062
1063 {"sub", 0x0a80, 0x0140, "m S,D", 0, SIZE_NONE,
1064 cris_ver_v0_10,
1065 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
1066
1067 {"sub", 0x0a80, 0x0540, "m S,R,r", 0, SIZE_NONE,
1068 cris_ver_v0_10,
1069 cris_three_operand_add_sub_cmp_and_or_op},
1070
1071 {"subq", 0x0280, 0x0d40, "I,R", 0, SIZE_NONE, 0,
1072 cris_quick_mode_add_sub_op},
1073
1074 {"subs", 0x04a0, 0x0b40, "z r,R", 0, SIZE_NONE, 0,
1075 cris_reg_mode_add_sub_cmp_and_or_move_op},
1076
1077
1078 {"subs", 0x08a0, 0x0340, "z s,R", 0, SIZE_FIELD, 0,
1079 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
1080
1081 {"subs", 0x08a0, 0x0340, "z S,D", 0, SIZE_NONE,
1082 cris_ver_v0_10,
1083 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
1084
1085 {"subs", 0x08a0, 0x0740, "z S,R,r", 0, SIZE_NONE,
1086 cris_ver_v0_10,
1087 cris_three_operand_add_sub_cmp_and_or_op},
1088
1089 {"subu", 0x0480, 0x0b60, "z r,R", 0, SIZE_NONE, 0,
1090 cris_reg_mode_add_sub_cmp_and_or_move_op},
1091
1092
1093 {"subu", 0x0880, 0x0360, "z s,R", 0, SIZE_FIELD, 0,
1094 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
1095
1096 {"subu", 0x0880, 0x0360, "z S,D", 0, SIZE_NONE,
1097 cris_ver_v0_10,
1098 cris_none_reg_mode_add_sub_cmp_and_or_move_op},
1099
1100 {"subu", 0x0880, 0x0760, "z S,R,r", 0, SIZE_NONE,
1101 cris_ver_v0_10,
1102 cris_three_operand_add_sub_cmp_and_or_op},
1103
1104 {"svc",
1105 0x0530+CC_VC*0x1000,
1106 0x0AC0+(0xf-CC_VC)*0x1000, "r", 0, SIZE_NONE, 0,
1107 cris_scc_op},
1108
1109 {"svs",
1110 0x0530+CC_VS*0x1000,
1111 0x0AC0+(0xf-CC_VS)*0x1000, "r", 0, SIZE_NONE, 0,
1112 cris_scc_op},
1113
1114
1115
1116
1117 {"swapn", 0x8770, 0x7880, "r", 0, SIZE_NONE,
1118 cris_ver_v8p,
1119 cris_not_implemented_op},
1120
1121 {"swapw", 0x4770, 0xb880, "r", 0, SIZE_NONE,
1122 cris_ver_v8p,
1123 cris_not_implemented_op},
1124
1125 {"swapnw", 0xc770, 0x3880, "r", 0, SIZE_NONE,
1126 cris_ver_v8p,
1127 cris_not_implemented_op},
1128
1129 {"swapb", 0x2770, 0xd880, "r", 0, SIZE_NONE,
1130 cris_ver_v8p,
1131 cris_not_implemented_op},
1132
1133 {"swapnb", 0xA770, 0x5880, "r", 0, SIZE_NONE,
1134 cris_ver_v8p,
1135 cris_not_implemented_op},
1136
1137 {"swapwb", 0x6770, 0x9880, "r", 0, SIZE_NONE,
1138 cris_ver_v8p,
1139 cris_not_implemented_op},
1140
1141 {"swapnwb", 0xE770, 0x1880, "r", 0, SIZE_NONE,
1142 cris_ver_v8p,
1143 cris_not_implemented_op},
1144
1145 {"swapr", 0x1770, 0xe880, "r", 0, SIZE_NONE,
1146 cris_ver_v8p,
1147 cris_not_implemented_op},
1148
1149 {"swapnr", 0x9770, 0x6880, "r", 0, SIZE_NONE,
1150 cris_ver_v8p,
1151 cris_not_implemented_op},
1152
1153 {"swapwr", 0x5770, 0xa880, "r", 0, SIZE_NONE,
1154 cris_ver_v8p,
1155 cris_not_implemented_op},
1156
1157 {"swapnwr", 0xd770, 0x2880, "r", 0, SIZE_NONE,
1158 cris_ver_v8p,
1159 cris_not_implemented_op},
1160
1161 {"swapbr", 0x3770, 0xc880, "r", 0, SIZE_NONE,
1162 cris_ver_v8p,
1163 cris_not_implemented_op},
1164
1165 {"swapnbr", 0xb770, 0x4880, "r", 0, SIZE_NONE,
1166 cris_ver_v8p,
1167 cris_not_implemented_op},
1168
1169 {"swapwbr", 0x7770, 0x8880, "r", 0, SIZE_NONE,
1170 cris_ver_v8p,
1171 cris_not_implemented_op},
1172
1173 {"swapnwbr", 0xf770, 0x0880, "r", 0, SIZE_NONE,
1174 cris_ver_v8p,
1175 cris_not_implemented_op},
1176
1177 {"test", 0x0640, 0x0980, "m D", 0, SIZE_NONE,
1178 cris_ver_v0_10,
1179 cris_reg_mode_test_op},
1180
1181 {"test", 0x0b80, 0xf040, "m y", 0, SIZE_FIELD, 0,
1182 cris_none_reg_mode_clear_test_op},
1183
1184 {"test", 0x0b80, 0xf040, "m S", 0, SIZE_NONE,
1185 cris_ver_v0_10,
1186 cris_none_reg_mode_clear_test_op},
1187
1188 {"xor", 0x07B0, 0x0840, "r,R", 0, SIZE_NONE, 0,
1189 cris_xor_op},
1190
1191 {NULL, 0, 0, NULL, 0, 0, 0, cris_not_implemented_op}
1192};
1193
1194
1195const char * const
1196cris_cc_strings[] =
1197{
1198 "hs",
1199 "lo",
1200 "ne",
1201 "eq",
1202 "vc",
1203 "vs",
1204 "pl",
1205 "mi",
1206 "ls",
1207 "hi",
1208 "ge",
1209 "lt",
1210 "gt",
1211 "le",
1212 "a",
1213
1214
1215 "wf"
1216};
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229#ifndef MAX_BYTES_PER_CRIS_INSN
1230#define MAX_BYTES_PER_CRIS_INSN 8
1231#endif
1232
1233
1234
1235#ifndef PARSE_PREFIX
1236#define PARSE_PREFIX 1
1237#endif
1238
1239
1240#define REGISTER_PREFIX_CHAR '$'
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263#ifndef TRACE_CASE
1264#define TRACE_CASE (disdata->trace_case)
1265#endif
1266
1267enum cris_disass_family
1268 { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 };
1269
1270
1271struct cris_disasm_data
1272{
1273
1274
1275 bfd_boolean trace_case;
1276
1277
1278
1279 enum cris_disass_family distype;
1280};
1281
1282
1283static long case_offset = 0;
1284
1285
1286static long case_offset_counter = 0;
1287
1288
1289static long no_of_case_offsets = 0;
1290
1291
1292static long last_immediate = 0;
1293
1294static int cris_constraint
1295 (const char *, unsigned, unsigned, struct cris_disasm_data *);
1296
1297
1298
1299
1300static bfd_boolean
1301cris_parse_disassembler_options (disassemble_info *info,
1302 enum cris_disass_family distype)
1303{
1304 struct cris_disasm_data *disdata;
1305
1306 info->private_data = calloc (1, sizeof (struct cris_disasm_data));
1307 disdata = (struct cris_disasm_data *) info->private_data;
1308 if (disdata == NULL)
1309 return false;
1310
1311
1312 disdata->trace_case
1313 = (info->disassembler_options == NULL
1314 || (strcmp (info->disassembler_options, "nocase") != 0));
1315
1316 disdata->distype = distype;
1317 return true;
1318}
1319
1320static const struct cris_spec_reg *
1321spec_reg_info (unsigned int sreg, enum cris_disass_family distype)
1322{
1323 int i;
1324
1325 for (i = 0; cris_spec_regs[i].name != NULL; i++)
1326 {
1327 if (cris_spec_regs[i].number == sreg)
1328 {
1329 if (distype == cris_dis_v32)
1330 switch (cris_spec_regs[i].applicable_version)
1331 {
1332 case cris_ver_warning:
1333 case cris_ver_version_all:
1334 case cris_ver_v3p:
1335 case cris_ver_v8p:
1336 case cris_ver_v10p:
1337 case cris_ver_v32p:
1338
1339 if (cris_spec_regs[i].warning == NULL)
1340 return &cris_spec_regs[i];
1341 default:
1342 ;
1343 }
1344 else if (cris_spec_regs[i].applicable_version != cris_ver_v32p)
1345 return &cris_spec_regs[i];
1346 }
1347 }
1348
1349 return NULL;
1350}
1351
1352
1353
1354static int
1355number_of_bits (unsigned int val)
1356{
1357 int bits;
1358
1359 for (bits = 0; val != 0; val &= val - 1)
1360 bits++;
1361
1362 return bits;
1363}
1364
1365
1366
1367static const struct cris_opcode *
1368get_opcode_entry (unsigned int insn,
1369 unsigned int prefix_insn,
1370 struct cris_disasm_data *disdata)
1371{
1372
1373
1374 static const struct cris_opcode **opc_table = NULL;
1375
1376 const struct cris_opcode *max_matchedp = NULL;
1377 const struct cris_opcode **prefix_opc_table = NULL;
1378
1379
1380 static const struct cris_opcode **dip_prefixes = NULL;
1381 static const struct cris_opcode **bdapq_m1_prefixes = NULL;
1382 static const struct cris_opcode **bdapq_m2_prefixes = NULL;
1383 static const struct cris_opcode **bdapq_m4_prefixes = NULL;
1384 static const struct cris_opcode **rest_prefixes = NULL;
1385
1386
1387 if (opc_table == NULL)
1388 {
1389 opc_table = g_new0(const struct cris_opcode *, 65536);
1390 dip_prefixes = g_new0(const struct cris_opcode *, 65536);
1391 bdapq_m1_prefixes = g_new0(const struct cris_opcode *, 65536);
1392 bdapq_m2_prefixes = g_new0(const struct cris_opcode *, 65536);
1393 bdapq_m4_prefixes = g_new0(const struct cris_opcode *, 65536);
1394 rest_prefixes = g_new0(const struct cris_opcode *, 65536);
1395 }
1396
1397
1398
1399
1400
1401
1402
1403 if (prefix_insn != NO_CRIS_PREFIX)
1404 {
1405 const struct cris_opcode *popcodep
1406 = (opc_table[prefix_insn] != NULL
1407 ? opc_table[prefix_insn]
1408 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata));
1409
1410 if (popcodep == NULL)
1411 return NULL;
1412
1413 if (popcodep->match == BDAP_QUICK_OPCODE)
1414 {
1415
1416
1417 int offset = (prefix_insn & 255);
1418
1419 if (offset > 127)
1420 offset -= 256;
1421
1422 switch (offset)
1423 {
1424 case -4:
1425 prefix_opc_table = bdapq_m4_prefixes;
1426 break;
1427
1428 case -2:
1429 prefix_opc_table = bdapq_m2_prefixes;
1430 break;
1431
1432 case -1:
1433 prefix_opc_table = bdapq_m1_prefixes;
1434 break;
1435
1436 default:
1437 prefix_opc_table = rest_prefixes;
1438 break;
1439 }
1440 }
1441 else if (popcodep->match == DIP_OPCODE)
1442
1443
1444 prefix_opc_table = dip_prefixes;
1445 else
1446 prefix_opc_table = rest_prefixes;
1447 }
1448
1449 if (prefix_insn != NO_CRIS_PREFIX
1450 && prefix_opc_table[insn] != NULL)
1451 max_matchedp = prefix_opc_table[insn];
1452 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL)
1453 max_matchedp = opc_table[insn];
1454 else
1455 {
1456 const struct cris_opcode *opcodep;
1457 int max_level_of_match = -1;
1458
1459 for (opcodep = cris_opcodes;
1460 opcodep->name != NULL;
1461 opcodep++)
1462 {
1463 int level_of_match;
1464
1465 if (disdata->distype == cris_dis_v32)
1466 {
1467 switch (opcodep->applicable_version)
1468 {
1469 case cris_ver_version_all:
1470 break;
1471
1472 case cris_ver_v0_3:
1473 case cris_ver_v0_10:
1474 case cris_ver_v3_10:
1475 case cris_ver_sim_v0_10:
1476 case cris_ver_v8_10:
1477 case cris_ver_v10:
1478 case cris_ver_warning:
1479 continue;
1480
1481 case cris_ver_v3p:
1482 case cris_ver_v8p:
1483 case cris_ver_v10p:
1484 case cris_ver_v32p:
1485 break;
1486
1487 case cris_ver_v8:
1488 abort ();
1489 default:
1490 abort ();
1491 }
1492 }
1493 else
1494 {
1495 switch (opcodep->applicable_version)
1496 {
1497 case cris_ver_version_all:
1498 case cris_ver_v0_3:
1499 case cris_ver_v3p:
1500 case cris_ver_v0_10:
1501 case cris_ver_v8p:
1502 case cris_ver_v8_10:
1503 case cris_ver_v10:
1504 case cris_ver_sim_v0_10:
1505 case cris_ver_v10p:
1506 case cris_ver_warning:
1507 break;
1508
1509 case cris_ver_v32p:
1510 continue;
1511
1512 case cris_ver_v8:
1513 abort ();
1514 default:
1515 abort ();
1516 }
1517 }
1518
1519
1520
1521
1522
1523
1524
1525 if ((opcodep->match & insn) == opcodep->match
1526 && (opcodep->lose & insn) == 0
1527 && ((level_of_match
1528 = cris_constraint (opcodep->args,
1529 insn,
1530 prefix_insn,
1531 disdata))
1532 >= 0)
1533 && ((level_of_match
1534 += 2 * number_of_bits (opcodep->match
1535 | opcodep->lose))
1536 > max_level_of_match))
1537 {
1538 max_matchedp = opcodep;
1539 max_level_of_match = level_of_match;
1540
1541
1542
1543 if (level_of_match >= 2 * 16)
1544 break;
1545 }
1546 }
1547
1548
1549
1550
1551
1552
1553
1554 if (prefix_insn == NO_CRIS_PREFIX)
1555 opc_table[insn] = max_matchedp;
1556 else
1557 prefix_opc_table[insn] = max_matchedp;
1558 }
1559
1560 return max_matchedp;
1561}
1562
1563
1564
1565
1566
1567static int
1568cris_constraint (const char *cs,
1569 unsigned int insn,
1570 unsigned int prefix_insn,
1571 struct cris_disasm_data *disdata)
1572{
1573 int retval = 0;
1574 int tmp;
1575 int prefix_ok = 0;
1576 const char *s;
1577
1578 for (s = cs; *s; s++)
1579 switch (*s)
1580 {
1581 case '!':
1582
1583
1584 if (prefix_insn != NO_CRIS_PREFIX
1585 || disdata->distype != cris_dis_v0_v10)
1586 return -1;
1587 break;
1588
1589 case 'U':
1590
1591 return -1;
1592
1593 case 'M':
1594
1595
1596
1597
1598 tmp = ((insn >> 12) & 0xf);
1599 if (tmp != 0 && tmp != 4 && tmp != 8)
1600 return -1;
1601 break;
1602
1603 case 'm':
1604 if ((insn & 0x30) == 0x30)
1605 return -1;
1606 break;
1607
1608 case 'S':
1609
1610 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0)
1611 {
1612 prefix_ok = 1;
1613 break;
1614 }
1615 else
1616 return -1;
1617
1618 case 's':
1619 case 'y':
1620 case 'Y':
1621
1622
1623 if (prefix_insn != NO_CRIS_PREFIX)
1624 {
1625 if (insn & 0x400)
1626 {
1627 const struct cris_opcode *prefix_opcodep
1628 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata);
1629
1630 if (prefix_opcodep->match == DIP_OPCODE)
1631 return -1;
1632 }
1633
1634 prefix_ok = 1;
1635 }
1636 break;
1637
1638 case 'B':
1639
1640 prefix_ok = 1;
1641
1642
1643
1644 if (prefix_insn != NO_CRIS_PREFIX)
1645 {
1646
1647 const struct cris_opcode *prefix_opcodep
1648 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata);
1649
1650 if (prefix_opcodep->match == BDAP_QUICK_OPCODE)
1651 {
1652 int pushsize = (prefix_insn & 255);
1653
1654 if (pushsize > 127)
1655 pushsize -= 256;
1656
1657 if (s[1] == 'P')
1658 {
1659 unsigned int spec_reg = (insn >> 12) & 15;
1660 const struct cris_spec_reg *sregp
1661 = spec_reg_info (spec_reg, disdata->distype);
1662
1663
1664
1665 if (sregp && sregp->reg_size == (unsigned int) -pushsize)
1666 break;
1667 }
1668 else if (s[1] == 'R')
1669 {
1670 if ((insn & 0x30) == 0x20 && pushsize == -4)
1671 break;
1672 }
1673
1674
1675 }
1676 }
1677 return -1;
1678
1679 case 'D':
1680 retval = (((insn >> 12) & 15) == (insn & 15));
1681 if (!retval)
1682 return -1;
1683 else
1684 retval += 4;
1685 break;
1686
1687 case 'P':
1688 {
1689 const struct cris_spec_reg *sregp
1690 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704 if (sregp != NULL)
1705 {
1706 retval += 3;
1707 break;
1708 }
1709 else
1710 return -1;
1711 }
1712 }
1713
1714 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok)
1715 return -1;
1716
1717 return retval;
1718}
1719
1720
1721
1722static char *
1723format_hex (unsigned long number,
1724 char *outbuffer,
1725 struct cris_disasm_data *disdata)
1726{
1727
1728 number &= 0xffffffff;
1729
1730 sprintf (outbuffer, "0x%lx", number);
1731
1732
1733 if (TRACE_CASE)
1734 last_immediate = number;
1735
1736 return outbuffer + strlen (outbuffer);
1737}
1738
1739
1740
1741
1742
1743static char *
1744format_dec (long number, char *outbuffer, int signedp)
1745{
1746 last_immediate = number;
1747 sprintf (outbuffer, signedp ? "%ld" : "%lu", number);
1748
1749 return outbuffer + strlen (outbuffer);
1750}
1751
1752
1753
1754static char *
1755format_reg (struct cris_disasm_data *disdata,
1756 int regno,
1757 char *outbuffer_start,
1758 bfd_boolean with_reg_prefix)
1759{
1760 char *outbuffer = outbuffer_start;
1761
1762 if (with_reg_prefix)
1763 *outbuffer++ = REGISTER_PREFIX_CHAR;
1764
1765 switch (regno)
1766 {
1767 case 15:
1768
1769 if (disdata->distype == cris_dis_v32)
1770 strcpy (outbuffer, "acr");
1771 else
1772 strcpy (outbuffer, "pc");
1773 break;
1774
1775 case 14:
1776 strcpy (outbuffer, "sp");
1777 break;
1778
1779 default:
1780 sprintf (outbuffer, "r%d", regno);
1781 break;
1782 }
1783
1784 return outbuffer_start + strlen (outbuffer_start);
1785}
1786
1787
1788
1789static char *
1790format_sup_reg (unsigned int regno,
1791 char *outbuffer_start,
1792 bfd_boolean with_reg_prefix)
1793{
1794 char *outbuffer = outbuffer_start;
1795 int i;
1796
1797 if (with_reg_prefix)
1798 *outbuffer++ = REGISTER_PREFIX_CHAR;
1799
1800 for (i = 0; cris_support_regs[i].name != NULL; i++)
1801 if (cris_support_regs[i].number == regno)
1802 {
1803 sprintf (outbuffer, "%s", cris_support_regs[i].name);
1804 return outbuffer_start + strlen (outbuffer_start);
1805 }
1806
1807
1808
1809 sprintf (outbuffer, "format_sup_reg-BUG");
1810 return outbuffer_start + strlen (outbuffer_start);
1811}
1812
1813
1814
1815static unsigned
1816bytes_to_skip (unsigned int insn,
1817 const struct cris_opcode *matchedp,
1818 enum cris_disass_family distype,
1819 const struct cris_opcode *prefix_matchedp)
1820{
1821
1822 unsigned to_skip = 2;
1823 const char *template = matchedp->args;
1824 const char *s;
1825
1826 for (s = template; *s; s++)
1827 if ((*s == 's' || *s == 'N' || *s == 'Y')
1828 && (insn & 0x400) && (insn & 15) == 15
1829 && prefix_matchedp == NULL)
1830 {
1831
1832
1833 int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3));
1834
1835 if (matchedp->imm_oprnd_size == SIZE_FIX_32)
1836 to_skip += 4;
1837 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG)
1838 {
1839 const struct cris_spec_reg *sregp
1840 = spec_reg_info ((insn >> 12) & 15, distype);
1841
1842
1843
1844 if (sregp == NULL)
1845 return 2;
1846
1847
1848
1849
1850 to_skip +=
1851 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1;
1852 }
1853 else
1854 to_skip += (mode_size + 1) & ~1;
1855 }
1856 else if (*s == 'n')
1857 to_skip += 4;
1858 else if (*s == 'b')
1859 to_skip += 2;
1860
1861 return to_skip;
1862}
1863
1864
1865
1866static char *
1867print_flags (struct cris_disasm_data *disdata, unsigned int insn, char *cp)
1868{
1869
1870
1871
1872
1873
1874 static const char v8_fnames[] = "cvznxibm";
1875 static const char v32_fnames[] = "cvznxiup";
1876 const char *fnames
1877 = disdata->distype == cris_dis_v32 ? v32_fnames : v8_fnames;
1878
1879 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15));
1880 int i;
1881
1882 for (i = 0; i < 8; i++)
1883 if (flagbits & (1 << i))
1884 *cp++ = fnames[i];
1885
1886 return cp;
1887}
1888
1889
1890
1891
1892
1893static void
1894print_with_operands (const struct cris_opcode *opcodep,
1895 unsigned int insn,
1896 unsigned char *buffer,
1897 bfd_vma addr,
1898 disassemble_info *info,
1899
1900
1901
1902 const struct cris_opcode *prefix_opcodep,
1903 unsigned int prefix_insn,
1904 unsigned char *prefix_buffer,
1905 bfd_boolean with_reg_prefix)
1906{
1907
1908
1909 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2];
1910 char *tp = temp;
1911 static const char mode_char[] = "bwd?";
1912 const char *s;
1913 const char *cs;
1914 struct cris_disasm_data *disdata
1915 = (struct cris_disasm_data *) info->private_data;
1916
1917
1918 (*info->fprintf_func) (info->stream, "%s", opcodep->name);
1919
1920 cs = opcodep->args;
1921 s = cs;
1922
1923
1924 if (*s == 'p')
1925 s++;
1926
1927 if (*s == 'm' || *s == 'M' || *s == 'z')
1928 {
1929 *tp++ = '.';
1930
1931
1932 *tp++ = *s == 'M'
1933 ? (insn & 0x8000 ? 'd'
1934 : insn & 0x4000 ? 'w' : 'b')
1935 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)];
1936
1937
1938 s += 2;
1939 }
1940
1941
1942
1943 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256))
1944 *tp++ = ' ';
1945
1946
1947
1948 if (opcodep->name[0] == 'j')
1949 {
1950 if (CONST_STRNEQ (opcodep->name, "jsr"))
1951
1952 info->insn_type = dis_jsr;
1953 else
1954
1955 info->insn_type = dis_branch;
1956 }
1957
1958
1959 info->branch_delay_insns = opcodep->delayed;
1960
1961
1962 for (; *s; s++)
1963 {
1964 switch (*s)
1965 {
1966 case 'T':
1967 tp = format_sup_reg ((insn >> 12) & 15, tp, with_reg_prefix);
1968 break;
1969
1970 case 'A':
1971 if (with_reg_prefix)
1972 *tp++ = REGISTER_PREFIX_CHAR;
1973 *tp++ = 'a';
1974 *tp++ = 'c';
1975 *tp++ = 'r';
1976 break;
1977
1978 case '[':
1979 case ']':
1980 case ',':
1981 *tp++ = *s;
1982 break;
1983
1984 case '!':
1985
1986
1987
1988 break;
1989
1990 case 'd':
1991
1992
1993 break;
1994
1995 case 'B':
1996
1997
1998
1999 prefix_opcodep = NULL;
2000 break;
2001
2002 case 'D':
2003 case 'r':
2004 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
2005 break;
2006
2007 case 'R':
2008 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
2009 break;
2010
2011 case 'n':
2012 {
2013
2014 unsigned long number
2015 = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536
2016 + buffer[5] * 0x1000000 + addr);
2017
2018
2019 *tp = 0;
2020 if (temp[0])
2021 (*info->fprintf_func) (info->stream, "%s", temp);
2022 tp = temp;
2023
2024 (*info->print_address_func) ((bfd_vma) number, info);
2025 }
2026 break;
2027
2028 case 'u':
2029 {
2030
2031 unsigned long number = (buffer[0] & 0xf) * 2 + addr;
2032
2033
2034 *tp = 0;
2035 if (temp[0])
2036 (*info->fprintf_func) (info->stream, "%s", temp);
2037 tp = temp;
2038
2039 (*info->print_address_func) ((bfd_vma) number, info);
2040 }
2041 break;
2042
2043 case 'N':
2044 case 'y':
2045 case 'Y':
2046 case 'S':
2047 case 's':
2048
2049 if ((insn & 0x400) && (insn & 15) == 15 && prefix_opcodep == NULL)
2050 {
2051
2052
2053 long number;
2054 int signedp
2055 = ((*cs == 'z' && (insn & 0x20))
2056 || opcodep->match == BDAP_QUICK_OPCODE);
2057 int nbytes;
2058
2059 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
2060 nbytes = 4;
2061 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
2062 {
2063 const struct cris_spec_reg *sregp
2064 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
2065
2066
2067
2068
2069 if (sregp == NULL)
2070
2071 nbytes = 42;
2072 else
2073
2074
2075
2076 nbytes = disdata->distype == cris_dis_v32
2077 ? 4 : (sregp->reg_size + 1) & ~1;
2078 }
2079 else
2080 {
2081 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3));
2082
2083 if (mode_size == 1)
2084 nbytes = 2;
2085 else
2086 nbytes = mode_size;
2087 }
2088
2089 switch (nbytes)
2090 {
2091 case 1:
2092 number = buffer[2];
2093 if (signedp && number > 127)
2094 number -= 256;
2095 break;
2096
2097 case 2:
2098 number = buffer[2] + buffer[3] * 256;
2099 if (signedp && number > 32767)
2100 number -= 65536;
2101 break;
2102
2103 case 4:
2104 number
2105 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536
2106 + buffer[5] * 0x1000000;
2107 break;
2108
2109 default:
2110 strcpy (tp, "bug");
2111 tp += 3;
2112 number = 42;
2113 }
2114
2115 if ((*cs == 'z' && (insn & 0x20))
2116 || (opcodep->match == BDAP_QUICK_OPCODE
2117 && (nbytes <= 2 || buffer[1 + nbytes] == 0)))
2118 tp = format_dec (number, tp, signedp);
2119 else
2120 {
2121 unsigned int highbyte = (number >> 24) & 0xff;
2122
2123
2124
2125
2126
2127
2128 if (nbytes == 4
2129 && (highbyte == ((addr >> 24) & 0xff)
2130 || (highbyte != 0 && highbyte != 0xff)
2131 || info->insn_type == dis_branch
2132 || info->insn_type == dis_jsr))
2133 {
2134
2135 *tp = 0;
2136 tp = temp;
2137 if (temp[0])
2138 (*info->fprintf_func) (info->stream, "%s", temp);
2139
2140 (*info->print_address_func) ((bfd_vma) number, info);
2141
2142 info->target = number;
2143 }
2144 else
2145 tp = format_hex (number, tp, disdata);
2146 }
2147 }
2148 else
2149 {
2150
2151
2152 if (info->insn_type != dis_nonbranch)
2153 {
2154 int mode_size
2155 = 1 << ((insn >> 4)
2156 & (opcodep->args[0] == 'z' ? 1 : 3));
2157 int size;
2158 info->insn_type = dis_dref;
2159 info->flags |= CRIS_DIS_FLAG_MEMREF;
2160
2161 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
2162 size = 4;
2163 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
2164 {
2165 const struct cris_spec_reg *sregp
2166 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
2167
2168
2169
2170 if (sregp == NULL)
2171 size = 4;
2172 else
2173 size = sregp->reg_size;
2174 }
2175 else
2176 size = mode_size;
2177
2178 info->data_size = size;
2179 }
2180
2181 *tp++ = '[';
2182
2183 if (prefix_opcodep
2184
2185
2186 && ((insn & 0x400) == 0
2187 || prefix_opcodep->match != DIP_OPCODE))
2188 {
2189 if (insn & 0x400)
2190 {
2191 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
2192 *tp++ = '=';
2193 }
2194
2195
2196
2197
2198 switch (prefix_opcodep->match)
2199 {
2200 case DIP_OPCODE:
2201
2202 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
2203 {
2204
2205
2206 unsigned long number
2207 = prefix_buffer[2] + prefix_buffer[3] * 256
2208 + prefix_buffer[4] * 65536
2209 + prefix_buffer[5] * 0x1000000;
2210
2211 info->target = (bfd_vma) number;
2212
2213
2214
2215 *tp = 0;
2216 tp = temp;
2217 if (temp[0])
2218 (*info->fprintf_func) (info->stream, "%s", temp);
2219
2220 (*info->print_address_func) ((bfd_vma) number, info);
2221 }
2222 else
2223 {
2224
2225
2226 info->flags
2227 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
2228 | CRIS_DIS_FLAG_MEM_TARGET2_MEM);
2229
2230 info->target2 = prefix_insn & 15;
2231
2232 *tp++ = '[';
2233 tp = format_reg (disdata, prefix_insn & 15, tp,
2234 with_reg_prefix);
2235 if (prefix_insn & 0x400)
2236 *tp++ = '+';
2237 *tp++ = ']';
2238 }
2239 break;
2240
2241 case BDAP_QUICK_OPCODE:
2242 {
2243 int number;
2244
2245 number = prefix_buffer[0];
2246 if (number > 127)
2247 number -= 256;
2248
2249
2250 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
2251 with_reg_prefix);
2252 if (number >= 0)
2253 *tp++ = '+';
2254 tp = format_dec (number, tp, 1);
2255
2256 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
2257 info->target = (prefix_insn >> 12) & 15;
2258 info->target2 = (bfd_vma) number;
2259 break;
2260 }
2261
2262 case BIAP_OPCODE:
2263
2264 tp = format_reg (disdata, prefix_insn & 15, tp,
2265 with_reg_prefix);
2266 *tp++ = '+';
2267 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
2268 with_reg_prefix);
2269 *tp++ = '.';
2270 *tp++ = mode_char[(prefix_insn >> 4) & 3];
2271
2272 info->flags
2273 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
2274 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
2275
2276 | ((prefix_insn & 0x8000)
2277 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4
2278 : ((prefix_insn & 0x8000)
2279 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0)));
2280
2281
2282 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f)
2283
2284 case_offset_counter = no_of_case_offsets;
2285 break;
2286
2287 case BDAP_INDIR_OPCODE:
2288
2289
2290 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
2291 with_reg_prefix);
2292
2293 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
2294 {
2295 long number;
2296 unsigned int nbytes;
2297
2298
2299 int mode_size = 1 << ((prefix_insn >> 4) & 3);
2300
2301 if (mode_size == 1)
2302 nbytes = 2;
2303 else
2304 nbytes = mode_size;
2305
2306 switch (nbytes)
2307 {
2308 case 1:
2309 number = prefix_buffer[2];
2310 if (number > 127)
2311 number -= 256;
2312 break;
2313
2314 case 2:
2315 number = prefix_buffer[2] + prefix_buffer[3] * 256;
2316 if (number > 32767)
2317 number -= 65536;
2318 break;
2319
2320 case 4:
2321 number
2322 = prefix_buffer[2] + prefix_buffer[3] * 256
2323 + prefix_buffer[4] * 65536
2324 + prefix_buffer[5] * 0x1000000;
2325 break;
2326
2327 default:
2328 strcpy (tp, "bug");
2329 tp += 3;
2330 number = 42;
2331 }
2332
2333 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
2334 info->target2 = (bfd_vma) number;
2335
2336
2337
2338 if (nbytes == 4)
2339 {
2340
2341
2342 *tp++ = '+';
2343 *tp = 0;
2344 tp = temp;
2345 (*info->fprintf_func) (info->stream, "%s", temp);
2346
2347 (*info->print_address_func) ((bfd_vma) number, info);
2348 }
2349 else
2350 {
2351 if (number >= 0)
2352 *tp++ = '+';
2353 tp = format_dec (number, tp, 1);
2354 }
2355 }
2356 else
2357 {
2358
2359 *tp++ = '+';
2360 *tp++ = '[';
2361 tp = format_reg (disdata, prefix_insn & 15, tp,
2362 with_reg_prefix);
2363 if (prefix_insn & 0x400)
2364 *tp++ = '+';
2365 *tp++ = ']';
2366 *tp++ = '.';
2367 *tp++ = mode_char[(prefix_insn >> 4) & 3];
2368
2369 info->flags
2370 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
2371 | CRIS_DIS_FLAG_MEM_TARGET2_MEM
2372 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
2373
2374 | (((prefix_insn >> 4) == 2)
2375 ? 0
2376 : (((prefix_insn >> 4) & 3) == 1
2377 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD
2378 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE)));
2379 }
2380 break;
2381
2382 default:
2383 (*info->fprintf_func) (info->stream, "?prefix-bug");
2384 }
2385
2386
2387 prefix_opcodep = NULL;
2388 }
2389 else
2390 {
2391 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
2392
2393 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
2394 info->target = insn & 15;
2395
2396 if (insn & 0x400)
2397 *tp++ = '+';
2398 }
2399 *tp++ = ']';
2400 }
2401 break;
2402
2403 case 'x':
2404 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
2405 *tp++ = '.';
2406 *tp++ = mode_char[(insn >> 4) & 3];
2407 break;
2408
2409 case 'I':
2410 tp = format_dec (insn & 63, tp, 0);
2411 break;
2412
2413 case 'b':
2414 {
2415 int where = buffer[2] + buffer[3] * 256;
2416
2417 if (where > 32767)
2418 where -= 65536;
2419
2420 where += addr + ((disdata->distype == cris_dis_v32) ? 0 : 4);
2421
2422 if (insn == BA_PC_INCR_OPCODE)
2423 info->insn_type = dis_branch;
2424 else
2425 info->insn_type = dis_condbranch;
2426
2427 info->target = (bfd_vma) where;
2428
2429 *tp = 0;
2430 tp = temp;
2431 (*info->fprintf_func) (info->stream, "%s%s ",
2432 temp, cris_cc_strings[insn >> 12]);
2433
2434 (*info->print_address_func) ((bfd_vma) where, info);
2435 }
2436 break;
2437
2438 case 'c':
2439 tp = format_dec (insn & 31, tp, 0);
2440 break;
2441
2442 case 'C':
2443 tp = format_dec (insn & 15, tp, 0);
2444 break;
2445
2446 case 'o':
2447 {
2448 long offset = insn & 0xfe;
2449 bfd_vma target;
2450
2451 if (insn & 1)
2452 offset |= ~0xff;
2453
2454 if (opcodep->match == BA_QUICK_OPCODE)
2455 info->insn_type = dis_branch;
2456 else
2457 info->insn_type = dis_condbranch;
2458
2459 target = addr + ((disdata->distype == cris_dis_v32) ? 0 : 2) + offset;
2460 info->target = target;
2461 *tp = 0;
2462 tp = temp;
2463 (*info->fprintf_func) (info->stream, "%s", temp);
2464 (*info->print_address_func) (target, info);
2465 }
2466 break;
2467
2468 case 'Q':
2469 case 'O':
2470 {
2471 long number = buffer[0];
2472
2473 if (number > 127)
2474 number = number - 256;
2475
2476 tp = format_dec (number, tp, 1);
2477 *tp++ = ',';
2478 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
2479 }
2480 break;
2481
2482 case 'f':
2483 tp = print_flags (disdata, insn, tp);
2484 break;
2485
2486 case 'i':
2487 tp = format_dec ((insn & 32) ? (insn & 31) | ~31L : insn & 31, tp, 1);
2488 break;
2489
2490 case 'P':
2491 {
2492 const struct cris_spec_reg *sregp
2493 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
2494
2495 if (sregp->name == NULL)
2496
2497 *tp++ = '?';
2498 else
2499 {
2500 if (with_reg_prefix)
2501 *tp++ = REGISTER_PREFIX_CHAR;
2502 strcpy (tp, sregp->name);
2503 tp += strlen (tp);
2504 }
2505 }
2506 break;
2507
2508 default:
2509 strcpy (tp, "???");
2510 tp += 3;
2511 }
2512 }
2513
2514 *tp = 0;
2515
2516 if (prefix_opcodep)
2517 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")",
2518 prefix_opcodep->name, prefix_opcodep->args);
2519
2520 (*info->fprintf_func) (info->stream, "%s", temp);
2521
2522
2523
2524
2525 if (TRACE_CASE && case_offset_counter == 0)
2526 {
2527 if (CONST_STRNEQ (opcodep->name, "sub"))
2528 case_offset = last_immediate;
2529
2530
2531 else if (CONST_STRNEQ (opcodep->name, "add"))
2532
2533 case_offset = -last_immediate;
2534
2535
2536 else if (CONST_STRNEQ (opcodep->name, "bound"))
2537 no_of_case_offsets = last_immediate + 1;
2538
2539
2540
2541 else if (info->insn_type == dis_jsr
2542 || info->insn_type == dis_branch
2543 || info->insn_type == dis_condbranch)
2544 case_offset = 0;
2545 }
2546}
2547
2548
2549
2550
2551
2552
2553static int
2554print_insn_cris_generic (bfd_vma memaddr,
2555 disassemble_info *info,
2556 bfd_boolean with_reg_prefix)
2557{
2558 int nbytes;
2559 unsigned int insn;
2560 const struct cris_opcode *matchedp;
2561 int advance = 0;
2562 struct cris_disasm_data *disdata
2563 = (struct cris_disasm_data *) info->private_data;
2564
2565
2566
2567 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN];
2568 unsigned char *bufp;
2569 int status = 0;
2570 bfd_vma addr;
2571
2572
2573
2574
2575
2576
2577
2578
2579 nbytes = info->buffer_length ? info->buffer_length
2580 : MAX_BYTES_PER_CRIS_INSN;
2581 nbytes = MIN(nbytes, MAX_BYTES_PER_CRIS_INSN);
2582 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info);
2583
2584
2585
2586 if (nbytes != MAX_BYTES_PER_CRIS_INSN)
2587 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes);
2588
2589 addr = memaddr;
2590 bufp = buffer;
2591
2592
2593 info->insn_info_valid = 1;
2594 info->branch_delay_insns = 0;
2595 info->data_size = 0;
2596 info->insn_type = dis_nonbranch;
2597 info->flags = 0;
2598 info->target = 0;
2599 info->target2 = 0;
2600
2601
2602 if (nbytes != 0)
2603 {
2604 matchedp = NULL;
2605
2606 insn = bufp[0] + bufp[1] * 256;
2607
2608
2609 if (TRACE_CASE && case_offset_counter != 0)
2610 {
2611 info->insn_type = dis_noninsn;
2612 advance += 2;
2613
2614
2615 (*info->fprintf_func) (info->stream, "case %ld%s: -> ",
2616 case_offset + no_of_case_offsets
2617 - case_offset_counter,
2618 case_offset_counter == 1 ? "/default" :
2619 "");
2620
2621 (*info->print_address_func) ((bfd_vma)
2622 ((short) (insn)
2623 + (long) (addr
2624 - (no_of_case_offsets
2625 - case_offset_counter)
2626 * 2)), info);
2627 case_offset_counter--;
2628
2629
2630
2631 if (case_offset_counter == 0)
2632 case_offset = 0;
2633 }
2634 else if (insn == 0)
2635 {
2636
2637
2638
2639
2640 (*info->fprintf_func) (info->stream,
2641 disdata->distype == cris_dis_v32
2642 ? "bcc ." : "bcc .+2");
2643 info->insn_type = dis_noninsn;
2644 advance += 2;
2645 }
2646 else
2647 {
2648 const struct cris_opcode *prefix_opcodep = NULL;
2649 unsigned char *prefix_buffer = bufp;
2650 unsigned int prefix_insn = insn;
2651 int prefix_size = 0;
2652
2653 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX, disdata);
2654
2655
2656
2657 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p')
2658 {
2659
2660
2661 prefix_size = bytes_to_skip (prefix_insn, matchedp,
2662 disdata->distype, NULL);
2663 prefix_opcodep = matchedp;
2664
2665 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256;
2666 matchedp = get_opcode_entry (insn, prefix_insn, disdata);
2667
2668 if (matchedp != NULL)
2669 {
2670 addr += prefix_size;
2671 bufp += prefix_size;
2672 advance += prefix_size;
2673 }
2674 else
2675 {
2676
2677
2678
2679 matchedp = prefix_opcodep;
2680 insn = prefix_insn;
2681 prefix_opcodep = NULL;
2682 }
2683 }
2684
2685 if (matchedp == NULL)
2686 {
2687 (*info->fprintf_func) (info->stream, "??0x%x", insn);
2688 advance += 2;
2689
2690 info->insn_type = dis_noninsn;
2691 }
2692 else
2693 {
2694 advance
2695 += bytes_to_skip (insn, matchedp, disdata->distype,
2696 prefix_opcodep);
2697
2698
2699
2700 print_with_operands (matchedp, insn, bufp, addr, info,
2701 prefix_opcodep, prefix_insn,
2702 prefix_buffer, with_reg_prefix);
2703 }
2704 }
2705 }
2706 else
2707 info->insn_type = dis_noninsn;
2708
2709
2710
2711
2712 if (status != 0 && (nbytes == 0 || advance > nbytes))
2713 {
2714 (*info->memory_error_func) (status, memaddr, info);
2715 return -1;
2716 }
2717
2718
2719 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN;
2720
2721
2722
2723
2724
2725 info->bytes_per_chunk = 2;
2726
2727
2728
2729
2730
2731
2732 info->display_endian = BFD_ENDIAN_BIG;
2733
2734 return advance;
2735}
2736
2737
2738static int
2739print_insn_cris_with_register_prefix (bfd_vma vma,
2740 disassemble_info *info)
2741{
2742 if (info->private_data == NULL
2743 && !cris_parse_disassembler_options (info, cris_dis_v0_v10))
2744 return -1;
2745 return print_insn_cris_generic (vma, info, true);
2746}
2747
2748
2749static int
2750print_insn_crisv32_with_register_prefix (bfd_vma vma,
2751 disassemble_info *info)
2752{
2753 if (info->private_data == NULL
2754 && !cris_parse_disassembler_options (info, cris_dis_v32))
2755 return -1;
2756 return print_insn_cris_generic (vma, info, true);
2757}
2758
2759#if 0
2760
2761
2762
2763static int
2764print_insn_crisv10_v32_with_register_prefix (bfd_vma vma,
2765 disassemble_info *info)
2766{
2767 if (info->private_data == NULL
2768 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32))
2769 return -1;
2770 return print_insn_cris_generic (vma, info, true);
2771}
2772
2773
2774
2775static int
2776print_insn_cris_without_register_prefix (bfd_vma vma,
2777 disassemble_info *info)
2778{
2779 if (info->private_data == NULL
2780 && !cris_parse_disassembler_options (info, cris_dis_v0_v10))
2781 return -1;
2782 return print_insn_cris_generic (vma, info, false);
2783}
2784
2785
2786
2787static int
2788print_insn_crisv32_without_register_prefix (bfd_vma vma,
2789 disassemble_info *info)
2790{
2791 if (info->private_data == NULL
2792 && !cris_parse_disassembler_options (info, cris_dis_v32))
2793 return -1;
2794 return print_insn_cris_generic (vma, info, false);
2795}
2796
2797
2798
2799
2800static int
2801print_insn_crisv10_v32_without_register_prefix (bfd_vma vma,
2802 disassemble_info *info)
2803{
2804 if (info->private_data == NULL
2805 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32))
2806 return -1;
2807 return print_insn_cris_generic (vma, info, false);
2808}
2809#endif
2810
2811int
2812print_insn_crisv10 (bfd_vma vma,
2813 disassemble_info *info)
2814{
2815 return print_insn_cris_with_register_prefix(vma, info);
2816}
2817
2818int
2819print_insn_crisv32 (bfd_vma vma,
2820 disassemble_info *info)
2821{
2822 return print_insn_crisv32_with_register_prefix(vma, info);
2823}
2824
2825
2826
2827
2828
2829#if 0
2830disassembler_ftype
2831cris_get_disassembler (bfd *abfd)
2832{
2833
2834
2835
2836 if (abfd == NULL)
2837 return print_insn_cris_with_register_prefix;
2838
2839 if (bfd_get_symbol_leading_char (abfd) == 0)
2840 {
2841 if (bfd_get_mach (abfd) == bfd_mach_cris_v32)
2842 return print_insn_crisv32_with_register_prefix;
2843 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32)
2844 return print_insn_crisv10_v32_with_register_prefix;
2845
2846
2847
2848 return print_insn_cris_with_register_prefix;
2849 }
2850
2851 if (bfd_get_mach (abfd) == bfd_mach_cris_v32)
2852 return print_insn_crisv32_without_register_prefix;
2853 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32)
2854 return print_insn_crisv10_v32_without_register_prefix;
2855 return print_insn_cris_without_register_prefix;
2856}
2857#endif
2858
2859
2860
2861
2862