qemu/hw/display/dpcd.h
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   1/*
   2 * dpcd.h
   3 *
   4 *  Copyright (C)2015 : GreenSocs Ltd
   5 *      http://www.greensocs.com/ , email: info@greensocs.com
   6 *
   7 *  Developed by :
   8 *  Frederic Konrad   <fred.konrad@greensocs.com>
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License as published by
  12 * the Free Software Foundation, either version 2 of the License, or
  13 * (at your option)any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License along
  21 * with this program; if not, see <http://www.gnu.org/licenses/>.
  22 *
  23 */
  24
  25#ifndef DPCD_H
  26#define DPCD_H
  27
  28typedef struct DPCDState DPCDState;
  29
  30#define TYPE_DPCD "dpcd"
  31#define DPCD(obj) OBJECT_CHECK(DPCDState, (obj), TYPE_DPCD)
  32
  33/* DCPD Revision. */
  34#define DPCD_REV_1_0 0x10
  35#define DPCD_REV_1_1 0x11
  36
  37/* DCPD Max Link Rate. */
  38#define DPCD_1_62GBPS 0x06
  39#define DPCD_2_7GBPS 0x0A
  40
  41/* DCPD Max down spread. */
  42#define DPCD_UP_TO_0_5 0x01
  43#define DPCD_NO_AUX_HANDSHAKE_LINK_TRAINING 0x40
  44
  45/* DCPD Downstream port type. */
  46#define DPCD_DISPLAY_PORT 0x00
  47#define DPCD_ANALOG 0x02
  48#define DPCD_DVI_HDMI 0x04
  49#define DPCD_OTHER 0x06
  50
  51/* DPCD Format conversion. */
  52#define DPCD_FORMAT_CONVERSION 0x08
  53
  54/* Main link channel coding. */
  55#define DPCD_ANSI_8B_10B 0x01
  56
  57/* Down stream port count. */
  58#define DPCD_OUI_SUPPORTED 0x80
  59
  60/* Receiver port capability. */
  61#define DPCD_EDID_PRESENT 0x02
  62#define DPCD_ASSOCIATED_TO_PRECEDING_PORT 0x04
  63
  64/* Down stream port capability. */
  65#define DPCD_CAP_DISPLAY_PORT 0x000
  66#define DPCD_CAP_ANALOG_VGA 0x001
  67#define DPCD_CAP_DVI 0x002
  68#define DPCD_CAP_HDMI 0x003
  69#define DPCD_CAP_OTHER 0x100
  70
  71#endif /* !DPCD_H */
  72