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27#include "qemu/osdep.h"
28#include "hw/hw.h"
29#include "hw/i386/pc.h"
30#include "hw/i2c/pm_smbus.h"
31#include "hw/pci/pci.h"
32#include "sysemu/sysemu.h"
33#include "hw/i2c/i2c.h"
34#include "hw/i2c/smbus.h"
35
36#include "hw/i386/ich9.h"
37
38#define TYPE_ICH9_SMB_DEVICE "ICH9 SMB"
39#define ICH9_SMB_DEVICE(obj) \
40 OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE)
41
42typedef struct ICH9SMBState {
43 PCIDevice dev;
44
45 PMSMBus smb;
46} ICH9SMBState;
47
48static const VMStateDescription vmstate_ich9_smbus = {
49 .name = "ich9_smb",
50 .version_id = 1,
51 .minimum_version_id = 1,
52 .fields = (VMStateField[]) {
53 VMSTATE_PCI_DEVICE(dev, struct ICH9SMBState),
54 VMSTATE_END_OF_LIST()
55 }
56};
57
58static void ich9_smbus_write_config(PCIDevice *d, uint32_t address,
59 uint32_t val, int len)
60{
61 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
62
63 pci_default_write_config(d, address, val, len);
64 if (range_covers_byte(address, len, ICH9_SMB_HOSTC)) {
65 uint8_t hostc = s->dev.config[ICH9_SMB_HOSTC];
66 if ((hostc & ICH9_SMB_HOSTC_HST_EN) &&
67 !(hostc & ICH9_SMB_HOSTC_I2C_EN)) {
68 memory_region_set_enabled(&s->smb.io, true);
69 } else {
70 memory_region_set_enabled(&s->smb.io, false);
71 }
72 }
73}
74
75static void ich9_smbus_realize(PCIDevice *d, Error **errp)
76{
77 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
78
79
80 pci_config_set_interrupt_pin(d->config, 0x01);
81
82 pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
83
84
85 pm_smbus_init(&d->qdev, &s->smb);
86 pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
87 &s->smb.io);
88}
89
90static void ich9_smb_class_init(ObjectClass *klass, void *data)
91{
92 DeviceClass *dc = DEVICE_CLASS(klass);
93 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
94
95 k->vendor_id = PCI_VENDOR_ID_INTEL;
96 k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
97 k->revision = ICH9_A2_SMB_REVISION;
98 k->class_id = PCI_CLASS_SERIAL_SMBUS;
99 dc->vmsd = &vmstate_ich9_smbus;
100 dc->desc = "ICH9 SMBUS Bridge";
101 k->realize = ich9_smbus_realize;
102 k->config_write = ich9_smbus_write_config;
103
104
105
106
107 dc->cannot_instantiate_with_device_add_yet = true;
108}
109
110I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
111{
112 PCIDevice *d =
113 pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE);
114 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
115 return s->smb.smbus;
116}
117
118static const TypeInfo ich9_smb_info = {
119 .name = TYPE_ICH9_SMB_DEVICE,
120 .parent = TYPE_PCI_DEVICE,
121 .instance_size = sizeof(ICH9SMBState),
122 .class_init = ich9_smb_class_init,
123};
124
125static void ich9_smb_register(void)
126{
127 type_register_static(&ich9_smb_info);
128}
129
130type_init(ich9_smb_register);
131