1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28#include "qemu/osdep.h"
29#include "qapi/error.h"
30#include "qemu-common.h"
31#include "cpu.h"
32#include "hw/hw.h"
33#include "trace.h"
34#include "sysemu/kvm.h"
35#include "hw/ppc/spapr.h"
36#include "hw/ppc/xics.h"
37#include "kvm_ppc.h"
38#include "qemu/config-file.h"
39#include "qemu/error-report.h"
40
41#include <sys/ioctl.h>
42
43typedef struct KVMXICSState {
44 XICSState parent_obj;
45
46 int kernel_xics_fd;
47} KVMXICSState;
48
49
50
51
52static void icp_get_kvm_state(ICPState *ss)
53{
54 uint64_t state;
55 struct kvm_one_reg reg = {
56 .id = KVM_REG_PPC_ICP_STATE,
57 .addr = (uintptr_t)&state,
58 };
59 int ret;
60
61
62 if (!ss->cs) {
63 return;
64 }
65
66 ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, ®);
67 if (ret != 0) {
68 error_report("Unable to retrieve KVM interrupt controller state"
69 " for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno));
70 exit(1);
71 }
72
73 ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
74 ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
75 & KVM_REG_PPC_ICP_MFRR_MASK;
76 ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
77 & KVM_REG_PPC_ICP_PPRI_MASK;
78}
79
80static int icp_set_kvm_state(ICPState *ss, int version_id)
81{
82 uint64_t state;
83 struct kvm_one_reg reg = {
84 .id = KVM_REG_PPC_ICP_STATE,
85 .addr = (uintptr_t)&state,
86 };
87 int ret;
88
89
90 if (!ss->cs) {
91 return 0;
92 }
93
94 state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
95 | ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
96 | ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
97
98 ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, ®);
99 if (ret != 0) {
100 error_report("Unable to restore KVM interrupt controller state (0x%"
101 PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs),
102 strerror(errno));
103 return ret;
104 }
105
106 return 0;
107}
108
109static void icp_kvm_reset(DeviceState *dev)
110{
111 ICPState *icp = ICP(dev);
112
113 icp->xirr = 0;
114 icp->pending_priority = 0xff;
115 icp->mfrr = 0xff;
116
117
118 qemu_set_irq(icp->output, 0);
119
120 icp_set_kvm_state(icp, 1);
121}
122
123static void icp_kvm_class_init(ObjectClass *klass, void *data)
124{
125 DeviceClass *dc = DEVICE_CLASS(klass);
126 ICPStateClass *icpc = ICP_CLASS(klass);
127
128 dc->reset = icp_kvm_reset;
129 icpc->pre_save = icp_get_kvm_state;
130 icpc->post_load = icp_set_kvm_state;
131}
132
133static const TypeInfo icp_kvm_info = {
134 .name = TYPE_KVM_ICP,
135 .parent = TYPE_ICP,
136 .instance_size = sizeof(ICPState),
137 .class_init = icp_kvm_class_init,
138 .class_size = sizeof(ICPStateClass),
139};
140
141
142
143
144static void ics_get_kvm_state(ICSState *ics)
145{
146 KVMXICSState *icpkvm = KVM_XICS(ics->icp);
147 uint64_t state;
148 struct kvm_device_attr attr = {
149 .flags = 0,
150 .group = KVM_DEV_XICS_GRP_SOURCES,
151 .addr = (uint64_t)(uintptr_t)&state,
152 };
153 int i;
154
155 for (i = 0; i < ics->nr_irqs; i++) {
156 ICSIRQState *irq = &ics->irqs[i];
157 int ret;
158
159 attr.attr = i + ics->offset;
160
161 ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
162 if (ret != 0) {
163 error_report("Unable to retrieve KVM interrupt controller state"
164 " for IRQ %d: %s", i + ics->offset, strerror(errno));
165 exit(1);
166 }
167
168 irq->server = state & KVM_XICS_DESTINATION_MASK;
169 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
170 & KVM_XICS_PRIORITY_MASK;
171
172
173
174
175
176
177
178
179 if (state & KVM_XICS_MASKED) {
180 irq->priority = 0xff;
181 } else {
182 irq->priority = irq->saved_priority;
183 }
184
185 if (state & KVM_XICS_PENDING) {
186 if (state & KVM_XICS_LEVEL_SENSITIVE) {
187 irq->status |= XICS_STATUS_ASSERTED;
188 } else {
189
190
191
192
193
194
195
196 irq->status |= XICS_STATUS_MASKED_PENDING
197 | XICS_STATUS_REJECTED;
198 }
199 }
200 }
201}
202
203static int ics_set_kvm_state(ICSState *ics, int version_id)
204{
205 KVMXICSState *icpkvm = KVM_XICS(ics->icp);
206 uint64_t state;
207 struct kvm_device_attr attr = {
208 .flags = 0,
209 .group = KVM_DEV_XICS_GRP_SOURCES,
210 .addr = (uint64_t)(uintptr_t)&state,
211 };
212 int i;
213
214 for (i = 0; i < ics->nr_irqs; i++) {
215 ICSIRQState *irq = &ics->irqs[i];
216 int ret;
217
218 attr.attr = i + ics->offset;
219
220 state = irq->server;
221 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
222 << KVM_XICS_PRIORITY_SHIFT;
223 if (irq->priority != irq->saved_priority) {
224 assert(irq->priority == 0xff);
225 state |= KVM_XICS_MASKED;
226 }
227
228 if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
229 state |= KVM_XICS_LEVEL_SENSITIVE;
230 if (irq->status & XICS_STATUS_ASSERTED) {
231 state |= KVM_XICS_PENDING;
232 }
233 } else {
234 if (irq->status & XICS_STATUS_MASKED_PENDING) {
235 state |= KVM_XICS_PENDING;
236 }
237 }
238
239 ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
240 if (ret != 0) {
241 error_report("Unable to restore KVM interrupt controller state"
242 " for IRQs %d: %s", i + ics->offset, strerror(errno));
243 return ret;
244 }
245 }
246
247 return 0;
248}
249
250static void ics_kvm_set_irq(void *opaque, int srcno, int val)
251{
252 ICSState *ics = opaque;
253 struct kvm_irq_level args;
254 int rc;
255
256 args.irq = srcno + ics->offset;
257 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
258 if (!val) {
259 return;
260 }
261 args.level = KVM_INTERRUPT_SET;
262 } else {
263 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
264 }
265 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
266 if (rc < 0) {
267 perror("kvm_irq_line");
268 }
269}
270
271static void ics_kvm_reset(DeviceState *dev)
272{
273 ICSState *ics = ICS(dev);
274 int i;
275 uint8_t flags[ics->nr_irqs];
276
277 for (i = 0; i < ics->nr_irqs; i++) {
278 flags[i] = ics->irqs[i].flags;
279 }
280
281 memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
282
283 for (i = 0; i < ics->nr_irqs; i++) {
284 ics->irqs[i].priority = 0xff;
285 ics->irqs[i].saved_priority = 0xff;
286 ics->irqs[i].flags = flags[i];
287 }
288
289 ics_set_kvm_state(ics, 1);
290}
291
292static void ics_kvm_realize(DeviceState *dev, Error **errp)
293{
294 ICSState *ics = ICS(dev);
295
296 if (!ics->nr_irqs) {
297 error_setg(errp, "Number of interrupts needs to be greater 0");
298 return;
299 }
300 ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
301 ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
302}
303
304static void ics_kvm_class_init(ObjectClass *klass, void *data)
305{
306 DeviceClass *dc = DEVICE_CLASS(klass);
307 ICSStateClass *icsc = ICS_CLASS(klass);
308
309 dc->realize = ics_kvm_realize;
310 dc->reset = ics_kvm_reset;
311 icsc->pre_save = ics_get_kvm_state;
312 icsc->post_load = ics_set_kvm_state;
313}
314
315static const TypeInfo ics_kvm_info = {
316 .name = TYPE_KVM_ICS,
317 .parent = TYPE_ICS,
318 .instance_size = sizeof(ICSState),
319 .class_init = ics_kvm_class_init,
320};
321
322
323
324
325static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
326{
327 CPUState *cs;
328 ICPState *ss;
329 KVMXICSState *icpkvm = KVM_XICS(icp);
330
331 cs = CPU(cpu);
332 ss = &icp->ss[cs->cpu_index];
333
334 assert(cs->cpu_index < icp->nr_servers);
335 if (icpkvm->kernel_xics_fd == -1) {
336 abort();
337 }
338
339
340
341
342
343
344 if (ss->cap_irq_xics_enabled) {
345 return;
346 }
347
348 if (icpkvm->kernel_xics_fd != -1) {
349 int ret;
350
351 ss->cs = cs;
352
353 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
354 icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
355 if (ret < 0) {
356 error_report("Unable to connect CPU%ld to kernel XICS: %s",
357 kvm_arch_vcpu_id(cs), strerror(errno));
358 exit(1);
359 }
360 ss->cap_irq_xics_enabled = true;
361 }
362}
363
364static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp)
365{
366 icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
367}
368
369static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers,
370 Error **errp)
371{
372 int i;
373
374 icp->nr_servers = nr_servers;
375
376 icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
377 for (i = 0; i < icp->nr_servers; i++) {
378 char buffer[32];
379 object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP);
380 snprintf(buffer, sizeof(buffer), "icp[%d]", i);
381 object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
382 errp);
383 }
384}
385
386static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
387 uint32_t token,
388 uint32_t nargs, target_ulong args,
389 uint32_t nret, target_ulong rets)
390{
391 error_report("pseries: %s must never be called for in-kernel XICS",
392 __func__);
393}
394
395static void xics_kvm_realize(DeviceState *dev, Error **errp)
396{
397 KVMXICSState *icpkvm = KVM_XICS(dev);
398 XICSState *icp = XICS_COMMON(dev);
399 int i, rc;
400 Error *error = NULL;
401 struct kvm_create_device xics_create_device = {
402 .type = KVM_DEV_TYPE_XICS,
403 .flags = 0,
404 };
405
406 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
407 error_setg(errp,
408 "KVM and IRQ_XICS capability must be present for in-kernel XICS");
409 goto fail;
410 }
411
412 spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
413 spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
414 spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
415 spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
416
417 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
418 if (rc < 0) {
419 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
420 goto fail;
421 }
422
423 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
424 if (rc < 0) {
425 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
426 goto fail;
427 }
428
429 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
430 if (rc < 0) {
431 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
432 goto fail;
433 }
434
435 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
436 if (rc < 0) {
437 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
438 goto fail;
439 }
440
441
442 rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
443 if (rc < 0) {
444 error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
445 goto fail;
446 }
447
448 icpkvm->kernel_xics_fd = xics_create_device.fd;
449
450 object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
451 if (error) {
452 error_propagate(errp, error);
453 goto fail;
454 }
455
456 assert(icp->nr_servers);
457 for (i = 0; i < icp->nr_servers; i++) {
458 object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
459 if (error) {
460 error_propagate(errp, error);
461 goto fail;
462 }
463 }
464
465 kvm_kernel_irqchip = true;
466 kvm_msi_via_irqfd_allowed = true;
467 kvm_gsi_direct_mapping = true;
468
469 return;
470
471fail:
472 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
473 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
474 kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
475 kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
476}
477
478static void xics_kvm_initfn(Object *obj)
479{
480 XICSState *xics = XICS_COMMON(obj);
481
482 xics->ics = ICS(object_new(TYPE_KVM_ICS));
483 object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
484 xics->ics->icp = xics;
485}
486
487static void xics_kvm_class_init(ObjectClass *oc, void *data)
488{
489 DeviceClass *dc = DEVICE_CLASS(oc);
490 XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
491
492 dc->realize = xics_kvm_realize;
493 xsc->cpu_setup = xics_kvm_cpu_setup;
494 xsc->set_nr_irqs = xics_kvm_set_nr_irqs;
495 xsc->set_nr_servers = xics_kvm_set_nr_servers;
496}
497
498static const TypeInfo xics_kvm_info = {
499 .name = TYPE_KVM_XICS,
500 .parent = TYPE_XICS_COMMON,
501 .instance_size = sizeof(KVMXICSState),
502 .class_init = xics_kvm_class_init,
503 .instance_init = xics_kvm_initfn,
504};
505
506static void xics_kvm_register_types(void)
507{
508 type_register_static(&xics_kvm_info);
509 type_register_static(&ics_kvm_info);
510 type_register_static(&icp_kvm_info);
511}
512
513type_init(xics_kvm_register_types)
514