1#ifndef QEMU_HW_MILKYMIST_H
2#define QEMU_HW_MILKYMIST_H
3
4#include "hw/qdev.h"
5#include "net/net.h"
6
7static inline DeviceState *milkymist_uart_create(hwaddr base,
8 qemu_irq irq)
9{
10 DeviceState *dev;
11
12 dev = qdev_create(NULL, "milkymist-uart");
13 qdev_init_nofail(dev);
14 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
15 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
16
17 return dev;
18}
19
20static inline DeviceState *milkymist_hpdmc_create(hwaddr base)
21{
22 DeviceState *dev;
23
24 dev = qdev_create(NULL, "milkymist-hpdmc");
25 qdev_init_nofail(dev);
26 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
27
28 return dev;
29}
30
31static inline DeviceState *milkymist_memcard_create(hwaddr base)
32{
33 DeviceState *dev;
34
35 dev = qdev_create(NULL, "milkymist-memcard");
36 qdev_init_nofail(dev);
37 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
38
39 return dev;
40}
41
42static inline DeviceState *milkymist_vgafb_create(hwaddr base,
43 uint32_t fb_offset, uint32_t fb_mask)
44{
45 DeviceState *dev;
46
47 dev = qdev_create(NULL, "milkymist-vgafb");
48 qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
49 qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
50 qdev_init_nofail(dev);
51 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
52
53 return dev;
54}
55
56static inline DeviceState *milkymist_sysctl_create(hwaddr base,
57 qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
58 uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
59 uint32_t gpio_strappings)
60{
61 DeviceState *dev;
62
63 dev = qdev_create(NULL, "milkymist-sysctl");
64 qdev_prop_set_uint32(dev, "frequency", freq_hz);
65 qdev_prop_set_uint32(dev, "systemid", system_id);
66 qdev_prop_set_uint32(dev, "capabilities", capabilities);
67 qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
68 qdev_init_nofail(dev);
69 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
70 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq);
71 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq);
72 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq);
73
74 return dev;
75}
76
77static inline DeviceState *milkymist_pfpu_create(hwaddr base,
78 qemu_irq irq)
79{
80 DeviceState *dev;
81
82 dev = qdev_create(NULL, "milkymist-pfpu");
83 qdev_init_nofail(dev);
84 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
85 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
86 return dev;
87}
88
89#ifdef CONFIG_OPENGL
90#include <X11/Xlib.h>
91#include <epoxy/gl.h>
92#include <epoxy/glx.h>
93static const int glx_fbconfig_attr[] = {
94 GLX_GREEN_SIZE, 5,
95 GLX_GREEN_SIZE, 6,
96 GLX_BLUE_SIZE, 5,
97 None
98};
99#endif
100
101static inline DeviceState *milkymist_tmu2_create(hwaddr base,
102 qemu_irq irq)
103{
104#ifdef CONFIG_OPENGL
105 DeviceState *dev;
106 Display *d;
107 GLXFBConfig *configs;
108 int nelements;
109 int ver_major, ver_minor;
110
111 if (display_type == DT_NOGRAPHIC) {
112 return NULL;
113 }
114
115
116 d = XOpenDisplay(NULL);
117 if (d == NULL) {
118 return NULL;
119 }
120
121 if (!glXQueryVersion(d, &ver_major, &ver_minor)) {
122
123
124 XCloseDisplay(d);
125 return NULL;
126 }
127
128 if ((ver_major < 1) || ((ver_major == 1) && (ver_minor < 3))) {
129 printf("Your GLX version is %d.%d,"
130 "but TMU emulation needs at least 1.3. TMU disabled.\n",
131 ver_major, ver_minor);
132 XCloseDisplay(d);
133 return NULL;
134 }
135
136 configs = glXChooseFBConfig(d, 0, glx_fbconfig_attr, &nelements);
137 if (configs == NULL) {
138 XCloseDisplay(d);
139 return NULL;
140 }
141
142 XFree(configs);
143 XCloseDisplay(d);
144
145 dev = qdev_create(NULL, "milkymist-tmu2");
146 qdev_init_nofail(dev);
147 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
148 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
149
150 return dev;
151#else
152 return NULL;
153#endif
154}
155
156static inline DeviceState *milkymist_ac97_create(hwaddr base,
157 qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
158 qemu_irq dmaw_irq)
159{
160 DeviceState *dev;
161
162 dev = qdev_create(NULL, "milkymist-ac97");
163 qdev_init_nofail(dev);
164 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
165 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq);
166 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq);
167 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq);
168 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq);
169
170 return dev;
171}
172
173static inline DeviceState *milkymist_minimac2_create(hwaddr base,
174 hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
175{
176 DeviceState *dev;
177
178 qemu_check_nic_model(&nd_table[0], "minimac2");
179 dev = qdev_create(NULL, "milkymist-minimac2");
180 qdev_set_nic_properties(dev, &nd_table[0]);
181 qdev_init_nofail(dev);
182 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
183 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base);
184 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
185 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);
186
187 return dev;
188}
189
190static inline DeviceState *milkymist_softusb_create(hwaddr base,
191 qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
192 uint32_t dmem_base, uint32_t dmem_size)
193{
194 DeviceState *dev;
195
196 dev = qdev_create(NULL, "milkymist-softusb");
197 qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
198 qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
199 qdev_init_nofail(dev);
200 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
201 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base);
202 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base);
203 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
204
205 return dev;
206}
207
208#endif
209
