LXR qemu/hw/misc/omap

   1/*
   2 * TI OMAP L4 interconnect emulation.
   3 *
   4 * Copyright (C) 2007-2009 Nokia Corporation
   5 * Written by Andrzej Zaborowski <andrew@openedhand.com>
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 or
  10 * (at your option) any later version of the License.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License along
  18 * with this program; if not, see <http://www.gnu.org/licenses/>.
  19 */
  20#include "qemu/osdep.h"
  21#include "hw/hw.h"
  22#include "hw/arm/omap.h"
  23
  24struct omap_l4_s {
  25    MemoryRegion *address_space;
  26    hwaddr base;
  27    int ta_num;
  28    struct omap_target_agent_s ta[0];
  29};
  30
  31struct omap_l4_s *omap_l4_init(MemoryRegion *address_space,
  32                               hwaddr base, int ta_num)
  33{
  34    struct omap_l4_s *bus = g_malloc0(
  35                    sizeof(*bus) + ta_num * sizeof(*bus->ta));
  36
  37    bus->address_space = address_space;
  38    bus->ta_num = ta_num;
  39    bus->base = base;
  40
  41    return bus;
  42}
  43
  44hwaddr omap_l4_region_base(struct omap_target_agent_s *ta,
  45                                       int region)
  46{
  47    return ta->bus->base + ta->start[region].offset;
  48}
  49
  50hwaddr omap_l4_region_size(struct omap_target_agent_s *ta,
  51                                       int region)
  52{
  53    return ta->start[region].size;
  54}
  55
  56static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
  57                               unsigned size)
  58{
  59    struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
  60
  61    if (size != 2) {
  62        return omap_badwidth_read16(opaque, addr);
  63    }
  64
  65    switch (addr) {
  66    case 0x00:  /* COMPONENT */
  67        return s->component;
  68
  69    case 0x20:  /* AGENT_CONTROL */
  70        return s->control;
  71
  72    case 0x28:  /* AGENT_STATUS */
  73        return s->status;
  74    }
  75
  76    OMAP_BAD_REG(addr);
  77    return 0;
  78}
  79
  80static void omap_l4ta_write(void *opaque, hwaddr addr,
  81                            uint64_t value, unsigned size)
  82{
  83    struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
  84
  85    if (size != 4) {
  86        omap_badwidth_write32(opaque, addr, value);
  87        return;
  88    }
  89
  90    switch (addr) {
  91    case 0x00:  /* COMPONENT */
  92    case 0x28:  /* AGENT_STATUS */
  93        OMAP_RO_REG(addr);
  94        break;
  95
  96    case 0x20:  /* AGENT_CONTROL */
  97        s->control = value & 0x01000700;
  98        if (value & 1)                                  /* OCP_RESET */
  99            s->status &= ~1;                            /* REQ_TIMEOUT */
 100        break;
 101
 102    default:
 103        OMAP_BAD_REG(addr);
 104    }
 105}
 106
 107static const MemoryRegionOps omap_l4ta_ops = {
 108    .read = omap_l4ta_read,
 109    .write = omap_l4ta_write,
 110    .endianness = DEVICE_NATIVE_ENDIAN,
 111};
 112
 113struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
 114        const struct omap_l4_region_s *regions,
 115        const struct omap_l4_agent_info_s *agents,
 116        int cs)
 117{
 118    int i;
 119    struct omap_target_agent_s *ta = NULL;
 120    const struct omap_l4_agent_info_s *info = NULL;
 121
 122    for (i = 0; i < bus->ta_num; i ++)
 123        if (agents[i].ta == cs) {
 124            ta = &bus->ta[i];
 125            info = &agents[i];
 126            break;
 127        }
 128    if (!ta) {
 129        fprintf(stderr, "%s: bad target agent (%i)\n", __FUNCTION__, cs);
 130        exit(-1);
 131    }
 132
 133    ta->bus = bus;
 134    ta->start = &regions[info->region];
 135    ta->regions = info->regions;
 136
 137    ta->component = ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
 138    ta->status = 0x00000000;
 139    ta->control = 0x00000200;   /* XXX 01000200 for L4TAO */
 140
 141    memory_region_init_io(&ta->iomem, NULL, &omap_l4ta_ops, ta, "omap.l4ta",
 142                          omap_l4_region_size(ta, info->ta_region));
 143    omap_l4_attach(ta, info->ta_region, &ta->iomem);
 144
 145    return ta;
 146}
 147
 148hwaddr omap_l4_attach(struct omap_target_agent_s *ta,
 149                                         int region, MemoryRegion *mr)
 150{
 151    hwaddr base;
 152
 153    if (region < 0 || region >= ta->regions) {
 154        fprintf(stderr, "%s: bad io region (%i)\n", __FUNCTION__, region);
 155        exit(-1);
 156    }
 157
 158    base = ta->bus->base + ta->start[region].offset;
 159    if (mr) {
 160        memory_region_add_subregion(ta->bus->address_space, base, mr);
 161    }
 162
 163    return base;
 164}
 165