LXR qemu/hw/sh4/shix.c

   1/*
   2 * SHIX 2.0 board description
   3 *
   4 * Copyright (c) 2005 Samuel Tardieu
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24/*
  25   Shix 2.0 board by Alexis Polti, described at
  26   http://perso.enst.fr/~polti/realisations/shix20/
  27
  28   More information in target-sh4/README.sh4
  29*/
  30#include "qemu/osdep.h"
  31#include "qapi/error.h"
  32#include "qemu-common.h"
  33#include "cpu.h"
  34#include "hw/hw.h"
  35#include "hw/sh4/sh.h"
  36#include "sysemu/sysemu.h"
  37#include "sysemu/qtest.h"
  38#include "hw/boards.h"
  39#include "hw/loader.h"
  40#include "exec/address-spaces.h"
  41#include "qemu/error-report.h"
  42
  43#define BIOS_FILENAME "shix_bios.bin"
  44#define BIOS_ADDRESS 0xA0000000
  45
  46static void shix_init(MachineState *machine)
  47{
  48    const char *cpu_model = machine->cpu_model;
  49    int ret;
  50    SuperHCPU *cpu;
  51    struct SH7750State *s;
  52    MemoryRegion *sysmem = get_system_memory();
  53    MemoryRegion *rom = g_new(MemoryRegion, 1);
  54    MemoryRegion *sdram = g_new(MemoryRegion, 2);
  55    
  56    if (!cpu_model)
  57        cpu_model = "any";
  58
  59    cpu = cpu_sh4_init(cpu_model);
  60    if (cpu == NULL) {
  61        fprintf(stderr, "Unable to find CPU definition\n");
  62        exit(1);
  63    }
  64
  65    /* Allocate memory space */
  66    memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal);
  67    vmstate_register_ram_global(rom);
  68    memory_region_set_readonly(rom, true);
  69    memory_region_add_subregion(sysmem, 0x00000000, rom);
  70    memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000,
  71                           &error_fatal);
  72    vmstate_register_ram_global(&sdram[0]);
  73    memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
  74    memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000,
  75                           &error_fatal);
  76    vmstate_register_ram_global(&sdram[1]);
  77    memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
  78
  79    /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
  80    if (bios_name == NULL)
  81        bios_name = BIOS_FILENAME;
  82    ret = load_image_targphys(bios_name, 0, 0x4000);
  83    if (ret < 0 && !qtest_enabled()) {
  84        error_report("Could not load SHIX bios '%s'", bios_name);
  85        exit(1);
  86    }
  87
  88    /* Register peripherals */
  89    s = sh7750_init(cpu, sysmem);
  90    /* XXXXX Check success */
  91    tc58128_init(s, "shix_linux_nand.bin", NULL);
  92}
  93
  94static void shix_machine_init(MachineClass *mc)
  95{
  96    mc->desc = "shix card";
  97    mc->init = shix_init;
  98    mc->is_default = 1;
  99}
 100
 101DEFINE_MACHINE("shix", shix_machine_init)
 102