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21#include "qemu/osdep.h"
22#include <linux/vfio.h>
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25
26#include "hw/pci/msi.h"
27#include "hw/pci/msix.h"
28#include "hw/pci/pci_bridge.h"
29#include "qemu/error-report.h"
30#include "qemu/range.h"
31#include "sysemu/kvm.h"
32#include "sysemu/sysemu.h"
33#include "pci.h"
34#include "trace.h"
35
36#define MSIX_CAP_LENGTH 12
37
38static void vfio_disable_interrupts(VFIOPCIDevice *vdev);
39static void vfio_mmap_set_enabled(VFIOPCIDevice *vdev, bool enabled);
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56static void vfio_intx_mmap_enable(void *opaque)
57{
58 VFIOPCIDevice *vdev = opaque;
59
60 if (vdev->intx.pending) {
61 timer_mod(vdev->intx.mmap_timer,
62 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vdev->intx.mmap_timeout);
63 return;
64 }
65
66 vfio_mmap_set_enabled(vdev, true);
67}
68
69static void vfio_intx_interrupt(void *opaque)
70{
71 VFIOPCIDevice *vdev = opaque;
72
73 if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) {
74 return;
75 }
76
77 trace_vfio_intx_interrupt(vdev->vbasedev.name, 'A' + vdev->intx.pin);
78
79 vdev->intx.pending = true;
80 pci_irq_assert(&vdev->pdev);
81 vfio_mmap_set_enabled(vdev, false);
82 if (vdev->intx.mmap_timeout) {
83 timer_mod(vdev->intx.mmap_timer,
84 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vdev->intx.mmap_timeout);
85 }
86}
87
88static void vfio_intx_eoi(VFIODevice *vbasedev)
89{
90 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev);
91
92 if (!vdev->intx.pending) {
93 return;
94 }
95
96 trace_vfio_intx_eoi(vbasedev->name);
97
98 vdev->intx.pending = false;
99 pci_irq_deassert(&vdev->pdev);
100 vfio_unmask_single_irqindex(vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
101}
102
103static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev)
104{
105#ifdef CONFIG_KVM
106 struct kvm_irqfd irqfd = {
107 .fd = event_notifier_get_fd(&vdev->intx.interrupt),
108 .gsi = vdev->intx.route.irq,
109 .flags = KVM_IRQFD_FLAG_RESAMPLE,
110 };
111 struct vfio_irq_set *irq_set;
112 int ret, argsz;
113 int32_t *pfd;
114
115 if (vdev->no_kvm_intx || !kvm_irqfds_enabled() ||
116 vdev->intx.route.mode != PCI_INTX_ENABLED ||
117 !kvm_resamplefds_enabled()) {
118 return;
119 }
120
121
122 qemu_set_fd_handler(irqfd.fd, NULL, NULL, vdev);
123 vfio_mask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
124 vdev->intx.pending = false;
125 pci_irq_deassert(&vdev->pdev);
126
127
128 if (event_notifier_init(&vdev->intx.unmask, 0)) {
129 error_report("vfio: Error: event_notifier_init failed eoi");
130 goto fail;
131 }
132
133
134 irqfd.resamplefd = event_notifier_get_fd(&vdev->intx.unmask);
135
136 if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) {
137 error_report("vfio: Error: Failed to setup resample irqfd: %m");
138 goto fail_irqfd;
139 }
140
141 argsz = sizeof(*irq_set) + sizeof(*pfd);
142
143 irq_set = g_malloc0(argsz);
144 irq_set->argsz = argsz;
145 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_UNMASK;
146 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
147 irq_set->start = 0;
148 irq_set->count = 1;
149 pfd = (int32_t *)&irq_set->data;
150
151 *pfd = irqfd.resamplefd;
152
153 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
154 g_free(irq_set);
155 if (ret) {
156 error_report("vfio: Error: Failed to setup INTx unmask fd: %m");
157 goto fail_vfio;
158 }
159
160
161 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
162
163 vdev->intx.kvm_accel = true;
164
165 trace_vfio_intx_enable_kvm(vdev->vbasedev.name);
166
167 return;
168
169fail_vfio:
170 irqfd.flags = KVM_IRQFD_FLAG_DEASSIGN;
171 kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd);
172fail_irqfd:
173 event_notifier_cleanup(&vdev->intx.unmask);
174fail:
175 qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
176 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
177#endif
178}
179
180static void vfio_intx_disable_kvm(VFIOPCIDevice *vdev)
181{
182#ifdef CONFIG_KVM
183 struct kvm_irqfd irqfd = {
184 .fd = event_notifier_get_fd(&vdev->intx.interrupt),
185 .gsi = vdev->intx.route.irq,
186 .flags = KVM_IRQFD_FLAG_DEASSIGN,
187 };
188
189 if (!vdev->intx.kvm_accel) {
190 return;
191 }
192
193
194
195
196
197 vfio_mask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
198 vdev->intx.pending = false;
199 pci_irq_deassert(&vdev->pdev);
200
201
202 if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) {
203 error_report("vfio: Error: Failed to disable INTx irqfd: %m");
204 }
205
206
207 event_notifier_cleanup(&vdev->intx.unmask);
208
209
210 qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
211
212 vdev->intx.kvm_accel = false;
213
214
215 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
216
217 trace_vfio_intx_disable_kvm(vdev->vbasedev.name);
218#endif
219}
220
221static void vfio_intx_update(PCIDevice *pdev)
222{
223 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
224 PCIINTxRoute route;
225
226 if (vdev->interrupt != VFIO_INT_INTx) {
227 return;
228 }
229
230 route = pci_device_route_intx_to_irq(&vdev->pdev, vdev->intx.pin);
231
232 if (!pci_intx_route_changed(&vdev->intx.route, &route)) {
233 return;
234 }
235
236 trace_vfio_intx_update(vdev->vbasedev.name,
237 vdev->intx.route.irq, route.irq);
238
239 vfio_intx_disable_kvm(vdev);
240
241 vdev->intx.route = route;
242
243 if (route.mode != PCI_INTX_ENABLED) {
244 return;
245 }
246
247 vfio_intx_enable_kvm(vdev);
248
249
250 vfio_intx_eoi(&vdev->vbasedev);
251}
252
253static int vfio_intx_enable(VFIOPCIDevice *vdev)
254{
255 uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1);
256 int ret, argsz;
257 struct vfio_irq_set *irq_set;
258 int32_t *pfd;
259
260 if (!pin) {
261 return 0;
262 }
263
264 vfio_disable_interrupts(vdev);
265
266 vdev->intx.pin = pin - 1;
267 pci_config_set_interrupt_pin(vdev->pdev.config, pin);
268
269#ifdef CONFIG_KVM
270
271
272
273
274 if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) {
275 vdev->intx.route = pci_device_route_intx_to_irq(&vdev->pdev,
276 vdev->intx.pin);
277 }
278#endif
279
280 ret = event_notifier_init(&vdev->intx.interrupt, 0);
281 if (ret) {
282 error_report("vfio: Error: event_notifier_init failed");
283 return ret;
284 }
285
286 argsz = sizeof(*irq_set) + sizeof(*pfd);
287
288 irq_set = g_malloc0(argsz);
289 irq_set->argsz = argsz;
290 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
291 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
292 irq_set->start = 0;
293 irq_set->count = 1;
294 pfd = (int32_t *)&irq_set->data;
295
296 *pfd = event_notifier_get_fd(&vdev->intx.interrupt);
297 qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev);
298
299 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
300 g_free(irq_set);
301 if (ret) {
302 error_report("vfio: Error: Failed to setup INTx fd: %m");
303 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
304 event_notifier_cleanup(&vdev->intx.interrupt);
305 return -errno;
306 }
307
308 vfio_intx_enable_kvm(vdev);
309
310 vdev->interrupt = VFIO_INT_INTx;
311
312 trace_vfio_intx_enable(vdev->vbasedev.name);
313
314 return 0;
315}
316
317static void vfio_intx_disable(VFIOPCIDevice *vdev)
318{
319 int fd;
320
321 timer_del(vdev->intx.mmap_timer);
322 vfio_intx_disable_kvm(vdev);
323 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX);
324 vdev->intx.pending = false;
325 pci_irq_deassert(&vdev->pdev);
326 vfio_mmap_set_enabled(vdev, true);
327
328 fd = event_notifier_get_fd(&vdev->intx.interrupt);
329 qemu_set_fd_handler(fd, NULL, NULL, vdev);
330 event_notifier_cleanup(&vdev->intx.interrupt);
331
332 vdev->interrupt = VFIO_INT_NONE;
333
334 trace_vfio_intx_disable(vdev->vbasedev.name);
335}
336
337
338
339
340static void vfio_msi_interrupt(void *opaque)
341{
342 VFIOMSIVector *vector = opaque;
343 VFIOPCIDevice *vdev = vector->vdev;
344 MSIMessage (*get_msg)(PCIDevice *dev, unsigned vector);
345 void (*notify)(PCIDevice *dev, unsigned vector);
346 MSIMessage msg;
347 int nr = vector - vdev->msi_vectors;
348
349 if (!event_notifier_test_and_clear(&vector->interrupt)) {
350 return;
351 }
352
353 if (vdev->interrupt == VFIO_INT_MSIX) {
354 get_msg = msix_get_message;
355 notify = msix_notify;
356
357
358 if (msix_is_masked(&vdev->pdev, nr)) {
359 set_bit(nr, vdev->msix->pending);
360 memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, true);
361 trace_vfio_msix_pba_enable(vdev->vbasedev.name);
362 }
363 } else if (vdev->interrupt == VFIO_INT_MSI) {
364 get_msg = msi_get_message;
365 notify = msi_notify;
366 } else {
367 abort();
368 }
369
370 msg = get_msg(&vdev->pdev, nr);
371 trace_vfio_msi_interrupt(vdev->vbasedev.name, nr, msg.address, msg.data);
372 notify(&vdev->pdev, nr);
373}
374
375static int vfio_enable_vectors(VFIOPCIDevice *vdev, bool msix)
376{
377 struct vfio_irq_set *irq_set;
378 int ret = 0, i, argsz;
379 int32_t *fds;
380
381 argsz = sizeof(*irq_set) + (vdev->nr_vectors * sizeof(*fds));
382
383 irq_set = g_malloc0(argsz);
384 irq_set->argsz = argsz;
385 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
386 irq_set->index = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX;
387 irq_set->start = 0;
388 irq_set->count = vdev->nr_vectors;
389 fds = (int32_t *)&irq_set->data;
390
391 for (i = 0; i < vdev->nr_vectors; i++) {
392 int fd = -1;
393
394
395
396
397
398
399
400 if (vdev->msi_vectors[i].use) {
401 if (vdev->msi_vectors[i].virq < 0 ||
402 (msix && msix_is_masked(&vdev->pdev, i))) {
403 fd = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt);
404 } else {
405 fd = event_notifier_get_fd(&vdev->msi_vectors[i].kvm_interrupt);
406 }
407 }
408
409 fds[i] = fd;
410 }
411
412 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
413
414 g_free(irq_set);
415
416 return ret;
417}
418
419static void vfio_add_kvm_msi_virq(VFIOPCIDevice *vdev, VFIOMSIVector *vector,
420 MSIMessage *msg, bool msix)
421{
422 int virq;
423
424 if ((msix && vdev->no_kvm_msix) || (!msix && vdev->no_kvm_msi) || !msg) {
425 return;
426 }
427
428 if (event_notifier_init(&vector->kvm_interrupt, 0)) {
429 return;
430 }
431
432 virq = kvm_irqchip_add_msi_route(kvm_state, *msg, &vdev->pdev);
433 if (virq < 0) {
434 event_notifier_cleanup(&vector->kvm_interrupt);
435 return;
436 }
437
438 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, &vector->kvm_interrupt,
439 NULL, virq) < 0) {
440 kvm_irqchip_release_virq(kvm_state, virq);
441 event_notifier_cleanup(&vector->kvm_interrupt);
442 return;
443 }
444
445 vector->virq = virq;
446}
447
448static void vfio_remove_kvm_msi_virq(VFIOMSIVector *vector)
449{
450 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, &vector->kvm_interrupt,
451 vector->virq);
452 kvm_irqchip_release_virq(kvm_state, vector->virq);
453 vector->virq = -1;
454 event_notifier_cleanup(&vector->kvm_interrupt);
455}
456
457static void vfio_update_kvm_msi_virq(VFIOMSIVector *vector, MSIMessage msg,
458 PCIDevice *pdev)
459{
460 kvm_irqchip_update_msi_route(kvm_state, vector->virq, msg, pdev);
461}
462
463static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr,
464 MSIMessage *msg, IOHandler *handler)
465{
466 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
467 VFIOMSIVector *vector;
468 int ret;
469
470 trace_vfio_msix_vector_do_use(vdev->vbasedev.name, nr);
471
472 vector = &vdev->msi_vectors[nr];
473
474 if (!vector->use) {
475 vector->vdev = vdev;
476 vector->virq = -1;
477 if (event_notifier_init(&vector->interrupt, 0)) {
478 error_report("vfio: Error: event_notifier_init failed");
479 }
480 vector->use = true;
481 msix_vector_use(pdev, nr);
482 }
483
484 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
485 handler, NULL, vector);
486
487
488
489
490
491 if (vector->virq >= 0) {
492 if (!msg) {
493 vfio_remove_kvm_msi_virq(vector);
494 } else {
495 vfio_update_kvm_msi_virq(vector, *msg, pdev);
496 }
497 } else {
498 vfio_add_kvm_msi_virq(vdev, vector, msg, true);
499 }
500
501
502
503
504
505
506 if (vdev->nr_vectors < nr + 1) {
507 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSIX_IRQ_INDEX);
508 vdev->nr_vectors = nr + 1;
509 ret = vfio_enable_vectors(vdev, true);
510 if (ret) {
511 error_report("vfio: failed to enable vectors, %d", ret);
512 }
513 } else {
514 int argsz;
515 struct vfio_irq_set *irq_set;
516 int32_t *pfd;
517
518 argsz = sizeof(*irq_set) + sizeof(*pfd);
519
520 irq_set = g_malloc0(argsz);
521 irq_set->argsz = argsz;
522 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
523 VFIO_IRQ_SET_ACTION_TRIGGER;
524 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
525 irq_set->start = nr;
526 irq_set->count = 1;
527 pfd = (int32_t *)&irq_set->data;
528
529 if (vector->virq >= 0) {
530 *pfd = event_notifier_get_fd(&vector->kvm_interrupt);
531 } else {
532 *pfd = event_notifier_get_fd(&vector->interrupt);
533 }
534
535 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
536 g_free(irq_set);
537 if (ret) {
538 error_report("vfio: failed to modify vector, %d", ret);
539 }
540 }
541
542
543 clear_bit(nr, vdev->msix->pending);
544 if (find_first_bit(vdev->msix->pending,
545 vdev->nr_vectors) == vdev->nr_vectors) {
546 memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, false);
547 trace_vfio_msix_pba_disable(vdev->vbasedev.name);
548 }
549
550 return 0;
551}
552
553static int vfio_msix_vector_use(PCIDevice *pdev,
554 unsigned int nr, MSIMessage msg)
555{
556 return vfio_msix_vector_do_use(pdev, nr, &msg, vfio_msi_interrupt);
557}
558
559static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
560{
561 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
562 VFIOMSIVector *vector = &vdev->msi_vectors[nr];
563
564 trace_vfio_msix_vector_release(vdev->vbasedev.name, nr);
565
566
567
568
569
570
571
572
573
574 if (vector->virq >= 0) {
575 int argsz;
576 struct vfio_irq_set *irq_set;
577 int32_t *pfd;
578
579 argsz = sizeof(*irq_set) + sizeof(*pfd);
580
581 irq_set = g_malloc0(argsz);
582 irq_set->argsz = argsz;
583 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
584 VFIO_IRQ_SET_ACTION_TRIGGER;
585 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
586 irq_set->start = nr;
587 irq_set->count = 1;
588 pfd = (int32_t *)&irq_set->data;
589
590 *pfd = event_notifier_get_fd(&vector->interrupt);
591
592 ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
593
594 g_free(irq_set);
595 }
596}
597
598static void vfio_msix_enable(VFIOPCIDevice *vdev)
599{
600 vfio_disable_interrupts(vdev);
601
602 vdev->msi_vectors = g_new0(VFIOMSIVector, vdev->msix->entries);
603
604 vdev->interrupt = VFIO_INT_MSIX;
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619 vfio_msix_vector_do_use(&vdev->pdev, 0, NULL, NULL);
620 vfio_msix_vector_release(&vdev->pdev, 0);
621
622 if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,
623 vfio_msix_vector_release, NULL)) {
624 error_report("vfio: msix_set_vector_notifiers failed");
625 }
626
627 trace_vfio_msix_enable(vdev->vbasedev.name);
628}
629
630static void vfio_msi_enable(VFIOPCIDevice *vdev)
631{
632 int ret, i;
633
634 vfio_disable_interrupts(vdev);
635
636 vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev);
637retry:
638 vdev->msi_vectors = g_new0(VFIOMSIVector, vdev->nr_vectors);
639
640 for (i = 0; i < vdev->nr_vectors; i++) {
641 VFIOMSIVector *vector = &vdev->msi_vectors[i];
642 MSIMessage msg = msi_get_message(&vdev->pdev, i);
643
644 vector->vdev = vdev;
645 vector->virq = -1;
646 vector->use = true;
647
648 if (event_notifier_init(&vector->interrupt, 0)) {
649 error_report("vfio: Error: event_notifier_init failed");
650 }
651
652 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
653 vfio_msi_interrupt, NULL, vector);
654
655
656
657
658
659 vfio_add_kvm_msi_virq(vdev, vector, &msg, false);
660 }
661
662
663 vdev->interrupt = VFIO_INT_MSI;
664
665 ret = vfio_enable_vectors(vdev, false);
666 if (ret) {
667 if (ret < 0) {
668 error_report("vfio: Error: Failed to setup MSI fds: %m");
669 } else if (ret != vdev->nr_vectors) {
670 error_report("vfio: Error: Failed to enable %d "
671 "MSI vectors, retry with %d", vdev->nr_vectors, ret);
672 }
673
674 for (i = 0; i < vdev->nr_vectors; i++) {
675 VFIOMSIVector *vector = &vdev->msi_vectors[i];
676 if (vector->virq >= 0) {
677 vfio_remove_kvm_msi_virq(vector);
678 }
679 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
680 NULL, NULL, NULL);
681 event_notifier_cleanup(&vector->interrupt);
682 }
683
684 g_free(vdev->msi_vectors);
685
686 if (ret > 0 && ret != vdev->nr_vectors) {
687 vdev->nr_vectors = ret;
688 goto retry;
689 }
690 vdev->nr_vectors = 0;
691
692
693
694
695
696
697 error_report("vfio: Error: Failed to enable MSI");
698 vdev->interrupt = VFIO_INT_NONE;
699
700 return;
701 }
702
703 trace_vfio_msi_enable(vdev->vbasedev.name, vdev->nr_vectors);
704}
705
706static void vfio_msi_disable_common(VFIOPCIDevice *vdev)
707{
708 int i;
709
710 for (i = 0; i < vdev->nr_vectors; i++) {
711 VFIOMSIVector *vector = &vdev->msi_vectors[i];
712 if (vdev->msi_vectors[i].use) {
713 if (vector->virq >= 0) {
714 vfio_remove_kvm_msi_virq(vector);
715 }
716 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
717 NULL, NULL, NULL);
718 event_notifier_cleanup(&vector->interrupt);
719 }
720 }
721
722 g_free(vdev->msi_vectors);
723 vdev->msi_vectors = NULL;
724 vdev->nr_vectors = 0;
725 vdev->interrupt = VFIO_INT_NONE;
726
727 vfio_intx_enable(vdev);
728}
729
730static void vfio_msix_disable(VFIOPCIDevice *vdev)
731{
732 int i;
733
734 msix_unset_vector_notifiers(&vdev->pdev);
735
736
737
738
739
740 for (i = 0; i < vdev->nr_vectors; i++) {
741 if (vdev->msi_vectors[i].use) {
742 vfio_msix_vector_release(&vdev->pdev, i);
743 msix_vector_unuse(&vdev->pdev, i);
744 }
745 }
746
747 if (vdev->nr_vectors) {
748 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSIX_IRQ_INDEX);
749 }
750
751 vfio_msi_disable_common(vdev);
752
753 memset(vdev->msix->pending, 0,
754 BITS_TO_LONGS(vdev->msix->entries) * sizeof(unsigned long));
755
756 trace_vfio_msix_disable(vdev->vbasedev.name);
757}
758
759static void vfio_msi_disable(VFIOPCIDevice *vdev)
760{
761 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSI_IRQ_INDEX);
762 vfio_msi_disable_common(vdev);
763
764 trace_vfio_msi_disable(vdev->vbasedev.name);
765}
766
767static void vfio_update_msi(VFIOPCIDevice *vdev)
768{
769 int i;
770
771 for (i = 0; i < vdev->nr_vectors; i++) {
772 VFIOMSIVector *vector = &vdev->msi_vectors[i];
773 MSIMessage msg;
774
775 if (!vector->use || vector->virq < 0) {
776 continue;
777 }
778
779 msg = msi_get_message(&vdev->pdev, i);
780 vfio_update_kvm_msi_virq(vector, msg, &vdev->pdev);
781 }
782}
783
784static void vfio_pci_load_rom(VFIOPCIDevice *vdev)
785{
786 struct vfio_region_info *reg_info;
787 uint64_t size;
788 off_t off = 0;
789 ssize_t bytes;
790
791 if (vfio_get_region_info(&vdev->vbasedev,
792 VFIO_PCI_ROM_REGION_INDEX, ®_info)) {
793 error_report("vfio: Error getting ROM info: %m");
794 return;
795 }
796
797 trace_vfio_pci_load_rom(vdev->vbasedev.name, (unsigned long)reg_info->size,
798 (unsigned long)reg_info->offset,
799 (unsigned long)reg_info->flags);
800
801 vdev->rom_size = size = reg_info->size;
802 vdev->rom_offset = reg_info->offset;
803
804 g_free(reg_info);
805
806 if (!vdev->rom_size) {
807 vdev->rom_read_failed = true;
808 error_report("vfio-pci: Cannot read device rom at "
809 "%s", vdev->vbasedev.name);
810 error_printf("Device option ROM contents are probably invalid "
811 "(check dmesg).\nSkip option ROM probe with rombar=0, "
812 "or load from file with romfile=\n");
813 return;
814 }
815
816 vdev->rom = g_malloc(size);
817 memset(vdev->rom, 0xff, size);
818
819 while (size) {
820 bytes = pread(vdev->vbasedev.fd, vdev->rom + off,
821 size, vdev->rom_offset + off);
822 if (bytes == 0) {
823 break;
824 } else if (bytes > 0) {
825 off += bytes;
826 size -= bytes;
827 } else {
828 if (errno == EINTR || errno == EAGAIN) {
829 continue;
830 }
831 error_report("vfio: Error reading device ROM: %m");
832 break;
833 }
834 }
835
836
837
838
839
840
841
842 if (pci_get_word(vdev->rom) == 0xaa55 &&
843 pci_get_word(vdev->rom + 0x18) + 8 < vdev->rom_size &&
844 !memcmp(vdev->rom + pci_get_word(vdev->rom + 0x18), "PCIR", 4)) {
845 uint16_t vid, did;
846
847 vid = pci_get_word(vdev->rom + pci_get_word(vdev->rom + 0x18) + 4);
848 did = pci_get_word(vdev->rom + pci_get_word(vdev->rom + 0x18) + 6);
849
850 if (vid == vdev->vendor_id && did != vdev->device_id) {
851 int i;
852 uint8_t csum, *data = vdev->rom;
853
854 pci_set_word(vdev->rom + pci_get_word(vdev->rom + 0x18) + 6,
855 vdev->device_id);
856 data[6] = 0;
857
858 for (csum = 0, i = 0; i < vdev->rom_size; i++) {
859 csum += data[i];
860 }
861
862 data[6] = -csum;
863 }
864 }
865}
866
867static uint64_t vfio_rom_read(void *opaque, hwaddr addr, unsigned size)
868{
869 VFIOPCIDevice *vdev = opaque;
870 union {
871 uint8_t byte;
872 uint16_t word;
873 uint32_t dword;
874 uint64_t qword;
875 } val;
876 uint64_t data = 0;
877
878
879 if (unlikely(!vdev->rom && !vdev->rom_read_failed)) {
880 vfio_pci_load_rom(vdev);
881 }
882
883 memcpy(&val, vdev->rom + addr,
884 (addr < vdev->rom_size) ? MIN(size, vdev->rom_size - addr) : 0);
885
886 switch (size) {
887 case 1:
888 data = val.byte;
889 break;
890 case 2:
891 data = le16_to_cpu(val.word);
892 break;
893 case 4:
894 data = le32_to_cpu(val.dword);
895 break;
896 default:
897 hw_error("vfio: unsupported read size, %d bytes\n", size);
898 break;
899 }
900
901 trace_vfio_rom_read(vdev->vbasedev.name, addr, size, data);
902
903 return data;
904}
905
906static void vfio_rom_write(void *opaque, hwaddr addr,
907 uint64_t data, unsigned size)
908{
909}
910
911static const MemoryRegionOps vfio_rom_ops = {
912 .read = vfio_rom_read,
913 .write = vfio_rom_write,
914 .endianness = DEVICE_LITTLE_ENDIAN,
915};
916
917static void vfio_pci_size_rom(VFIOPCIDevice *vdev)
918{
919 uint32_t orig, size = cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK);
920 off_t offset = vdev->config_offset + PCI_ROM_ADDRESS;
921 DeviceState *dev = DEVICE(vdev);
922 char *name;
923 int fd = vdev->vbasedev.fd;
924
925 if (vdev->pdev.romfile || !vdev->pdev.rom_bar) {
926
927 if (vfio_blacklist_opt_rom(vdev) && vdev->pdev.romfile) {
928 error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified romfile\n",
929 vdev->vbasedev.name);
930 }
931 return;
932 }
933
934
935
936
937
938 if (pread(fd, &orig, 4, offset) != 4 ||
939 pwrite(fd, &size, 4, offset) != 4 ||
940 pread(fd, &size, 4, offset) != 4 ||
941 pwrite(fd, &orig, 4, offset) != 4) {
942 error_report("%s(%s) failed: %m", __func__, vdev->vbasedev.name);
943 return;
944 }
945
946 size = ~(le32_to_cpu(size) & PCI_ROM_ADDRESS_MASK) + 1;
947
948 if (!size) {
949 return;
950 }
951
952 if (vfio_blacklist_opt_rom(vdev)) {
953 if (dev->opts && qemu_opt_get(dev->opts, "rombar")) {
954 error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified non zero value for rombar\n",
955 vdev->vbasedev.name);
956 } else {
957 error_printf("Warning : Rom loading for device at %s has been disabled due to system instability issues. Specify rombar=1 or romfile to force\n",
958 vdev->vbasedev.name);
959 return;
960 }
961 }
962
963 trace_vfio_pci_size_rom(vdev->vbasedev.name, size);
964
965 name = g_strdup_printf("vfio[%s].rom", vdev->vbasedev.name);
966
967 memory_region_init_io(&vdev->pdev.rom, OBJECT(vdev),
968 &vfio_rom_ops, vdev, name, size);
969 g_free(name);
970
971 pci_register_bar(&vdev->pdev, PCI_ROM_SLOT,
972 PCI_BASE_ADDRESS_SPACE_MEMORY, &vdev->pdev.rom);
973
974 vdev->pdev.has_rom = true;
975 vdev->rom_read_failed = false;
976}
977
978void vfio_vga_write(void *opaque, hwaddr addr,
979 uint64_t data, unsigned size)
980{
981 VFIOVGARegion *region = opaque;
982 VFIOVGA *vga = container_of(region, VFIOVGA, region[region->nr]);
983 union {
984 uint8_t byte;
985 uint16_t word;
986 uint32_t dword;
987 uint64_t qword;
988 } buf;
989 off_t offset = vga->fd_offset + region->offset + addr;
990
991 switch (size) {
992 case 1:
993 buf.byte = data;
994 break;
995 case 2:
996 buf.word = cpu_to_le16(data);
997 break;
998 case 4:
999 buf.dword = cpu_to_le32(data);
1000 break;
1001 default:
1002 hw_error("vfio: unsupported write size, %d bytes", size);
1003 break;
1004 }
1005
1006 if (pwrite(vga->fd, &buf, size, offset) != size) {
1007 error_report("%s(,0x%"HWADDR_PRIx", 0x%"PRIx64", %d) failed: %m",
1008 __func__, region->offset + addr, data, size);
1009 }
1010
1011 trace_vfio_vga_write(region->offset + addr, data, size);
1012}
1013
1014uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size)
1015{
1016 VFIOVGARegion *region = opaque;
1017 VFIOVGA *vga = container_of(region, VFIOVGA, region[region->nr]);
1018 union {
1019 uint8_t byte;
1020 uint16_t word;
1021 uint32_t dword;
1022 uint64_t qword;
1023 } buf;
1024 uint64_t data = 0;
1025 off_t offset = vga->fd_offset + region->offset + addr;
1026
1027 if (pread(vga->fd, &buf, size, offset) != size) {
1028 error_report("%s(,0x%"HWADDR_PRIx", %d) failed: %m",
1029 __func__, region->offset + addr, size);
1030 return (uint64_t)-1;
1031 }
1032
1033 switch (size) {
1034 case 1:
1035 data = buf.byte;
1036 break;
1037 case 2:
1038 data = le16_to_cpu(buf.word);
1039 break;
1040 case 4:
1041 data = le32_to_cpu(buf.dword);
1042 break;
1043 default:
1044 hw_error("vfio: unsupported read size, %d bytes", size);
1045 break;
1046 }
1047
1048 trace_vfio_vga_read(region->offset + addr, size, data);
1049
1050 return data;
1051}
1052
1053static const MemoryRegionOps vfio_vga_ops = {
1054 .read = vfio_vga_read,
1055 .write = vfio_vga_write,
1056 .endianness = DEVICE_LITTLE_ENDIAN,
1057};
1058
1059
1060
1061
1062uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
1063{
1064 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
1065 uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val;
1066
1067 memcpy(&emu_bits, vdev->emulated_config_bits + addr, len);
1068 emu_bits = le32_to_cpu(emu_bits);
1069
1070 if (emu_bits) {
1071 emu_val = pci_default_read_config(pdev, addr, len);
1072 }
1073
1074 if (~emu_bits & (0xffffffffU >> (32 - len * 8))) {
1075 ssize_t ret;
1076
1077 ret = pread(vdev->vbasedev.fd, &phys_val, len,
1078 vdev->config_offset + addr);
1079 if (ret != len) {
1080 error_report("%s(%s, 0x%x, 0x%x) failed: %m",
1081 __func__, vdev->vbasedev.name, addr, len);
1082 return -errno;
1083 }
1084 phys_val = le32_to_cpu(phys_val);
1085 }
1086
1087 val = (emu_val & emu_bits) | (phys_val & ~emu_bits);
1088
1089 trace_vfio_pci_read_config(vdev->vbasedev.name, addr, len, val);
1090
1091 return val;
1092}
1093
1094void vfio_pci_write_config(PCIDevice *pdev,
1095 uint32_t addr, uint32_t val, int len)
1096{
1097 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
1098 uint32_t val_le = cpu_to_le32(val);
1099
1100 trace_vfio_pci_write_config(vdev->vbasedev.name, addr, val, len);
1101
1102
1103 if (pwrite(vdev->vbasedev.fd, &val_le, len, vdev->config_offset + addr)
1104 != len) {
1105 error_report("%s(%s, 0x%x, 0x%x, 0x%x) failed: %m",
1106 __func__, vdev->vbasedev.name, addr, val, len);
1107 }
1108
1109
1110 if (pdev->cap_present & QEMU_PCI_CAP_MSI &&
1111 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) {
1112 int is_enabled, was_enabled = msi_enabled(pdev);
1113
1114 pci_default_write_config(pdev, addr, val, len);
1115
1116 is_enabled = msi_enabled(pdev);
1117
1118 if (!was_enabled) {
1119 if (is_enabled) {
1120 vfio_msi_enable(vdev);
1121 }
1122 } else {
1123 if (!is_enabled) {
1124 vfio_msi_disable(vdev);
1125 } else {
1126 vfio_update_msi(vdev);
1127 }
1128 }
1129 } else if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
1130 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) {
1131 int is_enabled, was_enabled = msix_enabled(pdev);
1132
1133 pci_default_write_config(pdev, addr, val, len);
1134
1135 is_enabled = msix_enabled(pdev);
1136
1137 if (!was_enabled && is_enabled) {
1138 vfio_msix_enable(vdev);
1139 } else if (was_enabled && !is_enabled) {
1140 vfio_msix_disable(vdev);
1141 }
1142 } else {
1143
1144 pci_default_write_config(pdev, addr, val, len);
1145 }
1146}
1147
1148
1149
1150
1151static void vfio_disable_interrupts(VFIOPCIDevice *vdev)
1152{
1153
1154
1155
1156
1157
1158 if (vdev->interrupt == VFIO_INT_MSIX) {
1159 vfio_msix_disable(vdev);
1160 } else if (vdev->interrupt == VFIO_INT_MSI) {
1161 vfio_msi_disable(vdev);
1162 }
1163
1164 if (vdev->interrupt == VFIO_INT_INTx) {
1165 vfio_intx_disable(vdev);
1166 }
1167}
1168
1169static int vfio_msi_setup(VFIOPCIDevice *vdev, int pos)
1170{
1171 uint16_t ctrl;
1172 bool msi_64bit, msi_maskbit;
1173 int ret, entries;
1174
1175 if (pread(vdev->vbasedev.fd, &ctrl, sizeof(ctrl),
1176 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1177 return -errno;
1178 }
1179 ctrl = le16_to_cpu(ctrl);
1180
1181 msi_64bit = !!(ctrl & PCI_MSI_FLAGS_64BIT);
1182 msi_maskbit = !!(ctrl & PCI_MSI_FLAGS_MASKBIT);
1183 entries = 1 << ((ctrl & PCI_MSI_FLAGS_QMASK) >> 1);
1184
1185 trace_vfio_msi_setup(vdev->vbasedev.name, pos);
1186
1187 ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit);
1188 if (ret < 0) {
1189 if (ret == -ENOTSUP) {
1190 return 0;
1191 }
1192 error_report("vfio: msi_init failed");
1193 return ret;
1194 }
1195 vdev->msi_cap_size = 0xa + (msi_maskbit ? 0xa : 0) + (msi_64bit ? 0x4 : 0);
1196
1197 return 0;
1198}
1199
1200static void vfio_pci_fixup_msix_region(VFIOPCIDevice *vdev)
1201{
1202 off_t start, end;
1203 VFIORegion *region = &vdev->bars[vdev->msix->table_bar].region;
1204
1205
1206
1207
1208
1209 if (region->nr_mmaps != 1 || region->mmaps[0].offset ||
1210 region->size != region->mmaps[0].size) {
1211 return;
1212 }
1213
1214
1215 start = vdev->msix->table_offset & qemu_real_host_page_mask;
1216 end = REAL_HOST_PAGE_ALIGN((uint64_t)vdev->msix->table_offset +
1217 (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE));
1218
1219
1220
1221
1222
1223
1224
1225
1226 if (!start) {
1227 if (end >= region->size) {
1228 region->nr_mmaps = 0;
1229 g_free(region->mmaps);
1230 region->mmaps = NULL;
1231 trace_vfio_msix_fixup(vdev->vbasedev.name,
1232 vdev->msix->table_bar, 0, 0);
1233 } else {
1234 region->mmaps[0].offset = end;
1235 region->mmaps[0].size = region->size - end;
1236 trace_vfio_msix_fixup(vdev->vbasedev.name,
1237 vdev->msix->table_bar, region->mmaps[0].offset,
1238 region->mmaps[0].offset + region->mmaps[0].size);
1239 }
1240
1241
1242 } else if (end >= region->size) {
1243 region->mmaps[0].size = start;
1244 trace_vfio_msix_fixup(vdev->vbasedev.name,
1245 vdev->msix->table_bar, region->mmaps[0].offset,
1246 region->mmaps[0].offset + region->mmaps[0].size);
1247
1248
1249 } else {
1250 region->nr_mmaps = 2;
1251 region->mmaps = g_renew(VFIOMmap, region->mmaps, 2);
1252
1253 memcpy(®ion->mmaps[1], ®ion->mmaps[0], sizeof(VFIOMmap));
1254
1255 region->mmaps[0].size = start;
1256 trace_vfio_msix_fixup(vdev->vbasedev.name,
1257 vdev->msix->table_bar, region->mmaps[0].offset,
1258 region->mmaps[0].offset + region->mmaps[0].size);
1259
1260 region->mmaps[1].offset = end;
1261 region->mmaps[1].size = region->size - end;
1262 trace_vfio_msix_fixup(vdev->vbasedev.name,
1263 vdev->msix->table_bar, region->mmaps[1].offset,
1264 region->mmaps[1].offset + region->mmaps[1].size);
1265 }
1266}
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276static int vfio_msix_early_setup(VFIOPCIDevice *vdev)
1277{
1278 uint8_t pos;
1279 uint16_t ctrl;
1280 uint32_t table, pba;
1281 int fd = vdev->vbasedev.fd;
1282 VFIOMSIXInfo *msix;
1283
1284 pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX);
1285 if (!pos) {
1286 return 0;
1287 }
1288
1289 if (pread(fd, &ctrl, sizeof(ctrl),
1290 vdev->config_offset + pos + PCI_MSIX_FLAGS) != sizeof(ctrl)) {
1291 return -errno;
1292 }
1293
1294 if (pread(fd, &table, sizeof(table),
1295 vdev->config_offset + pos + PCI_MSIX_TABLE) != sizeof(table)) {
1296 return -errno;
1297 }
1298
1299 if (pread(fd, &pba, sizeof(pba),
1300 vdev->config_offset + pos + PCI_MSIX_PBA) != sizeof(pba)) {
1301 return -errno;
1302 }
1303
1304 ctrl = le16_to_cpu(ctrl);
1305 table = le32_to_cpu(table);
1306 pba = le32_to_cpu(pba);
1307
1308 msix = g_malloc0(sizeof(*msix));
1309 msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
1310 msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
1311 msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
1312 msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
1313 msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
1314
1315
1316
1317
1318
1319
1320 if (msix->pba_offset >= vdev->bars[msix->pba_bar].region.size) {
1321
1322
1323
1324
1325
1326
1327 if (vdev->vendor_id == PCI_VENDOR_ID_CHELSIO &&
1328 (vdev->device_id & 0xff00) == 0x5800) {
1329 msix->pba_offset = 0x1000;
1330 } else {
1331 error_report("vfio: Hardware reports invalid configuration, "
1332 "MSIX PBA outside of specified BAR");
1333 g_free(msix);
1334 return -EINVAL;
1335 }
1336 }
1337
1338 trace_vfio_msix_early_setup(vdev->vbasedev.name, pos, msix->table_bar,
1339 msix->table_offset, msix->entries);
1340 vdev->msix = msix;
1341
1342 vfio_pci_fixup_msix_region(vdev);
1343
1344 return 0;
1345}
1346
1347static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos)
1348{
1349 int ret;
1350
1351 vdev->msix->pending = g_malloc0(BITS_TO_LONGS(vdev->msix->entries) *
1352 sizeof(unsigned long));
1353 ret = msix_init(&vdev->pdev, vdev->msix->entries,
1354 vdev->bars[vdev->msix->table_bar].region.mem,
1355 vdev->msix->table_bar, vdev->msix->table_offset,
1356 vdev->bars[vdev->msix->pba_bar].region.mem,
1357 vdev->msix->pba_bar, vdev->msix->pba_offset, pos);
1358 if (ret < 0) {
1359 if (ret == -ENOTSUP) {
1360 return 0;
1361 }
1362 error_report("vfio: msix_init failed");
1363 return ret;
1364 }
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382 memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, false);
1383
1384 return 0;
1385}
1386
1387static void vfio_teardown_msi(VFIOPCIDevice *vdev)
1388{
1389 msi_uninit(&vdev->pdev);
1390
1391 if (vdev->msix) {
1392 msix_uninit(&vdev->pdev,
1393 vdev->bars[vdev->msix->table_bar].region.mem,
1394 vdev->bars[vdev->msix->pba_bar].region.mem);
1395 g_free(vdev->msix->pending);
1396 }
1397}
1398
1399
1400
1401
1402static void vfio_mmap_set_enabled(VFIOPCIDevice *vdev, bool enabled)
1403{
1404 int i;
1405
1406 for (i = 0; i < PCI_ROM_SLOT; i++) {
1407 vfio_region_mmaps_set_enabled(&vdev->bars[i].region, enabled);
1408 }
1409}
1410
1411static void vfio_bar_setup(VFIOPCIDevice *vdev, int nr)
1412{
1413 VFIOBAR *bar = &vdev->bars[nr];
1414
1415 uint32_t pci_bar;
1416 uint8_t type;
1417 int ret;
1418
1419
1420 if (!bar->region.size) {
1421 return;
1422 }
1423
1424
1425 ret = pread(vdev->vbasedev.fd, &pci_bar, sizeof(pci_bar),
1426 vdev->config_offset + PCI_BASE_ADDRESS_0 + (4 * nr));
1427 if (ret != sizeof(pci_bar)) {
1428 error_report("vfio: Failed to read BAR %d (%m)", nr);
1429 return;
1430 }
1431
1432 pci_bar = le32_to_cpu(pci_bar);
1433 bar->ioport = (pci_bar & PCI_BASE_ADDRESS_SPACE_IO);
1434 bar->mem64 = bar->ioport ? 0 : (pci_bar & PCI_BASE_ADDRESS_MEM_TYPE_64);
1435 type = pci_bar & (bar->ioport ? ~PCI_BASE_ADDRESS_IO_MASK :
1436 ~PCI_BASE_ADDRESS_MEM_MASK);
1437
1438 if (vfio_region_mmap(&bar->region)) {
1439 error_report("Failed to mmap %s BAR %d. Performance may be slow",
1440 vdev->vbasedev.name, nr);
1441 }
1442
1443 vfio_bar_quirk_setup(vdev, nr);
1444
1445 pci_register_bar(&vdev->pdev, nr, type, bar->region.mem);
1446}
1447
1448static void vfio_bars_setup(VFIOPCIDevice *vdev)
1449{
1450 int i;
1451
1452 for (i = 0; i < PCI_ROM_SLOT; i++) {
1453 vfio_bar_setup(vdev, i);
1454 }
1455
1456 if (vdev->vga) {
1457 memory_region_init_io(&vdev->vga->region[QEMU_PCI_VGA_MEM].mem,
1458 OBJECT(vdev), &vfio_vga_ops,
1459 &vdev->vga->region[QEMU_PCI_VGA_MEM],
1460 "vfio-vga-mmio@0xa0000",
1461 QEMU_PCI_VGA_MEM_SIZE);
1462 memory_region_init_io(&vdev->vga->region[QEMU_PCI_VGA_IO_LO].mem,
1463 OBJECT(vdev), &vfio_vga_ops,
1464 &vdev->vga->region[QEMU_PCI_VGA_IO_LO],
1465 "vfio-vga-io@0x3b0",
1466 QEMU_PCI_VGA_IO_LO_SIZE);
1467 memory_region_init_io(&vdev->vga->region[QEMU_PCI_VGA_IO_HI].mem,
1468 OBJECT(vdev), &vfio_vga_ops,
1469 &vdev->vga->region[QEMU_PCI_VGA_IO_HI],
1470 "vfio-vga-io@0x3c0",
1471 QEMU_PCI_VGA_IO_HI_SIZE);
1472
1473 pci_register_vga(&vdev->pdev, &vdev->vga->region[QEMU_PCI_VGA_MEM].mem,
1474 &vdev->vga->region[QEMU_PCI_VGA_IO_LO].mem,
1475 &vdev->vga->region[QEMU_PCI_VGA_IO_HI].mem);
1476 vfio_vga_quirk_setup(vdev);
1477 }
1478}
1479
1480static void vfio_bars_exit(VFIOPCIDevice *vdev)
1481{
1482 int i;
1483
1484 for (i = 0; i < PCI_ROM_SLOT; i++) {
1485 vfio_bar_quirk_exit(vdev, i);
1486 vfio_region_exit(&vdev->bars[i].region);
1487 }
1488
1489 if (vdev->vga) {
1490 pci_unregister_vga(&vdev->pdev);
1491 vfio_vga_quirk_exit(vdev);
1492 }
1493}
1494
1495static void vfio_bars_finalize(VFIOPCIDevice *vdev)
1496{
1497 int i;
1498
1499 for (i = 0; i < PCI_ROM_SLOT; i++) {
1500 vfio_bar_quirk_finalize(vdev, i);
1501 vfio_region_finalize(&vdev->bars[i].region);
1502 }
1503
1504 if (vdev->vga) {
1505 vfio_vga_quirk_finalize(vdev);
1506 for (i = 0; i < ARRAY_SIZE(vdev->vga->region); i++) {
1507 object_unparent(OBJECT(&vdev->vga->region[i].mem));
1508 }
1509 g_free(vdev->vga);
1510 }
1511}
1512
1513
1514
1515
1516static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
1517{
1518 uint8_t tmp;
1519 uint16_t next = PCI_CONFIG_SPACE_SIZE;
1520
1521 for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
1522 tmp = pdev->config[tmp + PCI_CAP_LIST_NEXT]) {
1523 if (tmp > pos && tmp < next) {
1524 next = tmp;
1525 }
1526 }
1527
1528 return next - pos;
1529}
1530
1531static void vfio_set_word_bits(uint8_t *buf, uint16_t val, uint16_t mask)
1532{
1533 pci_set_word(buf, (pci_get_word(buf) & ~mask) | val);
1534}
1535
1536static void vfio_add_emulated_word(VFIOPCIDevice *vdev, int pos,
1537 uint16_t val, uint16_t mask)
1538{
1539 vfio_set_word_bits(vdev->pdev.config + pos, val, mask);
1540 vfio_set_word_bits(vdev->pdev.wmask + pos, ~mask, mask);
1541 vfio_set_word_bits(vdev->emulated_config_bits + pos, mask, mask);
1542}
1543
1544static void vfio_set_long_bits(uint8_t *buf, uint32_t val, uint32_t mask)
1545{
1546 pci_set_long(buf, (pci_get_long(buf) & ~mask) | val);
1547}
1548
1549static void vfio_add_emulated_long(VFIOPCIDevice *vdev, int pos,
1550 uint32_t val, uint32_t mask)
1551{
1552 vfio_set_long_bits(vdev->pdev.config + pos, val, mask);
1553 vfio_set_long_bits(vdev->pdev.wmask + pos, ~mask, mask);
1554 vfio_set_long_bits(vdev->emulated_config_bits + pos, mask, mask);
1555}
1556
1557static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size)
1558{
1559 uint16_t flags;
1560 uint8_t type;
1561
1562 flags = pci_get_word(vdev->pdev.config + pos + PCI_CAP_FLAGS);
1563 type = (flags & PCI_EXP_FLAGS_TYPE) >> 4;
1564
1565 if (type != PCI_EXP_TYPE_ENDPOINT &&
1566 type != PCI_EXP_TYPE_LEG_END &&
1567 type != PCI_EXP_TYPE_RC_END) {
1568
1569 error_report("vfio: Assignment of PCIe type 0x%x "
1570 "devices is not currently supported", type);
1571 return -EINVAL;
1572 }
1573
1574 if (!pci_bus_is_express(vdev->pdev.bus)) {
1575 PCIBus *bus = vdev->pdev.bus;
1576 PCIDevice *bridge;
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598 while (!pci_bus_is_root(bus)) {
1599 bridge = pci_bridge_get_device(bus);
1600 bus = bridge->bus;
1601 }
1602
1603 if (pci_bus_is_express(bus)) {
1604 return 0;
1605 }
1606
1607 } else if (pci_bus_is_root(vdev->pdev.bus)) {
1608
1609
1610
1611
1612 if (type == PCI_EXP_TYPE_ENDPOINT) {
1613 vfio_add_emulated_word(vdev, pos + PCI_CAP_FLAGS,
1614 PCI_EXP_TYPE_RC_END << 4,
1615 PCI_EXP_FLAGS_TYPE);
1616
1617
1618 if (size > PCI_EXP_LNKCTL) {
1619 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP, 0, ~0);
1620 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL, 0, ~0);
1621 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA, 0, ~0);
1622
1623#ifndef PCI_EXP_LNKCAP2
1624#define PCI_EXP_LNKCAP2 44
1625#endif
1626#ifndef PCI_EXP_LNKSTA2
1627#define PCI_EXP_LNKSTA2 50
1628#endif
1629
1630 if (size > PCI_EXP_LNKCAP2) {
1631 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP2, 0, ~0);
1632 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL2, 0, ~0);
1633 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA2, 0, ~0);
1634 }
1635 }
1636
1637 } else if (type == PCI_EXP_TYPE_LEG_END) {
1638
1639
1640
1641
1642 return 0;
1643 }
1644
1645 } else {
1646
1647
1648
1649
1650 if (type == PCI_EXP_TYPE_RC_END) {
1651 vfio_add_emulated_word(vdev, pos + PCI_CAP_FLAGS,
1652 PCI_EXP_TYPE_ENDPOINT << 4,
1653 PCI_EXP_FLAGS_TYPE);
1654 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP,
1655 PCI_EXP_LNK_MLW_1 | PCI_EXP_LNK_LS_25, ~0);
1656 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL, 0, ~0);
1657 }
1658
1659
1660 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA,
1661 pci_get_word(vdev->pdev.config + pos +
1662 PCI_EXP_LNKSTA),
1663 PCI_EXP_LNKCAP_MLW | PCI_EXP_LNKCAP_SLS);
1664 }
1665
1666 pos = pci_add_capability(&vdev->pdev, PCI_CAP_ID_EXP, pos, size);
1667 if (pos >= 0) {
1668 vdev->pdev.exp.exp_cap = pos;
1669 }
1670
1671 return pos;
1672}
1673
1674static void vfio_check_pcie_flr(VFIOPCIDevice *vdev, uint8_t pos)
1675{
1676 uint32_t cap = pci_get_long(vdev->pdev.config + pos + PCI_EXP_DEVCAP);
1677
1678 if (cap & PCI_EXP_DEVCAP_FLR) {
1679 trace_vfio_check_pcie_flr(vdev->vbasedev.name);
1680 vdev->has_flr = true;
1681 }
1682}
1683
1684static void vfio_check_pm_reset(VFIOPCIDevice *vdev, uint8_t pos)
1685{
1686 uint16_t csr = pci_get_word(vdev->pdev.config + pos + PCI_PM_CTRL);
1687
1688 if (!(csr & PCI_PM_CTRL_NO_SOFT_RESET)) {
1689 trace_vfio_check_pm_reset(vdev->vbasedev.name);
1690 vdev->has_pm_reset = true;
1691 }
1692}
1693
1694static void vfio_check_af_flr(VFIOPCIDevice *vdev, uint8_t pos)
1695{
1696 uint8_t cap = pci_get_byte(vdev->pdev.config + pos + PCI_AF_CAP);
1697
1698 if ((cap & PCI_AF_CAP_TP) && (cap & PCI_AF_CAP_FLR)) {
1699 trace_vfio_check_af_flr(vdev->vbasedev.name);
1700 vdev->has_flr = true;
1701 }
1702}
1703
1704static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos)
1705{
1706 PCIDevice *pdev = &vdev->pdev;
1707 uint8_t cap_id, next, size;
1708 int ret;
1709
1710 cap_id = pdev->config[pos];
1711 next = pdev->config[pos + PCI_CAP_LIST_NEXT];
1712
1713
1714
1715
1716
1717
1718
1719 size = vfio_std_cap_max_size(pdev, pos);
1720
1721
1722
1723
1724
1725
1726
1727
1728 if (next) {
1729 ret = vfio_add_std_cap(vdev, next);
1730 if (ret) {
1731 return ret;
1732 }
1733 } else {
1734
1735 pdev->config[PCI_CAPABILITY_LIST] = 0;
1736 vdev->emulated_config_bits[PCI_CAPABILITY_LIST] = 0xff;
1737 vdev->emulated_config_bits[PCI_STATUS] |= PCI_STATUS_CAP_LIST;
1738 }
1739
1740
1741 pci_set_byte(vdev->emulated_config_bits + pos + PCI_CAP_LIST_NEXT, 0xff);
1742
1743 switch (cap_id) {
1744 case PCI_CAP_ID_MSI:
1745 ret = vfio_msi_setup(vdev, pos);
1746 break;
1747 case PCI_CAP_ID_EXP:
1748 vfio_check_pcie_flr(vdev, pos);
1749 ret = vfio_setup_pcie_cap(vdev, pos, size);
1750 break;
1751 case PCI_CAP_ID_MSIX:
1752 ret = vfio_msix_setup(vdev, pos);
1753 break;
1754 case PCI_CAP_ID_PM:
1755 vfio_check_pm_reset(vdev, pos);
1756 vdev->pm_cap = pos;
1757 ret = pci_add_capability(pdev, cap_id, pos, size);
1758 break;
1759 case PCI_CAP_ID_AF:
1760 vfio_check_af_flr(vdev, pos);
1761 ret = pci_add_capability(pdev, cap_id, pos, size);
1762 break;
1763 default:
1764 ret = pci_add_capability(pdev, cap_id, pos, size);
1765 break;
1766 }
1767
1768 if (ret < 0) {
1769 error_report("vfio: %s Error adding PCI capability "
1770 "0x%x[0x%x]@0x%x: %d", vdev->vbasedev.name,
1771 cap_id, size, pos, ret);
1772 return ret;
1773 }
1774
1775 return 0;
1776}
1777
1778static int vfio_add_capabilities(VFIOPCIDevice *vdev)
1779{
1780 PCIDevice *pdev = &vdev->pdev;
1781
1782 if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) ||
1783 !pdev->config[PCI_CAPABILITY_LIST]) {
1784 return 0;
1785 }
1786
1787 return vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST]);
1788}
1789
1790static void vfio_pci_pre_reset(VFIOPCIDevice *vdev)
1791{
1792 PCIDevice *pdev = &vdev->pdev;
1793 uint16_t cmd;
1794
1795 vfio_disable_interrupts(vdev);
1796
1797
1798 if (vdev->pm_cap) {
1799 uint16_t pmcsr;
1800 uint8_t state;
1801
1802 pmcsr = vfio_pci_read_config(pdev, vdev->pm_cap + PCI_PM_CTRL, 2);
1803 state = pmcsr & PCI_PM_CTRL_STATE_MASK;
1804 if (state) {
1805 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
1806 vfio_pci_write_config(pdev, vdev->pm_cap + PCI_PM_CTRL, pmcsr, 2);
1807
1808 pmcsr = vfio_pci_read_config(pdev, vdev->pm_cap + PCI_PM_CTRL, 2);
1809 state = pmcsr & PCI_PM_CTRL_STATE_MASK;
1810 if (state) {
1811 error_report("vfio: Unable to power on device, stuck in D%d",
1812 state);
1813 }
1814 }
1815 }
1816
1817
1818
1819
1820
1821 cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2);
1822 cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
1823 PCI_COMMAND_INTX_DISABLE);
1824 vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2);
1825}
1826
1827static void vfio_pci_post_reset(VFIOPCIDevice *vdev)
1828{
1829 vfio_intx_enable(vdev);
1830}
1831
1832static bool vfio_pci_host_match(PCIHostDeviceAddress *addr, const char *name)
1833{
1834 char tmp[13];
1835
1836 sprintf(tmp, "%04x:%02x:%02x.%1x", addr->domain,
1837 addr->bus, addr->slot, addr->function);
1838
1839 return (strcmp(tmp, name) == 0);
1840}
1841
1842static int vfio_pci_hot_reset(VFIOPCIDevice *vdev, bool single)
1843{
1844 VFIOGroup *group;
1845 struct vfio_pci_hot_reset_info *info;
1846 struct vfio_pci_dependent_device *devices;
1847 struct vfio_pci_hot_reset *reset;
1848 int32_t *fds;
1849 int ret, i, count;
1850 bool multi = false;
1851
1852 trace_vfio_pci_hot_reset(vdev->vbasedev.name, single ? "one" : "multi");
1853
1854 vfio_pci_pre_reset(vdev);
1855 vdev->vbasedev.needs_reset = false;
1856
1857 info = g_malloc0(sizeof(*info));
1858 info->argsz = sizeof(*info);
1859
1860 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO, info);
1861 if (ret && errno != ENOSPC) {
1862 ret = -errno;
1863 if (!vdev->has_pm_reset) {
1864 error_report("vfio: Cannot reset device %s, "
1865 "no available reset mechanism.", vdev->vbasedev.name);
1866 }
1867 goto out_single;
1868 }
1869
1870 count = info->count;
1871 info = g_realloc(info, sizeof(*info) + (count * sizeof(*devices)));
1872 info->argsz = sizeof(*info) + (count * sizeof(*devices));
1873 devices = &info->devices[0];
1874
1875 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO, info);
1876 if (ret) {
1877 ret = -errno;
1878 error_report("vfio: hot reset info failed: %m");
1879 goto out_single;
1880 }
1881
1882 trace_vfio_pci_hot_reset_has_dep_devices(vdev->vbasedev.name);
1883
1884
1885 for (i = 0; i < info->count; i++) {
1886 PCIHostDeviceAddress host;
1887 VFIOPCIDevice *tmp;
1888 VFIODevice *vbasedev_iter;
1889
1890 host.domain = devices[i].segment;
1891 host.bus = devices[i].bus;
1892 host.slot = PCI_SLOT(devices[i].devfn);
1893 host.function = PCI_FUNC(devices[i].devfn);
1894
1895 trace_vfio_pci_hot_reset_dep_devices(host.domain,
1896 host.bus, host.slot, host.function, devices[i].group_id);
1897
1898 if (vfio_pci_host_match(&host, vdev->vbasedev.name)) {
1899 continue;
1900 }
1901
1902 QLIST_FOREACH(group, &vfio_group_list, next) {
1903 if (group->groupid == devices[i].group_id) {
1904 break;
1905 }
1906 }
1907
1908 if (!group) {
1909 if (!vdev->has_pm_reset) {
1910 error_report("vfio: Cannot reset device %s, "
1911 "depends on group %d which is not owned.",
1912 vdev->vbasedev.name, devices[i].group_id);
1913 }
1914 ret = -EPERM;
1915 goto out;
1916 }
1917
1918
1919 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
1920 if (vbasedev_iter->type != VFIO_DEVICE_TYPE_PCI) {
1921 continue;
1922 }
1923 tmp = container_of(vbasedev_iter, VFIOPCIDevice, vbasedev);
1924 if (vfio_pci_host_match(&host, tmp->vbasedev.name)) {
1925 if (single) {
1926 ret = -EINVAL;
1927 goto out_single;
1928 }
1929 vfio_pci_pre_reset(tmp);
1930 tmp->vbasedev.needs_reset = false;
1931 multi = true;
1932 break;
1933 }
1934 }
1935 }
1936
1937 if (!single && !multi) {
1938 ret = -EINVAL;
1939 goto out_single;
1940 }
1941
1942
1943 count = 0;
1944 QLIST_FOREACH(group, &vfio_group_list, next) {
1945 for (i = 0; i < info->count; i++) {
1946 if (group->groupid == devices[i].group_id) {
1947 count++;
1948 break;
1949 }
1950 }
1951 }
1952
1953 reset = g_malloc0(sizeof(*reset) + (count * sizeof(*fds)));
1954 reset->argsz = sizeof(*reset) + (count * sizeof(*fds));
1955 fds = &reset->group_fds[0];
1956
1957
1958 QLIST_FOREACH(group, &vfio_group_list, next) {
1959 for (i = 0; i < info->count; i++) {
1960 if (group->groupid == devices[i].group_id) {
1961 fds[reset->count++] = group->fd;
1962 break;
1963 }
1964 }
1965 }
1966
1967
1968 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_PCI_HOT_RESET, reset);
1969 g_free(reset);
1970
1971 trace_vfio_pci_hot_reset_result(vdev->vbasedev.name,
1972 ret ? "%m" : "Success");
1973
1974out:
1975
1976 for (i = 0; i < info->count; i++) {
1977 PCIHostDeviceAddress host;
1978 VFIOPCIDevice *tmp;
1979 VFIODevice *vbasedev_iter;
1980
1981 host.domain = devices[i].segment;
1982 host.bus = devices[i].bus;
1983 host.slot = PCI_SLOT(devices[i].devfn);
1984 host.function = PCI_FUNC(devices[i].devfn);
1985
1986 if (vfio_pci_host_match(&host, vdev->vbasedev.name)) {
1987 continue;
1988 }
1989
1990 QLIST_FOREACH(group, &vfio_group_list, next) {
1991 if (group->groupid == devices[i].group_id) {
1992 break;
1993 }
1994 }
1995
1996 if (!group) {
1997 break;
1998 }
1999
2000 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
2001 if (vbasedev_iter->type != VFIO_DEVICE_TYPE_PCI) {
2002 continue;
2003 }
2004 tmp = container_of(vbasedev_iter, VFIOPCIDevice, vbasedev);
2005 if (vfio_pci_host_match(&host, tmp->vbasedev.name)) {
2006 vfio_pci_post_reset(tmp);
2007 break;
2008 }
2009 }
2010 }
2011out_single:
2012 vfio_pci_post_reset(vdev);
2013 g_free(info);
2014
2015 return ret;
2016}
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033static int vfio_pci_hot_reset_one(VFIOPCIDevice *vdev)
2034{
2035 return vfio_pci_hot_reset(vdev, true);
2036}
2037
2038static int vfio_pci_hot_reset_multi(VFIODevice *vbasedev)
2039{
2040 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev);
2041 return vfio_pci_hot_reset(vdev, false);
2042}
2043
2044static void vfio_pci_compute_needs_reset(VFIODevice *vbasedev)
2045{
2046 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev);
2047 if (!vbasedev->reset_works || (!vdev->has_flr && vdev->has_pm_reset)) {
2048 vbasedev->needs_reset = true;
2049 }
2050}
2051
2052static VFIODeviceOps vfio_pci_ops = {
2053 .vfio_compute_needs_reset = vfio_pci_compute_needs_reset,
2054 .vfio_hot_reset_multi = vfio_pci_hot_reset_multi,
2055 .vfio_eoi = vfio_intx_eoi,
2056};
2057
2058int vfio_populate_vga(VFIOPCIDevice *vdev)
2059{
2060 VFIODevice *vbasedev = &vdev->vbasedev;
2061 struct vfio_region_info *reg_info;
2062 int ret;
2063
2064 if (vbasedev->num_regions > VFIO_PCI_VGA_REGION_INDEX) {
2065 ret = vfio_get_region_info(vbasedev,
2066 VFIO_PCI_VGA_REGION_INDEX, ®_info);
2067 if (ret) {
2068 return ret;
2069 }
2070
2071 if (!(reg_info->flags & VFIO_REGION_INFO_FLAG_READ) ||
2072 !(reg_info->flags & VFIO_REGION_INFO_FLAG_WRITE) ||
2073 reg_info->size < 0xbffff + 1) {
2074 error_report("vfio: Unexpected VGA info, flags 0x%lx, size 0x%lx",
2075 (unsigned long)reg_info->flags,
2076 (unsigned long)reg_info->size);
2077 g_free(reg_info);
2078 return -EINVAL;
2079 }
2080
2081 vdev->vga = g_new0(VFIOVGA, 1);
2082
2083 vdev->vga->fd_offset = reg_info->offset;
2084 vdev->vga->fd = vdev->vbasedev.fd;
2085
2086 g_free(reg_info);
2087
2088 vdev->vga->region[QEMU_PCI_VGA_MEM].offset = QEMU_PCI_VGA_MEM_BASE;
2089 vdev->vga->region[QEMU_PCI_VGA_MEM].nr = QEMU_PCI_VGA_MEM;
2090 QLIST_INIT(&vdev->vga->region[QEMU_PCI_VGA_MEM].quirks);
2091
2092 vdev->vga->region[QEMU_PCI_VGA_IO_LO].offset = QEMU_PCI_VGA_IO_LO_BASE;
2093 vdev->vga->region[QEMU_PCI_VGA_IO_LO].nr = QEMU_PCI_VGA_IO_LO;
2094 QLIST_INIT(&vdev->vga->region[QEMU_PCI_VGA_IO_LO].quirks);
2095
2096 vdev->vga->region[QEMU_PCI_VGA_IO_HI].offset = QEMU_PCI_VGA_IO_HI_BASE;
2097 vdev->vga->region[QEMU_PCI_VGA_IO_HI].nr = QEMU_PCI_VGA_IO_HI;
2098 QLIST_INIT(&vdev->vga->region[QEMU_PCI_VGA_IO_HI].quirks);
2099 }
2100
2101 return 0;
2102}
2103
2104static int vfio_populate_device(VFIOPCIDevice *vdev)
2105{
2106 VFIODevice *vbasedev = &vdev->vbasedev;
2107 struct vfio_region_info *reg_info;
2108 struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info) };
2109 int i, ret = -1;
2110
2111
2112 if (!(vbasedev->flags & VFIO_DEVICE_FLAGS_PCI)) {
2113 error_report("vfio: Um, this isn't a PCI device");
2114 goto error;
2115 }
2116
2117 if (vbasedev->num_regions < VFIO_PCI_CONFIG_REGION_INDEX + 1) {
2118 error_report("vfio: unexpected number of io regions %u",
2119 vbasedev->num_regions);
2120 goto error;
2121 }
2122
2123 if (vbasedev->num_irqs < VFIO_PCI_MSIX_IRQ_INDEX + 1) {
2124 error_report("vfio: unexpected number of irqs %u", vbasedev->num_irqs);
2125 goto error;
2126 }
2127
2128 for (i = VFIO_PCI_BAR0_REGION_INDEX; i < VFIO_PCI_ROM_REGION_INDEX; i++) {
2129 char *name = g_strdup_printf("%s BAR %d", vbasedev->name, i);
2130
2131 ret = vfio_region_setup(OBJECT(vdev), vbasedev,
2132 &vdev->bars[i].region, i, name);
2133 g_free(name);
2134
2135 if (ret) {
2136 error_report("vfio: Error getting region %d info: %m", i);
2137 goto error;
2138 }
2139
2140 QLIST_INIT(&vdev->bars[i].quirks);
2141 }
2142
2143 ret = vfio_get_region_info(vbasedev,
2144 VFIO_PCI_CONFIG_REGION_INDEX, ®_info);
2145 if (ret) {
2146 error_report("vfio: Error getting config info: %m");
2147 goto error;
2148 }
2149
2150 trace_vfio_populate_device_config(vdev->vbasedev.name,
2151 (unsigned long)reg_info->size,
2152 (unsigned long)reg_info->offset,
2153 (unsigned long)reg_info->flags);
2154
2155 vdev->config_size = reg_info->size;
2156 if (vdev->config_size == PCI_CONFIG_SPACE_SIZE) {
2157 vdev->pdev.cap_present &= ~QEMU_PCI_CAP_EXPRESS;
2158 }
2159 vdev->config_offset = reg_info->offset;
2160
2161 g_free(reg_info);
2162
2163 if (vdev->features & VFIO_FEATURE_ENABLE_VGA) {
2164 ret = vfio_populate_vga(vdev);
2165 if (ret) {
2166 error_report(
2167 "vfio: Device does not support requested feature x-vga");
2168 goto error;
2169 }
2170 }
2171
2172 irq_info.index = VFIO_PCI_ERR_IRQ_INDEX;
2173
2174 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_IRQ_INFO, &irq_info);
2175 if (ret) {
2176
2177 trace_vfio_populate_device_get_irq_info_failure();
2178 ret = 0;
2179 } else if (irq_info.count == 1) {
2180 vdev->pci_aer = true;
2181 } else {
2182 error_report("vfio: %s "
2183 "Could not enable error recovery for the device",
2184 vbasedev->name);
2185 }
2186
2187error:
2188 return ret;
2189}
2190
2191static void vfio_put_device(VFIOPCIDevice *vdev)
2192{
2193 g_free(vdev->vbasedev.name);
2194 g_free(vdev->msix);
2195
2196 vfio_put_base_device(&vdev->vbasedev);
2197}
2198
2199static void vfio_err_notifier_handler(void *opaque)
2200{
2201 VFIOPCIDevice *vdev = opaque;
2202
2203 if (!event_notifier_test_and_clear(&vdev->err_notifier)) {
2204 return;
2205 }
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216 error_report("%s(%s) Unrecoverable error detected. Please collect any data possible and then kill the guest", __func__, vdev->vbasedev.name);
2217
2218 vm_stop(RUN_STATE_INTERNAL_ERROR);
2219}
2220
2221
2222
2223
2224
2225
2226
2227static void vfio_register_err_notifier(VFIOPCIDevice *vdev)
2228{
2229 int ret;
2230 int argsz;
2231 struct vfio_irq_set *irq_set;
2232 int32_t *pfd;
2233
2234 if (!vdev->pci_aer) {
2235 return;
2236 }
2237
2238 if (event_notifier_init(&vdev->err_notifier, 0)) {
2239 error_report("vfio: Unable to init event notifier for error detection");
2240 vdev->pci_aer = false;
2241 return;
2242 }
2243
2244 argsz = sizeof(*irq_set) + sizeof(*pfd);
2245
2246 irq_set = g_malloc0(argsz);
2247 irq_set->argsz = argsz;
2248 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
2249 VFIO_IRQ_SET_ACTION_TRIGGER;
2250 irq_set->index = VFIO_PCI_ERR_IRQ_INDEX;
2251 irq_set->start = 0;
2252 irq_set->count = 1;
2253 pfd = (int32_t *)&irq_set->data;
2254
2255 *pfd = event_notifier_get_fd(&vdev->err_notifier);
2256 qemu_set_fd_handler(*pfd, vfio_err_notifier_handler, NULL, vdev);
2257
2258 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
2259 if (ret) {
2260 error_report("vfio: Failed to set up error notification");
2261 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
2262 event_notifier_cleanup(&vdev->err_notifier);
2263 vdev->pci_aer = false;
2264 }
2265 g_free(irq_set);
2266}
2267
2268static void vfio_unregister_err_notifier(VFIOPCIDevice *vdev)
2269{
2270 int argsz;
2271 struct vfio_irq_set *irq_set;
2272 int32_t *pfd;
2273 int ret;
2274
2275 if (!vdev->pci_aer) {
2276 return;
2277 }
2278
2279 argsz = sizeof(*irq_set) + sizeof(*pfd);
2280
2281 irq_set = g_malloc0(argsz);
2282 irq_set->argsz = argsz;
2283 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
2284 VFIO_IRQ_SET_ACTION_TRIGGER;
2285 irq_set->index = VFIO_PCI_ERR_IRQ_INDEX;
2286 irq_set->start = 0;
2287 irq_set->count = 1;
2288 pfd = (int32_t *)&irq_set->data;
2289 *pfd = -1;
2290
2291 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
2292 if (ret) {
2293 error_report("vfio: Failed to de-assign error fd: %m");
2294 }
2295 g_free(irq_set);
2296 qemu_set_fd_handler(event_notifier_get_fd(&vdev->err_notifier),
2297 NULL, NULL, vdev);
2298 event_notifier_cleanup(&vdev->err_notifier);
2299}
2300
2301static void vfio_req_notifier_handler(void *opaque)
2302{
2303 VFIOPCIDevice *vdev = opaque;
2304
2305 if (!event_notifier_test_and_clear(&vdev->req_notifier)) {
2306 return;
2307 }
2308
2309 qdev_unplug(&vdev->pdev.qdev, NULL);
2310}
2311
2312static void vfio_register_req_notifier(VFIOPCIDevice *vdev)
2313{
2314 struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info),
2315 .index = VFIO_PCI_REQ_IRQ_INDEX };
2316 int argsz;
2317 struct vfio_irq_set *irq_set;
2318 int32_t *pfd;
2319
2320 if (!(vdev->features & VFIO_FEATURE_ENABLE_REQ)) {
2321 return;
2322 }
2323
2324 if (ioctl(vdev->vbasedev.fd,
2325 VFIO_DEVICE_GET_IRQ_INFO, &irq_info) < 0 || irq_info.count < 1) {
2326 return;
2327 }
2328
2329 if (event_notifier_init(&vdev->req_notifier, 0)) {
2330 error_report("vfio: Unable to init event notifier for device request");
2331 return;
2332 }
2333
2334 argsz = sizeof(*irq_set) + sizeof(*pfd);
2335
2336 irq_set = g_malloc0(argsz);
2337 irq_set->argsz = argsz;
2338 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
2339 VFIO_IRQ_SET_ACTION_TRIGGER;
2340 irq_set->index = VFIO_PCI_REQ_IRQ_INDEX;
2341 irq_set->start = 0;
2342 irq_set->count = 1;
2343 pfd = (int32_t *)&irq_set->data;
2344
2345 *pfd = event_notifier_get_fd(&vdev->req_notifier);
2346 qemu_set_fd_handler(*pfd, vfio_req_notifier_handler, NULL, vdev);
2347
2348 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) {
2349 error_report("vfio: Failed to set up device request notification");
2350 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
2351 event_notifier_cleanup(&vdev->req_notifier);
2352 } else {
2353 vdev->req_enabled = true;
2354 }
2355
2356 g_free(irq_set);
2357}
2358
2359static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev)
2360{
2361 int argsz;
2362 struct vfio_irq_set *irq_set;
2363 int32_t *pfd;
2364
2365 if (!vdev->req_enabled) {
2366 return;
2367 }
2368
2369 argsz = sizeof(*irq_set) + sizeof(*pfd);
2370
2371 irq_set = g_malloc0(argsz);
2372 irq_set->argsz = argsz;
2373 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
2374 VFIO_IRQ_SET_ACTION_TRIGGER;
2375 irq_set->index = VFIO_PCI_REQ_IRQ_INDEX;
2376 irq_set->start = 0;
2377 irq_set->count = 1;
2378 pfd = (int32_t *)&irq_set->data;
2379 *pfd = -1;
2380
2381 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) {
2382 error_report("vfio: Failed to de-assign device request fd: %m");
2383 }
2384 g_free(irq_set);
2385 qemu_set_fd_handler(event_notifier_get_fd(&vdev->req_notifier),
2386 NULL, NULL, vdev);
2387 event_notifier_cleanup(&vdev->req_notifier);
2388
2389 vdev->req_enabled = false;
2390}
2391
2392static int vfio_initfn(PCIDevice *pdev)
2393{
2394 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
2395 VFIODevice *vbasedev_iter;
2396 VFIOGroup *group;
2397 char *tmp, group_path[PATH_MAX], *group_name;
2398 ssize_t len;
2399 struct stat st;
2400 int groupid;
2401 int ret;
2402
2403 if (!vdev->vbasedev.sysfsdev) {
2404 vdev->vbasedev.sysfsdev =
2405 g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%01x",
2406 vdev->host.domain, vdev->host.bus,
2407 vdev->host.slot, vdev->host.function);
2408 }
2409
2410 if (stat(vdev->vbasedev.sysfsdev, &st) < 0) {
2411 error_report("vfio: error: no such host device: %s",
2412 vdev->vbasedev.sysfsdev);
2413 return -errno;
2414 }
2415
2416 vdev->vbasedev.name = g_strdup(basename(vdev->vbasedev.sysfsdev));
2417 vdev->vbasedev.ops = &vfio_pci_ops;
2418 vdev->vbasedev.type = VFIO_DEVICE_TYPE_PCI;
2419
2420 tmp = g_strdup_printf("%s/iommu_group", vdev->vbasedev.sysfsdev);
2421 len = readlink(tmp, group_path, sizeof(group_path));
2422 g_free(tmp);
2423
2424 if (len <= 0 || len >= sizeof(group_path)) {
2425 error_report("vfio: error no iommu_group for device");
2426 return len < 0 ? -errno : -ENAMETOOLONG;
2427 }
2428
2429 group_path[len] = 0;
2430
2431 group_name = basename(group_path);
2432 if (sscanf(group_name, "%d", &groupid) != 1) {
2433 error_report("vfio: error reading %s: %m", group_path);
2434 return -errno;
2435 }
2436
2437 trace_vfio_initfn(vdev->vbasedev.name, groupid);
2438
2439 group = vfio_get_group(groupid, pci_device_iommu_address_space(pdev));
2440 if (!group) {
2441 error_report("vfio: failed to get group %d", groupid);
2442 return -ENOENT;
2443 }
2444
2445 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
2446 if (strcmp(vbasedev_iter->name, vdev->vbasedev.name) == 0) {
2447 error_report("vfio: error: device %s is already attached",
2448 vdev->vbasedev.name);
2449 vfio_put_group(group);
2450 return -EBUSY;
2451 }
2452 }
2453
2454 ret = vfio_get_device(group, vdev->vbasedev.name, &vdev->vbasedev);
2455 if (ret) {
2456 error_report("vfio: failed to get device %s", vdev->vbasedev.name);
2457 vfio_put_group(group);
2458 return ret;
2459 }
2460
2461 ret = vfio_populate_device(vdev);
2462 if (ret) {
2463 return ret;
2464 }
2465
2466
2467 ret = pread(vdev->vbasedev.fd, vdev->pdev.config,
2468 MIN(pci_config_size(&vdev->pdev), vdev->config_size),
2469 vdev->config_offset);
2470 if (ret < (int)MIN(pci_config_size(&vdev->pdev), vdev->config_size)) {
2471 ret = ret < 0 ? -errno : -EFAULT;
2472 error_report("vfio: Failed to read device config space");
2473 return ret;
2474 }
2475
2476
2477 vdev->emulated_config_bits = g_malloc0(vdev->config_size);
2478
2479
2480 memset(vdev->emulated_config_bits + PCI_ROM_ADDRESS, 0xff, 4);
2481
2482
2483
2484
2485
2486
2487 if (vdev->vendor_id != PCI_ANY_ID) {
2488 if (vdev->vendor_id >= 0xffff) {
2489 error_report("vfio: Invalid PCI vendor ID provided");
2490 return -EINVAL;
2491 }
2492 vfio_add_emulated_word(vdev, PCI_VENDOR_ID, vdev->vendor_id, ~0);
2493 trace_vfio_pci_emulated_vendor_id(vdev->vbasedev.name, vdev->vendor_id);
2494 } else {
2495 vdev->vendor_id = pci_get_word(pdev->config + PCI_VENDOR_ID);
2496 }
2497
2498 if (vdev->device_id != PCI_ANY_ID) {
2499 if (vdev->device_id > 0xffff) {
2500 error_report("vfio: Invalid PCI device ID provided");
2501 return -EINVAL;
2502 }
2503 vfio_add_emulated_word(vdev, PCI_DEVICE_ID, vdev->device_id, ~0);
2504 trace_vfio_pci_emulated_device_id(vdev->vbasedev.name, vdev->device_id);
2505 } else {
2506 vdev->device_id = pci_get_word(pdev->config + PCI_DEVICE_ID);
2507 }
2508
2509 if (vdev->sub_vendor_id != PCI_ANY_ID) {
2510 if (vdev->sub_vendor_id > 0xffff) {
2511 error_report("vfio: Invalid PCI subsystem vendor ID provided");
2512 return -EINVAL;
2513 }
2514 vfio_add_emulated_word(vdev, PCI_SUBSYSTEM_VENDOR_ID,
2515 vdev->sub_vendor_id, ~0);
2516 trace_vfio_pci_emulated_sub_vendor_id(vdev->vbasedev.name,
2517 vdev->sub_vendor_id);
2518 }
2519
2520 if (vdev->sub_device_id != PCI_ANY_ID) {
2521 if (vdev->sub_device_id > 0xffff) {
2522 error_report("vfio: Invalid PCI subsystem device ID provided");
2523 return -EINVAL;
2524 }
2525 vfio_add_emulated_word(vdev, PCI_SUBSYSTEM_ID, vdev->sub_device_id, ~0);
2526 trace_vfio_pci_emulated_sub_device_id(vdev->vbasedev.name,
2527 vdev->sub_device_id);
2528 }
2529
2530
2531 vdev->emulated_config_bits[PCI_HEADER_TYPE] =
2532 PCI_HEADER_TYPE_MULTI_FUNCTION;
2533
2534
2535 if (vdev->pdev.cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
2536 vdev->pdev.config[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION;
2537 } else {
2538 vdev->pdev.config[PCI_HEADER_TYPE] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION;
2539 }
2540
2541
2542
2543
2544
2545
2546 memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24);
2547 memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4);
2548
2549 vfio_pci_size_rom(vdev);
2550
2551 ret = vfio_msix_early_setup(vdev);
2552 if (ret) {
2553 return ret;
2554 }
2555
2556 vfio_bars_setup(vdev);
2557
2558 ret = vfio_add_capabilities(vdev);
2559 if (ret) {
2560 goto out_teardown;
2561 }
2562
2563
2564 if (pdev->cap_present & QEMU_PCI_CAP_MSIX) {
2565 memset(vdev->emulated_config_bits + pdev->msix_cap, 0xff,
2566 MSIX_CAP_LENGTH);
2567 }
2568
2569 if (pdev->cap_present & QEMU_PCI_CAP_MSI) {
2570 memset(vdev->emulated_config_bits + pdev->msi_cap, 0xff,
2571 vdev->msi_cap_size);
2572 }
2573
2574 if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) {
2575 vdev->intx.mmap_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL,
2576 vfio_intx_mmap_enable, vdev);
2577 pci_device_set_intx_routing_notifier(&vdev->pdev, vfio_intx_update);
2578 ret = vfio_intx_enable(vdev);
2579 if (ret) {
2580 goto out_teardown;
2581 }
2582 }
2583
2584 vfio_register_err_notifier(vdev);
2585 vfio_register_req_notifier(vdev);
2586 vfio_setup_resetfn_quirk(vdev);
2587
2588 return 0;
2589
2590out_teardown:
2591 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
2592 vfio_teardown_msi(vdev);
2593 vfio_bars_exit(vdev);
2594 return ret;
2595}
2596
2597static void vfio_instance_finalize(Object *obj)
2598{
2599 PCIDevice *pci_dev = PCI_DEVICE(obj);
2600 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pci_dev);
2601 VFIOGroup *group = vdev->vbasedev.group;
2602
2603 vfio_bars_finalize(vdev);
2604 g_free(vdev->emulated_config_bits);
2605 g_free(vdev->rom);
2606 vfio_put_device(vdev);
2607 vfio_put_group(group);
2608}
2609
2610static void vfio_exitfn(PCIDevice *pdev)
2611{
2612 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
2613
2614 vfio_unregister_req_notifier(vdev);
2615 vfio_unregister_err_notifier(vdev);
2616 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
2617 vfio_disable_interrupts(vdev);
2618 if (vdev->intx.mmap_timer) {
2619 timer_free(vdev->intx.mmap_timer);
2620 }
2621 vfio_teardown_msi(vdev);
2622 vfio_bars_exit(vdev);
2623}
2624
2625static void vfio_pci_reset(DeviceState *dev)
2626{
2627 PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev);
2628 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev);
2629
2630 trace_vfio_pci_reset(vdev->vbasedev.name);
2631
2632 vfio_pci_pre_reset(vdev);
2633
2634 if (vdev->resetfn && !vdev->resetfn(vdev)) {
2635 goto post_reset;
2636 }
2637
2638 if (vdev->vbasedev.reset_works &&
2639 (vdev->has_flr || !vdev->has_pm_reset) &&
2640 !ioctl(vdev->vbasedev.fd, VFIO_DEVICE_RESET)) {
2641 trace_vfio_pci_reset_flr(vdev->vbasedev.name);
2642 goto post_reset;
2643 }
2644
2645
2646 if (!vfio_pci_hot_reset_one(vdev)) {
2647 goto post_reset;
2648 }
2649
2650
2651 if (vdev->vbasedev.reset_works && vdev->has_pm_reset &&
2652 !ioctl(vdev->vbasedev.fd, VFIO_DEVICE_RESET)) {
2653 trace_vfio_pci_reset_pm(vdev->vbasedev.name);
2654 goto post_reset;
2655 }
2656
2657post_reset:
2658 vfio_pci_post_reset(vdev);
2659}
2660
2661static void vfio_instance_init(Object *obj)
2662{
2663 PCIDevice *pci_dev = PCI_DEVICE(obj);
2664 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, PCI_DEVICE(obj));
2665
2666 device_add_bootindex_property(obj, &vdev->bootindex,
2667 "bootindex", NULL,
2668 &pci_dev->qdev, NULL);
2669}
2670
2671static Property vfio_pci_dev_properties[] = {
2672 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host),
2673 DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice, vbasedev.sysfsdev),
2674 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice,
2675 intx.mmap_timeout, 1100),
2676 DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features,
2677 VFIO_FEATURE_ENABLE_VGA_BIT, false),
2678 DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features,
2679 VFIO_FEATURE_ENABLE_REQ_BIT, true),
2680 DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice, vbasedev.no_mmap, false),
2681 DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice, no_kvm_intx, false),
2682 DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice, no_kvm_msi, false),
2683 DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice, no_kvm_msix, false),
2684 DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice, vendor_id, PCI_ANY_ID),
2685 DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice, device_id, PCI_ANY_ID),
2686 DEFINE_PROP_UINT32("x-pci-sub-vendor-id", VFIOPCIDevice,
2687 sub_vendor_id, PCI_ANY_ID),
2688 DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice,
2689 sub_device_id, PCI_ANY_ID),
2690
2691
2692
2693
2694
2695 DEFINE_PROP_END_OF_LIST(),
2696};
2697
2698static const VMStateDescription vfio_pci_vmstate = {
2699 .name = "vfio-pci",
2700 .unmigratable = 1,
2701};
2702
2703static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
2704{
2705 DeviceClass *dc = DEVICE_CLASS(klass);
2706 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
2707
2708 dc->reset = vfio_pci_reset;
2709 dc->props = vfio_pci_dev_properties;
2710 dc->vmsd = &vfio_pci_vmstate;
2711 dc->desc = "VFIO-based PCI device assignment";
2712 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
2713 pdc->init = vfio_initfn;
2714 pdc->exit = vfio_exitfn;
2715 pdc->config_read = vfio_pci_read_config;
2716 pdc->config_write = vfio_pci_write_config;
2717 pdc->is_express = 1;
2718}
2719
2720static const TypeInfo vfio_pci_dev_info = {
2721 .name = "vfio-pci",
2722 .parent = TYPE_PCI_DEVICE,
2723 .instance_size = sizeof(VFIOPCIDevice),
2724 .class_init = vfio_pci_dev_class_init,
2725 .instance_init = vfio_instance_init,
2726 .instance_finalize = vfio_instance_finalize,
2727};
2728
2729static void register_vfio_pci_dev_type(void)
2730{
2731 type_register_static(&vfio_pci_dev_info);
2732}
2733
2734type_init(register_vfio_pci_dev_type)
2735