LXR qemu/include/hw/acpi/acpi.h

   1#ifndef QEMU_HW_ACPI_H
   2#define QEMU_HW_ACPI_H
   3/*
   4 *  Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   5 *                     VA Linux Systems Japan K.K.
   6 *
   7 * This library is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU Lesser General Public
   9 * License as published by the Free Software Foundation; either
  10 * version 2 of the License, or (at your option) any later version.
  11 *
  12 * This library is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * Lesser General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU Lesser General Public
  18 * License along with this library; if not, see
  19 * <http://www.gnu.org/licenses/>.
  20 */
  21
  22#include "qemu/notify.h"
  23#include "qemu/option.h"
  24#include "exec/memory.h"
  25#include "hw/irq.h"
  26
  27/*
  28 * current device naming scheme supports up to 256 memory devices
  29 */
  30#define ACPI_MAX_RAM_SLOTS 256
  31
  32/* from linux include/acpi/actype.h */
  33/* Default ACPI register widths */
  34
  35#define ACPI_GPE_REGISTER_WIDTH         8
  36#define ACPI_PM1_REGISTER_WIDTH         16
  37#define ACPI_PM2_REGISTER_WIDTH         8
  38#define ACPI_PM_TIMER_WIDTH             32
  39
  40/* PM Timer ticks per second (HZ) */
  41#define PM_TIMER_FREQUENCY  3579545
  42
  43
  44/* ACPI fixed hardware registers */
  45
  46/* from linux/drivers/acpi/acpica/aclocal.h */
  47/* Masks used to access the bit_registers */
  48
  49/* PM1x_STS */
  50#define ACPI_BITMASK_TIMER_STATUS               0x0001
  51#define ACPI_BITMASK_BUS_MASTER_STATUS          0x0010
  52#define ACPI_BITMASK_GLOBAL_LOCK_STATUS         0x0020
  53#define ACPI_BITMASK_POWER_BUTTON_STATUS        0x0100
  54#define ACPI_BITMASK_SLEEP_BUTTON_STATUS        0x0200
  55#define ACPI_BITMASK_RT_CLOCK_STATUS            0x0400
  56#define ACPI_BITMASK_PCIEXP_WAKE_STATUS         0x4000  /* ACPI 3.0 */
  57#define ACPI_BITMASK_WAKE_STATUS                0x8000
  58
  59#define ACPI_BITMASK_ALL_FIXED_STATUS           (\
  60        ACPI_BITMASK_TIMER_STATUS          | \
  61        ACPI_BITMASK_BUS_MASTER_STATUS     | \
  62        ACPI_BITMASK_GLOBAL_LOCK_STATUS    | \
  63        ACPI_BITMASK_POWER_BUTTON_STATUS   | \
  64        ACPI_BITMASK_SLEEP_BUTTON_STATUS   | \
  65        ACPI_BITMASK_RT_CLOCK_STATUS       | \
  66        ACPI_BITMASK_WAKE_STATUS)
  67
  68/* PM1x_EN */
  69#define ACPI_BITMASK_TIMER_ENABLE               0x0001
  70#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE         0x0020
  71#define ACPI_BITMASK_POWER_BUTTON_ENABLE        0x0100
  72#define ACPI_BITMASK_SLEEP_BUTTON_ENABLE        0x0200
  73#define ACPI_BITMASK_RT_CLOCK_ENABLE            0x0400
  74#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE        0x4000  /* ACPI 3.0 */
  75
  76#define ACPI_BITMASK_PM1_COMMON_ENABLED         ( \
  77        ACPI_BITMASK_RT_CLOCK_ENABLE        | \
  78        ACPI_BITMASK_POWER_BUTTON_ENABLE    | \
  79        ACPI_BITMASK_GLOBAL_LOCK_ENABLE     | \
  80        ACPI_BITMASK_TIMER_ENABLE)
  81
  82/* PM1x_CNT */
  83#define ACPI_BITMASK_SCI_ENABLE                 0x0001
  84#define ACPI_BITMASK_BUS_MASTER_RLD             0x0002
  85#define ACPI_BITMASK_GLOBAL_LOCK_RELEASE        0x0004
  86#define ACPI_BITMASK_SLEEP_TYPE                 0x1C00
  87#define ACPI_BITMASK_SLEEP_ENABLE               0x2000
  88
  89/* PM2_CNT */
  90#define ACPI_BITMASK_ARB_DISABLE                0x0001
  91
  92/* These values are part of guest ABI, and can not be changed */
  93typedef enum {
  94    ACPI_PCI_HOTPLUG_STATUS = 2,
  95    ACPI_CPU_HOTPLUG_STATUS = 4,
  96    ACPI_MEMORY_HOTPLUG_STATUS = 8,
  97} AcpiGPEStatusBits;
  98
  99/* structs */
 100typedef struct ACPIPMTimer ACPIPMTimer;
 101typedef struct ACPIPM1EVT ACPIPM1EVT;
 102typedef struct ACPIPM1CNT ACPIPM1CNT;
 103typedef struct ACPIGPE ACPIGPE;
 104typedef struct ACPIREGS ACPIREGS;
 105
 106typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
 107
 108struct ACPIPMTimer {
 109    QEMUTimer *timer;
 110    MemoryRegion io;
 111    int64_t overflow_time;
 112
 113    acpi_update_sci_fn update_sci;
 114};
 115
 116struct ACPIPM1EVT {
 117    MemoryRegion io;
 118    uint16_t sts;
 119    uint16_t en;
 120    acpi_update_sci_fn update_sci;
 121};
 122
 123struct ACPIPM1CNT {
 124    MemoryRegion io;
 125    uint16_t cnt;
 126    uint8_t s4_val;
 127};
 128
 129struct ACPIGPE {
 130    uint8_t len;
 131
 132    uint8_t *sts;
 133    uint8_t *en;
 134};
 135
 136struct ACPIREGS {
 137    ACPIPMTimer     tmr;
 138    ACPIGPE         gpe;
 139    struct {
 140        ACPIPM1EVT  evt;
 141        ACPIPM1CNT  cnt;
 142    } pm1;
 143    Notifier wakeup;
 144};
 145
 146/* PM_TMR */
 147void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
 148void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
 149void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
 150                      MemoryRegion *parent);
 151void acpi_pm_tmr_reset(ACPIREGS *ar);
 152
 153#include "qemu/timer.h"
 154static inline int64_t acpi_pm_tmr_get_clock(void)
 155{
 156    return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY,
 157                    NANOSECONDS_PER_SECOND);
 158}
 159
 160/* PM1a_EVT: piix and ich9 don't implement PM1b. */
 161uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
 162void acpi_pm1_evt_power_down(ACPIREGS *ar);
 163void acpi_pm1_evt_reset(ACPIREGS *ar);
 164void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
 165                       MemoryRegion *parent);
 166
 167/* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
 168void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent,
 169                       bool disable_s3, bool disable_s4, uint8_t s4_val);
 170void acpi_pm1_cnt_update(ACPIREGS *ar,
 171                         bool sci_enable, bool sci_disable);
 172void acpi_pm1_cnt_reset(ACPIREGS *ar);
 173
 174/* GPE0 */
 175void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
 176void acpi_gpe_reset(ACPIREGS *ar);
 177
 178void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
 179uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
 180
 181void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
 182                         AcpiGPEStatusBits status);
 183
 184void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq);
 185
 186/* acpi.c */
 187extern int acpi_enabled;
 188extern char unsigned *acpi_tables;
 189extern size_t acpi_tables_len;
 190
 191uint8_t *acpi_table_first(void);
 192uint8_t *acpi_table_next(uint8_t *current);
 193unsigned acpi_table_len(void *current);
 194void acpi_table_add(const QemuOpts *opts, Error **errp);
 195void acpi_table_add_builtin(const QemuOpts *opts, Error **errp);
 196
 197typedef struct AcpiSlicOem AcpiSlicOem;
 198struct AcpiSlicOem {
 199  char *id;
 200  char *table_id;
 201};
 202int acpi_get_slic_oem(AcpiSlicOem *oem);
 203
 204#endif /* !QEMU_HW_ACPI_H */
 205