LXR qemu/include/hw/intc/aspeed

   1/*
   2 * ASPEED Interrupt Controller (New)
   3 *
   4 * Andrew Jeffery <andrew@aj.id.au>
   5 *
   6 * Copyright 2016 IBM Corp.
   7 *
   8 * This code is licensed under the GPL version 2 or later.  See
   9 * the COPYING file in the top-level directory.
  10 *
  11 * Need to add SVIC and CVIC support
  12 */
  13#ifndef ASPEED_VIC_H
  14#define ASPEED_VIC_H
  15
  16#include "hw/sysbus.h"
  17
  18#define TYPE_ASPEED_VIC "aspeed.vic"
  19#define ASPEED_VIC(obj) OBJECT_CHECK(AspeedVICState, (obj), TYPE_ASPEED_VIC)
  20
  21#define ASPEED_VIC_NR_IRQS 51
  22
  23typedef struct AspeedVICState {
  24    /*< private >*/
  25    SysBusDevice parent_obj;
  26
  27    /*< public >*/
  28    MemoryRegion iomem;
  29    qemu_irq irq;
  30    qemu_irq fiq;
  31
  32    uint64_t level;
  33    uint64_t raw;
  34    uint64_t select;
  35    uint64_t enable;
  36    uint64_t trigger;
  37
  38    /* 0=edge, 1=level */
  39    uint64_t sense;
  40
  41    /* 0=single-edge, 1=dual-edge */
  42    uint64_t dual_edge;
  43
  44    /* 0=low-sensitive/falling-edge, 1=high-sensitive/rising-edge */
  45    uint64_t event;
  46} AspeedVICState;
  47
  48#endif /* ASPEED_VIC_H */
  49