LXR qemu/include/hw/virtio/virtio-gpu.h

   1/*
   2 * Virtio GPU Device
   3 *
   4 * Copyright Red Hat, Inc. 2013-2014
   5 *
   6 * Authors:
   7 *     Dave Airlie <airlied@redhat.com>
   8 *     Gerd Hoffmann <kraxel@redhat.com>
   9 *
  10 * This work is licensed under the terms of the GNU GPL, version 2.
  11 * See the COPYING file in the top-level directory.
  12 */
  13
  14#ifndef _QEMU_VIRTIO_VGA_H
  15#define _QEMU_VIRTIO_VGA_H
  16
  17#include "qemu/queue.h"
  18#include "ui/qemu-pixman.h"
  19#include "ui/console.h"
  20#include "hw/virtio/virtio.h"
  21#include "hw/pci/pci.h"
  22
  23#include "standard-headers/linux/virtio_gpu.h"
  24#define TYPE_VIRTIO_GPU "virtio-gpu-device"
  25#define VIRTIO_GPU(obj)                                        \
  26        OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU)
  27
  28#define VIRTIO_ID_GPU 16
  29
  30#define VIRTIO_GPU_MAX_SCANOUT 4
  31
  32struct virtio_gpu_simple_resource {
  33    uint32_t resource_id;
  34    uint32_t width;
  35    uint32_t height;
  36    uint32_t format;
  37    struct iovec *iov;
  38    unsigned int iov_cnt;
  39    uint32_t scanout_bitmask;
  40    pixman_image_t *image;
  41    QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
  42};
  43
  44struct virtio_gpu_scanout {
  45    QemuConsole *con;
  46    DisplaySurface *ds;
  47    uint32_t width, height;
  48    int x, y;
  49    int invalidate;
  50    uint32_t resource_id;
  51    QEMUCursor *current_cursor;
  52};
  53
  54struct virtio_gpu_requested_state {
  55    uint32_t width, height;
  56    int x, y;
  57};
  58
  59enum virtio_gpu_conf_flags {
  60    VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
  61    VIRTIO_GPU_FLAG_STATS_ENABLED,
  62};
  63
  64#define virtio_gpu_virgl_enabled(_cfg) \
  65    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
  66#define virtio_gpu_stats_enabled(_cfg) \
  67    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
  68
  69struct virtio_gpu_conf {
  70    uint32_t max_outputs;
  71    uint32_t flags;
  72};
  73
  74struct virtio_gpu_ctrl_command {
  75    VirtQueueElement elem;
  76    VirtQueue *vq;
  77    struct virtio_gpu_ctrl_hdr cmd_hdr;
  78    uint32_t error;
  79    bool waiting;
  80    bool finished;
  81    QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
  82};
  83
  84typedef struct VirtIOGPU {
  85    VirtIODevice parent_obj;
  86
  87    QEMUBH *ctrl_bh;
  88    QEMUBH *cursor_bh;
  89    VirtQueue *ctrl_vq;
  90    VirtQueue *cursor_vq;
  91
  92    int enable;
  93
  94    int config_size;
  95    DeviceState *qdev;
  96
  97    QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
  98    QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;
  99    QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
 100
 101    struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUT];
 102    struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUT];
 103
 104    struct virtio_gpu_conf conf;
 105    int enabled_output_bitmask;
 106    struct virtio_gpu_config virtio_config;
 107
 108    bool use_virgl_renderer;
 109    bool renderer_inited;
 110    bool renderer_blocked;
 111    QEMUTimer *fence_poll;
 112    QEMUTimer *print_stats;
 113
 114    uint32_t inflight;
 115    struct {
 116        uint32_t max_inflight;
 117        uint32_t requests;
 118        uint32_t req_3d;
 119        uint32_t bytes_3d;
 120    } stats;
 121} VirtIOGPU;
 122
 123extern const GraphicHwOps virtio_gpu_ops;
 124
 125/* to share between PCI and VGA */
 126#define DEFINE_VIRTIO_GPU_PCI_PROPERTIES(_state)               \
 127    DEFINE_PROP_BIT("ioeventfd", _state, flags,                \
 128                    VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), \
 129    DEFINE_PROP_UINT32("vectors", _state, nvectors, 3)
 130
 131#define VIRTIO_GPU_FILL_CMD(out) do {                                   \
 132        size_t s;                                                       \
 133        s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0,          \
 134                       &out, sizeof(out));                              \
 135        if (s != sizeof(out)) {                                         \
 136            qemu_log_mask(LOG_GUEST_ERROR,                              \
 137                          "%s: command size incorrect %zu vs %zu\n",    \
 138                          __func__, s, sizeof(out));                    \
 139            return;                                                     \
 140        }                                                               \
 141    } while (0)
 142
 143/* virtio-gpu.c */
 144void virtio_gpu_ctrl_response(VirtIOGPU *g,
 145                              struct virtio_gpu_ctrl_command *cmd,
 146                              struct virtio_gpu_ctrl_hdr *resp,
 147                              size_t resp_len);
 148void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
 149                                     struct virtio_gpu_ctrl_command *cmd,
 150                                     enum virtio_gpu_ctrl_type type);
 151void virtio_gpu_get_display_info(VirtIOGPU *g,
 152                                 struct virtio_gpu_ctrl_command *cmd);
 153int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
 154                                  struct virtio_gpu_ctrl_command *cmd,
 155                                  struct iovec **iov);
 156void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count);
 157void virtio_gpu_process_cmdq(VirtIOGPU *g);
 158
 159/* virtio-gpu-3d.c */
 160void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
 161                                  struct virtio_gpu_ctrl_command *cmd);
 162void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
 163void virtio_gpu_virgl_reset(VirtIOGPU *g);
 164int virtio_gpu_virgl_init(VirtIOGPU *g);
 165
 166#endif
 167