1#ifndef _ASM_X86_HYPERV_H
2#define _ASM_X86_HYPERV_H
3
4#include "standard-headers/linux/types.h"
5
6
7
8
9
10#define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000
11#define HYPERV_CPUID_INTERFACE 0x40000001
12#define HYPERV_CPUID_VERSION 0x40000002
13#define HYPERV_CPUID_FEATURES 0x40000003
14#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004
15#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005
16
17#define HYPERV_HYPERVISOR_PRESENT_BIT 0x80000000
18#define HYPERV_CPUID_MIN 0x40000005
19#define HYPERV_CPUID_MAX 0x4000ffff
20
21
22
23
24
25
26
27#define HV_X64_MSR_VP_RUNTIME_AVAILABLE (1 << 0)
28
29#define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE (1 << 1)
30
31#define HV_X64_MSR_REFERENCE_TSC_AVAILABLE (1 << 9)
32
33
34#define HV_X64_MSR_REFERENCE_TSC 0x40000021
35
36
37
38
39
40
41
42
43#define HV_X64_MSR_APIC_FREQUENCY_AVAILABLE (1 << 11)
44
45
46#define HV_X64_MSR_TSC_FREQUENCY_AVAILABLE (1 << 11)
47
48
49
50
51
52#define HV_X64_MSR_SYNIC_AVAILABLE (1 << 2)
53
54
55
56
57#define HV_X64_MSR_SYNTIMER_AVAILABLE (1 << 3)
58
59
60
61
62#define HV_X64_MSR_APIC_ACCESS_AVAILABLE (1 << 4)
63
64#define HV_X64_MSR_HYPERCALL_AVAILABLE (1 << 5)
65
66#define HV_X64_MSR_VP_INDEX_AVAILABLE (1 << 6)
67
68#define HV_X64_MSR_RESET_AVAILABLE (1 << 7)
69
70
71
72
73
74#define HV_X64_MSR_STAT_PAGES_AVAILABLE (1 << 8)
75
76
77
78
79
80
81#define HV_X64_CREATE_PARTITIONS (1 << 0)
82#define HV_X64_ACCESS_PARTITION_ID (1 << 1)
83#define HV_X64_ACCESS_MEMORY_POOL (1 << 2)
84#define HV_X64_ADJUST_MESSAGE_BUFFERS (1 << 3)
85#define HV_X64_POST_MESSAGES (1 << 4)
86#define HV_X64_SIGNAL_EVENTS (1 << 5)
87#define HV_X64_CREATE_PORT (1 << 6)
88#define HV_X64_CONNECT_PORT (1 << 7)
89#define HV_X64_ACCESS_STATS (1 << 8)
90#define HV_X64_DEBUGGING (1 << 11)
91#define HV_X64_CPU_POWER_MANAGEMENT (1 << 12)
92#define HV_X64_CONFIGURE_PROFILER (1 << 13)
93
94
95
96
97
98
99#define HV_X64_MWAIT_AVAILABLE (1 << 0)
100
101#define HV_X64_GUEST_DEBUGGING_AVAILABLE (1 << 1)
102
103#define HV_X64_PERF_MONITOR_AVAILABLE (1 << 2)
104
105#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE (1 << 3)
106
107
108
109
110#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE (1 << 4)
111
112#define HV_X64_GUEST_IDLE_STATE_AVAILABLE (1 << 5)
113
114#define HV_X64_GUEST_CRASH_MSR_AVAILABLE (1 << 10)
115
116
117
118
119
120
121
122
123
124#define HV_X64_MWAIT_RECOMMENDED (1 << 0)
125
126
127#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED (1 << 1)
128
129
130
131
132#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED (1 << 2)
133
134
135
136
137#define HV_X64_APIC_ACCESS_RECOMMENDED (1 << 3)
138
139#define HV_X64_SYSTEM_RESET_RECOMMENDED (1 << 4)
140
141
142
143
144
145#define HV_X64_RELAXED_TIMING_RECOMMENDED (1 << 5)
146
147
148#define HV_X64_MSR_GUEST_OS_ID 0x40000000
149
150
151#define HV_X64_MSR_HYPERCALL 0x40000001
152
153
154#define HV_X64_MSR_VP_INDEX 0x40000002
155
156
157#define HV_X64_MSR_RESET 0x40000003
158
159
160#define HV_X64_MSR_VP_RUNTIME 0x40000010
161
162
163#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
164
165
166#define HV_X64_MSR_TSC_FREQUENCY 0x40000022
167
168
169#define HV_X64_MSR_APIC_FREQUENCY 0x40000023
170
171
172#define HV_X64_MSR_EOI 0x40000070
173#define HV_X64_MSR_ICR 0x40000071
174#define HV_X64_MSR_TPR 0x40000072
175#define HV_X64_MSR_APIC_ASSIST_PAGE 0x40000073
176
177
178#define HV_X64_MSR_SCONTROL 0x40000080
179#define HV_X64_MSR_SVERSION 0x40000081
180#define HV_X64_MSR_SIEFP 0x40000082
181#define HV_X64_MSR_SIMP 0x40000083
182#define HV_X64_MSR_EOM 0x40000084
183#define HV_X64_MSR_SINT0 0x40000090
184#define HV_X64_MSR_SINT1 0x40000091
185#define HV_X64_MSR_SINT2 0x40000092
186#define HV_X64_MSR_SINT3 0x40000093
187#define HV_X64_MSR_SINT4 0x40000094
188#define HV_X64_MSR_SINT5 0x40000095
189#define HV_X64_MSR_SINT6 0x40000096
190#define HV_X64_MSR_SINT7 0x40000097
191#define HV_X64_MSR_SINT8 0x40000098
192#define HV_X64_MSR_SINT9 0x40000099
193#define HV_X64_MSR_SINT10 0x4000009A
194#define HV_X64_MSR_SINT11 0x4000009B
195#define HV_X64_MSR_SINT12 0x4000009C
196#define HV_X64_MSR_SINT13 0x4000009D
197#define HV_X64_MSR_SINT14 0x4000009E
198#define HV_X64_MSR_SINT15 0x4000009F
199
200
201
202
203#define HV_X64_MSR_STIMER0_CONFIG 0x400000B0
204#define HV_X64_MSR_STIMER0_COUNT 0x400000B1
205#define HV_X64_MSR_STIMER1_CONFIG 0x400000B2
206#define HV_X64_MSR_STIMER1_COUNT 0x400000B3
207#define HV_X64_MSR_STIMER2_CONFIG 0x400000B4
208#define HV_X64_MSR_STIMER2_COUNT 0x400000B5
209#define HV_X64_MSR_STIMER3_CONFIG 0x400000B6
210#define HV_X64_MSR_STIMER3_COUNT 0x400000B7
211
212
213#define HV_X64_MSR_CRASH_P0 0x40000100
214#define HV_X64_MSR_CRASH_P1 0x40000101
215#define HV_X64_MSR_CRASH_P2 0x40000102
216#define HV_X64_MSR_CRASH_P3 0x40000103
217#define HV_X64_MSR_CRASH_P4 0x40000104
218#define HV_X64_MSR_CRASH_CTL 0x40000105
219#define HV_X64_MSR_CRASH_CTL_NOTIFY (1ULL << 63)
220#define HV_X64_MSR_CRASH_PARAMS \
221 (1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0))
222
223#define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001
224#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
225#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK \
226 (~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
227
228
229#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008
230#define HVCALL_POST_MESSAGE 0x005c
231#define HVCALL_SIGNAL_EVENT 0x005d
232
233#define HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE 0x00000001
234#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT 12
235#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_MASK \
236 (~((1ull << HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
237
238#define HV_X64_MSR_TSC_REFERENCE_ENABLE 0x00000001
239#define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT 12
240
241#define HV_PROCESSOR_POWER_STATE_C0 0
242#define HV_PROCESSOR_POWER_STATE_C1 1
243#define HV_PROCESSOR_POWER_STATE_C2 2
244#define HV_PROCESSOR_POWER_STATE_C3 3
245
246
247#define HV_STATUS_SUCCESS 0
248#define HV_STATUS_INVALID_HYPERCALL_CODE 2
249#define HV_STATUS_INVALID_HYPERCALL_INPUT 3
250#define HV_STATUS_INVALID_ALIGNMENT 4
251#define HV_STATUS_INSUFFICIENT_MEMORY 11
252#define HV_STATUS_INVALID_CONNECTION_ID 18
253#define HV_STATUS_INSUFFICIENT_BUFFERS 19
254
255typedef struct _HV_REFERENCE_TSC_PAGE {
256 uint32_t tsc_sequence;
257 uint32_t res1;
258 uint64_t tsc_scale;
259 int64_t tsc_offset;
260} HV_REFERENCE_TSC_PAGE, *PHV_REFERENCE_TSC_PAGE;
261
262
263#define HV_SYNIC_SINT_COUNT (16)
264
265#define HV_SYNIC_VERSION_1 (0x1)
266
267#define HV_SYNIC_CONTROL_ENABLE (1ULL << 0)
268#define HV_SYNIC_SIMP_ENABLE (1ULL << 0)
269#define HV_SYNIC_SIEFP_ENABLE (1ULL << 0)
270#define HV_SYNIC_SINT_MASKED (1ULL << 16)
271#define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17)
272#define HV_SYNIC_SINT_VECTOR_MASK (0xFF)
273
274#define HV_SYNIC_STIMER_COUNT (4)
275
276
277#define HV_MESSAGE_SIZE (256)
278#define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240)
279#define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30)
280
281
282enum hv_message_type {
283 HVMSG_NONE = 0x00000000,
284
285
286 HVMSG_UNMAPPED_GPA = 0x80000000,
287 HVMSG_GPA_INTERCEPT = 0x80000001,
288
289
290 HVMSG_TIMER_EXPIRED = 0x80000010,
291
292
293 HVMSG_INVALID_VP_REGISTER_VALUE = 0x80000020,
294 HVMSG_UNRECOVERABLE_EXCEPTION = 0x80000021,
295 HVMSG_UNSUPPORTED_FEATURE = 0x80000022,
296
297
298 HVMSG_EVENTLOG_BUFFERCOMPLETE = 0x80000040,
299
300
301 HVMSG_X64_IOPORT_INTERCEPT = 0x80010000,
302 HVMSG_X64_MSR_INTERCEPT = 0x80010001,
303 HVMSG_X64_CPUID_INTERCEPT = 0x80010002,
304 HVMSG_X64_EXCEPTION_INTERCEPT = 0x80010003,
305 HVMSG_X64_APIC_EOI = 0x80010004,
306 HVMSG_X64_LEGACY_FP_ERROR = 0x80010005
307};
308
309
310union hv_message_flags {
311 uint8_t asu8;
312 struct {
313 uint8_t msg_pending:1;
314 uint8_t reserved:7;
315 };
316};
317
318
319union hv_port_id {
320 uint32_t asu32;
321 struct {
322 uint32_t id:24;
323 uint32_t reserved:8;
324 } u;
325};
326
327
328struct hv_message_header {
329 uint32_t message_type;
330 uint8_t payload_size;
331 union hv_message_flags message_flags;
332 uint8_t reserved[2];
333 union {
334 uint64_t sender;
335 union hv_port_id port;
336 };
337};
338
339
340struct hv_message {
341 struct hv_message_header header;
342 union {
343 uint64_t payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
344 } u;
345};
346
347
348struct hv_message_page {
349 struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
350};
351
352
353struct hv_timer_message_payload {
354 uint32_t timer_index;
355 uint32_t reserved;
356 uint64_t expiration_time;
357 uint64_t delivery_time;
358};
359
360#define HV_STIMER_ENABLE (1ULL << 0)
361#define HV_STIMER_PERIODIC (1ULL << 1)
362#define HV_STIMER_LAZY (1ULL << 2)
363#define HV_STIMER_AUTOENABLE (1ULL << 3)
364#define HV_STIMER_SINT(config) (uint8_t)(((config) >> 16) & 0x0F)
365
366#endif
367