LXR qemu/target-arm/kvm-consts.h

   1/*
   2 * KVM ARM ABI constant definitions
   3 *
   4 * Copyright (c) 2013 Linaro Limited
   5 *
   6 * Provide versions of KVM constant defines that can be used even
   7 * when CONFIG_KVM is not set and we don't have access to the
   8 * KVM headers. If CONFIG_KVM is set, we do a compile-time check
   9 * that we haven't got out of sync somehow.
  10 *
  11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
  12 * See the COPYING file in the top-level directory.
  13 */
  14#ifndef ARM_KVM_CONSTS_H
  15#define ARM_KVM_CONSTS_H
  16
  17#ifdef CONFIG_KVM
  18#include <linux/kvm.h>
  19#include <linux/psci.h>
  20
  21#define MISMATCH_CHECK(X, Y) QEMU_BUILD_BUG_ON(X != Y)
  22
  23#else
  24#define MISMATCH_CHECK(X, Y)
  25#endif
  26
  27#define CP_REG_SIZE_SHIFT 52
  28#define CP_REG_SIZE_MASK       0x00f0000000000000ULL
  29#define CP_REG_SIZE_U32        0x0020000000000000ULL
  30#define CP_REG_SIZE_U64        0x0030000000000000ULL
  31#define CP_REG_ARM             0x4000000000000000ULL
  32#define CP_REG_ARCH_MASK       0xff00000000000000ULL
  33
  34MISMATCH_CHECK(CP_REG_SIZE_SHIFT, KVM_REG_SIZE_SHIFT)
  35MISMATCH_CHECK(CP_REG_SIZE_MASK, KVM_REG_SIZE_MASK)
  36MISMATCH_CHECK(CP_REG_SIZE_U32, KVM_REG_SIZE_U32)
  37MISMATCH_CHECK(CP_REG_SIZE_U64, KVM_REG_SIZE_U64)
  38MISMATCH_CHECK(CP_REG_ARM, KVM_REG_ARM)
  39MISMATCH_CHECK(CP_REG_ARCH_MASK, KVM_REG_ARCH_MASK)
  40
  41#define QEMU_PSCI_0_1_FN_BASE 0x95c1ba5e
  42#define QEMU_PSCI_0_1_FN(n) (QEMU_PSCI_0_1_FN_BASE + (n))
  43#define QEMU_PSCI_0_1_FN_CPU_SUSPEND QEMU_PSCI_0_1_FN(0)
  44#define QEMU_PSCI_0_1_FN_CPU_OFF QEMU_PSCI_0_1_FN(1)
  45#define QEMU_PSCI_0_1_FN_CPU_ON QEMU_PSCI_0_1_FN(2)
  46#define QEMU_PSCI_0_1_FN_MIGRATE QEMU_PSCI_0_1_FN(3)
  47
  48MISMATCH_CHECK(QEMU_PSCI_0_1_FN_CPU_SUSPEND, KVM_PSCI_FN_CPU_SUSPEND)
  49MISMATCH_CHECK(QEMU_PSCI_0_1_FN_CPU_OFF, KVM_PSCI_FN_CPU_OFF)
  50MISMATCH_CHECK(QEMU_PSCI_0_1_FN_CPU_ON, KVM_PSCI_FN_CPU_ON)
  51MISMATCH_CHECK(QEMU_PSCI_0_1_FN_MIGRATE, KVM_PSCI_FN_MIGRATE)
  52
  53#define QEMU_PSCI_0_2_FN_BASE 0x84000000
  54#define QEMU_PSCI_0_2_FN(n) (QEMU_PSCI_0_2_FN_BASE + (n))
  55
  56#define QEMU_PSCI_0_2_64BIT 0x40000000
  57#define QEMU_PSCI_0_2_FN64_BASE \
  58        (QEMU_PSCI_0_2_FN_BASE + QEMU_PSCI_0_2_64BIT)
  59#define QEMU_PSCI_0_2_FN64(n) (QEMU_PSCI_0_2_FN64_BASE + (n))
  60
  61#define QEMU_PSCI_0_2_FN_PSCI_VERSION QEMU_PSCI_0_2_FN(0)
  62#define QEMU_PSCI_0_2_FN_CPU_SUSPEND QEMU_PSCI_0_2_FN(1)
  63#define QEMU_PSCI_0_2_FN_CPU_OFF QEMU_PSCI_0_2_FN(2)
  64#define QEMU_PSCI_0_2_FN_CPU_ON QEMU_PSCI_0_2_FN(3)
  65#define QEMU_PSCI_0_2_FN_AFFINITY_INFO QEMU_PSCI_0_2_FN(4)
  66#define QEMU_PSCI_0_2_FN_MIGRATE QEMU_PSCI_0_2_FN(5)
  67#define QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE QEMU_PSCI_0_2_FN(6)
  68#define QEMU_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU QEMU_PSCI_0_2_FN(7)
  69#define QEMU_PSCI_0_2_FN_SYSTEM_OFF QEMU_PSCI_0_2_FN(8)
  70#define QEMU_PSCI_0_2_FN_SYSTEM_RESET QEMU_PSCI_0_2_FN(9)
  71
  72#define QEMU_PSCI_0_2_FN64_CPU_SUSPEND QEMU_PSCI_0_2_FN64(1)
  73#define QEMU_PSCI_0_2_FN64_CPU_OFF QEMU_PSCI_0_2_FN64(2)
  74#define QEMU_PSCI_0_2_FN64_CPU_ON QEMU_PSCI_0_2_FN64(3)
  75#define QEMU_PSCI_0_2_FN64_AFFINITY_INFO QEMU_PSCI_0_2_FN64(4)
  76#define QEMU_PSCI_0_2_FN64_MIGRATE QEMU_PSCI_0_2_FN64(5)
  77
  78MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_SUSPEND, PSCI_0_2_FN_CPU_SUSPEND)
  79MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_OFF, PSCI_0_2_FN_CPU_OFF)
  80MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_ON, PSCI_0_2_FN_CPU_ON)
  81MISMATCH_CHECK(QEMU_PSCI_0_2_FN_MIGRATE, PSCI_0_2_FN_MIGRATE)
  82MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_SUSPEND, PSCI_0_2_FN64_CPU_SUSPEND)
  83MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_ON, PSCI_0_2_FN64_CPU_ON)
  84MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_MIGRATE, PSCI_0_2_FN64_MIGRATE)
  85
  86/* PSCI v0.2 return values used by TCG emulation of PSCI */
  87
  88/* No Trusted OS migration to worry about when offlining CPUs */
  89#define QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED        2
  90
  91/* We implement version 0.2 only */
  92#define QEMU_PSCI_0_2_RET_VERSION_0_2                       2
  93
  94MISMATCH_CHECK(QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED, PSCI_0_2_TOS_MP)
  95MISMATCH_CHECK(QEMU_PSCI_0_2_RET_VERSION_0_2,
  96               (PSCI_VERSION_MAJOR(0) | PSCI_VERSION_MINOR(2)))
  97
  98/* PSCI return values (inclusive of all PSCI versions) */
  99#define QEMU_PSCI_RET_SUCCESS                     0
 100#define QEMU_PSCI_RET_NOT_SUPPORTED               -1
 101#define QEMU_PSCI_RET_INVALID_PARAMS              -2
 102#define QEMU_PSCI_RET_DENIED                      -3
 103#define QEMU_PSCI_RET_ALREADY_ON                  -4
 104#define QEMU_PSCI_RET_ON_PENDING                  -5
 105#define QEMU_PSCI_RET_INTERNAL_FAILURE            -6
 106#define QEMU_PSCI_RET_NOT_PRESENT                 -7
 107#define QEMU_PSCI_RET_DISABLED                    -8
 108
 109MISMATCH_CHECK(QEMU_PSCI_RET_SUCCESS, PSCI_RET_SUCCESS)
 110MISMATCH_CHECK(QEMU_PSCI_RET_NOT_SUPPORTED, PSCI_RET_NOT_SUPPORTED)
 111MISMATCH_CHECK(QEMU_PSCI_RET_INVALID_PARAMS, PSCI_RET_INVALID_PARAMS)
 112MISMATCH_CHECK(QEMU_PSCI_RET_DENIED, PSCI_RET_DENIED)
 113MISMATCH_CHECK(QEMU_PSCI_RET_ALREADY_ON, PSCI_RET_ALREADY_ON)
 114MISMATCH_CHECK(QEMU_PSCI_RET_ON_PENDING, PSCI_RET_ON_PENDING)
 115MISMATCH_CHECK(QEMU_PSCI_RET_INTERNAL_FAILURE, PSCI_RET_INTERNAL_FAILURE)
 116MISMATCH_CHECK(QEMU_PSCI_RET_NOT_PRESENT, PSCI_RET_NOT_PRESENT)
 117MISMATCH_CHECK(QEMU_PSCI_RET_DISABLED, PSCI_RET_DISABLED)
 118
 119/* Note that KVM uses overlapping values for AArch32 and AArch64
 120 * target CPU numbers. AArch32 targets:
 121 */
 122#define QEMU_KVM_ARM_TARGET_CORTEX_A15 0
 123#define QEMU_KVM_ARM_TARGET_CORTEX_A7 1
 124
 125/* AArch64 targets: */
 126#define QEMU_KVM_ARM_TARGET_AEM_V8 0
 127#define QEMU_KVM_ARM_TARGET_FOUNDATION_V8 1
 128#define QEMU_KVM_ARM_TARGET_CORTEX_A57 2
 129#define QEMU_KVM_ARM_TARGET_XGENE_POTENZA 3
 130#define QEMU_KVM_ARM_TARGET_CORTEX_A53 4
 131
 132/* There's no kernel define for this: sentinel value which
 133 * matches no KVM target value for either 64 or 32 bit
 134 */
 135#define QEMU_KVM_ARM_TARGET_NONE UINT_MAX
 136
 137#ifdef TARGET_AARCH64
 138MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_AEM_V8, KVM_ARM_TARGET_AEM_V8)
 139MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_FOUNDATION_V8, KVM_ARM_TARGET_FOUNDATION_V8)
 140MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A57, KVM_ARM_TARGET_CORTEX_A57)
 141MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_XGENE_POTENZA, KVM_ARM_TARGET_XGENE_POTENZA)
 142MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A53, KVM_ARM_TARGET_CORTEX_A53)
 143#else
 144MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A15, KVM_ARM_TARGET_CORTEX_A15)
 145MISMATCH_CHECK(QEMU_KVM_ARM_TARGET_CORTEX_A7, KVM_ARM_TARGET_CORTEX_A7)
 146#endif
 147
 148#define CP_REG_ARM64                   0x6000000000000000ULL
 149#define CP_REG_ARM_COPROC_MASK         0x000000000FFF0000
 150#define CP_REG_ARM_COPROC_SHIFT        16
 151#define CP_REG_ARM64_SYSREG            (0x0013 << CP_REG_ARM_COPROC_SHIFT)
 152#define CP_REG_ARM64_SYSREG_OP0_MASK   0x000000000000c000
 153#define CP_REG_ARM64_SYSREG_OP0_SHIFT  14
 154#define CP_REG_ARM64_SYSREG_OP1_MASK   0x0000000000003800
 155#define CP_REG_ARM64_SYSREG_OP1_SHIFT  11
 156#define CP_REG_ARM64_SYSREG_CRN_MASK   0x0000000000000780
 157#define CP_REG_ARM64_SYSREG_CRN_SHIFT  7
 158#define CP_REG_ARM64_SYSREG_CRM_MASK   0x0000000000000078
 159#define CP_REG_ARM64_SYSREG_CRM_SHIFT  3
 160#define CP_REG_ARM64_SYSREG_OP2_MASK   0x0000000000000007
 161#define CP_REG_ARM64_SYSREG_OP2_SHIFT  0
 162
 163/* No kernel define but it's useful to QEMU */
 164#define CP_REG_ARM64_SYSREG_CP (CP_REG_ARM64_SYSREG >> CP_REG_ARM_COPROC_SHIFT)
 165
 166#ifdef TARGET_AARCH64
 167MISMATCH_CHECK(CP_REG_ARM64, KVM_REG_ARM64)
 168MISMATCH_CHECK(CP_REG_ARM_COPROC_MASK, KVM_REG_ARM_COPROC_MASK)
 169MISMATCH_CHECK(CP_REG_ARM_COPROC_SHIFT, KVM_REG_ARM_COPROC_SHIFT)
 170MISMATCH_CHECK(CP_REG_ARM64_SYSREG, KVM_REG_ARM64_SYSREG)
 171MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP0_MASK, KVM_REG_ARM64_SYSREG_OP0_MASK)
 172MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP0_SHIFT, KVM_REG_ARM64_SYSREG_OP0_SHIFT)
 173MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP1_MASK, KVM_REG_ARM64_SYSREG_OP1_MASK)
 174MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP1_SHIFT, KVM_REG_ARM64_SYSREG_OP1_SHIFT)
 175MISMATCH_CHECK(CP_REG_ARM64_SYSREG_CRN_MASK, KVM_REG_ARM64_SYSREG_CRN_MASK)
 176MISMATCH_CHECK(CP_REG_ARM64_SYSREG_CRN_SHIFT, KVM_REG_ARM64_SYSREG_CRN_SHIFT)
 177MISMATCH_CHECK(CP_REG_ARM64_SYSREG_CRM_MASK, KVM_REG_ARM64_SYSREG_CRM_MASK)
 178MISMATCH_CHECK(CP_REG_ARM64_SYSREG_CRM_SHIFT, KVM_REG_ARM64_SYSREG_CRM_SHIFT)
 179MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP2_MASK, KVM_REG_ARM64_SYSREG_OP2_MASK)
 180MISMATCH_CHECK(CP_REG_ARM64_SYSREG_OP2_SHIFT, KVM_REG_ARM64_SYSREG_OP2_SHIFT)
 181#endif
 182
 183#undef MISMATCH_CHECK
 184
 185#endif
 186