1Unsolved issues/bugs in the mips/mipsel backend 2----------------------------------------------- 3 4General 5------- 6- Unimplemented ASEs: 7 - MDMX 8 - SmartMIPS 9 - microMIPS DSP r1 & r2 encodings 10- MT ASE only partially implemented and not functional 11- Shadow register support only partially implemented, 12 lacks set switching on interrupt/exception. 13- 34K ITC not implemented. 14- A general lack of documentation, especially for technical internals. 15 Existing documentation is x86-centric. 16- Reverse endianness bit not implemented 17- The TLB emulation is very inefficient: 18 QEMU's softmmu implements a x86-style MMU, with separate entries 19 for read/write/execute, a TLB index which is just a modulo of the 20 virtual address, and a set of TLBs for each user/kernel/supervisor 21 MMU mode. 22 MIPS has a single entry for read/write/execute and only one MMU mode. 23 But it is fully associative with randomized entry indices, and uses 24 up to 256 ASID tags as additional matching criterion (which roughly 25 equates to 256 MMU modes). It also has a global flag which causes 26 entries to match regardless of ASID. 27 To cope with these differences, QEMU currently flushes the TLB at 28 each ASID change. Using the MMU modes to implement ASIDs hinges on 29 implementing the global bit efficiently. 30- save/restore of the CPU state is not implemented (see machine.c). 31 32MIPS64 33------ 34- Userland emulation (both n32 and n64) not functional. 35 36"Generic" 4Kc system emulation 37------------------------------ 38- Doesn't correspond to any real hardware. Should be removed some day, 39 U-Boot is the last remaining user. 40 41PICA 61 system emulation 42------------------------ 43- No framebuffer support yet. 44 45MALTA system emulation 46---------------------- 47- We fake firmware support instead of doing the real thing 48- Real firmware (YAMON) falls over when trying to init RAM, presumably 49 due to lacking system controller emulation. 50- Bonito system controller not implemented 51- MSC1 system controller not implemented 52