1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20#include "qemu/osdep.h"
21#include "qapi/error.h"
22#include "cpu.h"
23#include "qemu-common.h"
24
25static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
26{
27 OpenRISCCPU *cpu = OPENRISC_CPU(cs);
28
29 cpu->env.pc = value;
30}
31
32static bool openrisc_cpu_has_work(CPUState *cs)
33{
34 return cs->interrupt_request & (CPU_INTERRUPT_HARD |
35 CPU_INTERRUPT_TIMER);
36}
37
38
39static void openrisc_cpu_reset(CPUState *s)
40{
41 OpenRISCCPU *cpu = OPENRISC_CPU(s);
42 OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(cpu);
43
44 occ->parent_reset(s);
45
46#ifndef CONFIG_USER_ONLY
47 memset(&cpu->env, 0, offsetof(CPUOpenRISCState, tlb));
48#else
49 memset(&cpu->env, 0, offsetof(CPUOpenRISCState, irq));
50#endif
51
52 tlb_flush(s, 1);
53
54
55 cpu->env.pc = 0x100;
56 cpu->env.sr = SR_FO | SR_SM;
57 s->exception_index = -1;
58
59 cpu->env.upr = UPR_UP | UPR_DMP | UPR_IMP | UPR_PICP | UPR_TTP;
60 cpu->env.cpucfgr = CPUCFGR_OB32S | CPUCFGR_OF32S;
61 cpu->env.dmmucfgr = (DMMUCFGR_NTW & (0 << 2)) | (DMMUCFGR_NTS & (6 << 2));
62 cpu->env.immucfgr = (IMMUCFGR_NTW & (0 << 2)) | (IMMUCFGR_NTS & (6 << 2));
63
64#ifndef CONFIG_USER_ONLY
65 cpu->env.picmr = 0x00000000;
66 cpu->env.picsr = 0x00000000;
67
68 cpu->env.ttmr = 0x00000000;
69 cpu->env.ttcr = 0x00000000;
70#endif
71}
72
73static inline void set_feature(OpenRISCCPU *cpu, int feature)
74{
75 cpu->feature |= feature;
76 cpu->env.cpucfgr = cpu->feature;
77}
78
79static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp)
80{
81 CPUState *cs = CPU(dev);
82 OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev);
83
84 qemu_init_vcpu(cs);
85 cpu_reset(cs);
86
87 occ->parent_realize(dev, errp);
88}
89
90static void openrisc_cpu_initfn(Object *obj)
91{
92 CPUState *cs = CPU(obj);
93 OpenRISCCPU *cpu = OPENRISC_CPU(obj);
94 static int inited;
95
96 cs->env_ptr = &cpu->env;
97 cpu_exec_init(cs, &error_abort);
98
99#ifndef CONFIG_USER_ONLY
100 cpu_openrisc_mmu_init(cpu);
101#endif
102
103 if (tcg_enabled() && !inited) {
104 inited = 1;
105 openrisc_translate_init();
106 }
107}
108
109
110
111static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
112{
113 ObjectClass *oc;
114 char *typename;
115
116 if (cpu_model == NULL) {
117 return NULL;
118 }
119
120 typename = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, cpu_model);
121 oc = object_class_by_name(typename);
122 g_free(typename);
123 if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) ||
124 object_class_is_abstract(oc))) {
125 return NULL;
126 }
127 return oc;
128}
129
130static void or1200_initfn(Object *obj)
131{
132 OpenRISCCPU *cpu = OPENRISC_CPU(obj);
133
134 set_feature(cpu, OPENRISC_FEATURE_OB32S);
135 set_feature(cpu, OPENRISC_FEATURE_OF32S);
136}
137
138static void openrisc_any_initfn(Object *obj)
139{
140 OpenRISCCPU *cpu = OPENRISC_CPU(obj);
141
142 set_feature(cpu, OPENRISC_FEATURE_OB32S);
143}
144
145typedef struct OpenRISCCPUInfo {
146 const char *name;
147 void (*initfn)(Object *obj);
148} OpenRISCCPUInfo;
149
150static const OpenRISCCPUInfo openrisc_cpus[] = {
151 { .name = "or1200", .initfn = or1200_initfn },
152 { .name = "any", .initfn = openrisc_any_initfn },
153};
154
155static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
156{
157 OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
158 CPUClass *cc = CPU_CLASS(occ);
159 DeviceClass *dc = DEVICE_CLASS(oc);
160
161 occ->parent_realize = dc->realize;
162 dc->realize = openrisc_cpu_realizefn;
163
164 occ->parent_reset = cc->reset;
165 cc->reset = openrisc_cpu_reset;
166
167 cc->class_by_name = openrisc_cpu_class_by_name;
168 cc->has_work = openrisc_cpu_has_work;
169 cc->do_interrupt = openrisc_cpu_do_interrupt;
170 cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
171 cc->dump_state = openrisc_cpu_dump_state;
172 cc->set_pc = openrisc_cpu_set_pc;
173 cc->gdb_read_register = openrisc_cpu_gdb_read_register;
174 cc->gdb_write_register = openrisc_cpu_gdb_write_register;
175#ifdef CONFIG_USER_ONLY
176 cc->handle_mmu_fault = openrisc_cpu_handle_mmu_fault;
177#else
178 cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug;
179 dc->vmsd = &vmstate_openrisc_cpu;
180#endif
181 cc->gdb_num_core_regs = 32 + 3;
182
183
184
185
186
187
188 dc->cannot_destroy_with_object_finalize_yet = true;
189}
190
191static void cpu_register(const OpenRISCCPUInfo *info)
192{
193 TypeInfo type_info = {
194 .parent = TYPE_OPENRISC_CPU,
195 .instance_size = sizeof(OpenRISCCPU),
196 .instance_init = info->initfn,
197 .class_size = sizeof(OpenRISCCPUClass),
198 };
199
200 type_info.name = g_strdup_printf("%s-" TYPE_OPENRISC_CPU, info->name);
201 type_register(&type_info);
202 g_free((void *)type_info.name);
203}
204
205static const TypeInfo openrisc_cpu_type_info = {
206 .name = TYPE_OPENRISC_CPU,
207 .parent = TYPE_CPU,
208 .instance_size = sizeof(OpenRISCCPU),
209 .instance_init = openrisc_cpu_initfn,
210 .abstract = true,
211 .class_size = sizeof(OpenRISCCPUClass),
212 .class_init = openrisc_cpu_class_init,
213};
214
215static void openrisc_cpu_register_types(void)
216{
217 int i;
218
219 type_register_static(&openrisc_cpu_type_info);
220 for (i = 0; i < ARRAY_SIZE(openrisc_cpus); i++) {
221 cpu_register(&openrisc_cpus[i]);
222 }
223}
224
225OpenRISCCPU *cpu_openrisc_init(const char *cpu_model)
226{
227 return OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
228}
229
230
231static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b)
232{
233 ObjectClass *class_a = (ObjectClass *)a;
234 ObjectClass *class_b = (ObjectClass *)b;
235 const char *name_a, *name_b;
236
237 name_a = object_class_get_name(class_a);
238 name_b = object_class_get_name(class_b);
239 if (strcmp(name_a, "any-" TYPE_OPENRISC_CPU) == 0) {
240 return 1;
241 } else if (strcmp(name_b, "any-" TYPE_OPENRISC_CPU) == 0) {
242 return -1;
243 } else {
244 return strcmp(name_a, name_b);
245 }
246}
247
248static void openrisc_cpu_list_entry(gpointer data, gpointer user_data)
249{
250 ObjectClass *oc = data;
251 CPUListState *s = user_data;
252 const char *typename;
253 char *name;
254
255 typename = object_class_get_name(oc);
256 name = g_strndup(typename,
257 strlen(typename) - strlen("-" TYPE_OPENRISC_CPU));
258 (*s->cpu_fprintf)(s->file, " %s\n",
259 name);
260 g_free(name);
261}
262
263void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf)
264{
265 CPUListState s = {
266 .file = f,
267 .cpu_fprintf = cpu_fprintf,
268 };
269 GSList *list;
270
271 list = object_class_get_list(TYPE_OPENRISC_CPU, false);
272 list = g_slist_sort(list, openrisc_cpu_list_compare);
273 (*cpu_fprintf)(f, "Available CPUs:\n");
274 g_slist_foreach(list, openrisc_cpu_list_entry, &s);
275 g_slist_free(list);
276}
277
278type_init(openrisc_cpu_register_types)
279
