LXR qemu/target-s390x/misc

   1/*
   2 *  S/390 misc helper routines
   3 *
   4 *  Copyright (c) 2009 Ulrich Hecht
   5 *  Copyright (c) 2009 Alexander Graf
   6 *
   7 * This library is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU Lesser General Public
   9 * License as published by the Free Software Foundation; either
  10 * version 2 of the License, or (at your option) any later version.
  11 *
  12 * This library is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * Lesser General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU Lesser General Public
  18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19 */
  20
  21#include "qemu/osdep.h"
  22#include "cpu.h"
  23#include "exec/memory.h"
  24#include "qemu/host-utils.h"
  25#include "exec/helper-proto.h"
  26#include "sysemu/kvm.h"
  27#include "qemu/timer.h"
  28#include "exec/address-spaces.h"
  29#ifdef CONFIG_KVM
  30#include <linux/kvm.h>
  31#endif
  32#include "exec/cpu_ldst.h"
  33#include "hw/watchdog/wdt_diag288.h"
  34
  35#if !defined(CONFIG_USER_ONLY)
  36#include "sysemu/cpus.h"
  37#include "sysemu/sysemu.h"
  38#include "hw/s390x/ebcdic.h"
  39#include "hw/s390x/ipl.h"
  40#endif
  41
  42/* #define DEBUG_HELPER */
  43#ifdef DEBUG_HELPER
  44#define HELPER_LOG(x...) qemu_log(x)
  45#else
  46#define HELPER_LOG(x...)
  47#endif
  48
  49/* Raise an exception dynamically from a helper function.  */
  50void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  51                                     uintptr_t retaddr)
  52{
  53    CPUState *cs = CPU(s390_env_get_cpu(env));
  54    int t;
  55
  56    cs->exception_index = EXCP_PGM;
  57    env->int_pgm_code = excp;
  58
  59    /* Use the (ultimate) callers address to find the insn that trapped.  */
  60    cpu_restore_state(cs, retaddr);
  61
  62    /* Advance past the insn.  */
  63    t = cpu_ldub_code(env, env->psw.addr);
  64    env->int_pgm_ilen = t = get_ilen(t);
  65    env->psw.addr += t;
  66
  67    cpu_loop_exit(cs);
  68}
  69
  70/* Raise an exception statically from a TB.  */
  71void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  72{
  73    CPUState *cs = CPU(s390_env_get_cpu(env));
  74
  75    HELPER_LOG("%s: exception %d\n", __func__, excp);
  76    cs->exception_index = excp;
  77    cpu_loop_exit(cs);
  78}
  79
  80#ifndef CONFIG_USER_ONLY
  81
  82void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  83{
  84    S390CPU *cpu = s390_env_get_cpu(env);
  85
  86    qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  87                  env->psw.addr);
  88
  89    if (kvm_enabled()) {
  90#ifdef CONFIG_KVM
  91        struct kvm_s390_irq irq = {
  92            .type = KVM_S390_PROGRAM_INT,
  93            .u.pgm.code = code,
  94        };
  95
  96        kvm_s390_vcpu_interrupt(cpu, &irq);
  97#endif
  98    } else {
  99        CPUState *cs = CPU(cpu);
 100
 101        env->int_pgm_code = code;
 102        env->int_pgm_ilen = ilen;
 103        cs->exception_index = EXCP_PGM;
 104        cpu_loop_exit(cs);
 105    }
 106}
 107
 108/* SCLP service call */
 109uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 110{
 111    int r = sclp_service_call(env, r1, r2);
 112    if (r < 0) {
 113        program_interrupt(env, -r, 4);
 114        return 0;
 115    }
 116    return r;
 117}
 118
 119#ifndef CONFIG_USER_ONLY
 120static int modified_clear_reset(S390CPU *cpu)
 121{
 122    S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 123    CPUState *t;
 124
 125    pause_all_vcpus();
 126    cpu_synchronize_all_states();
 127    CPU_FOREACH(t) {
 128        run_on_cpu(t, s390_do_cpu_full_reset, t);
 129    }
 130    s390_cmma_reset();
 131    subsystem_reset();
 132    s390_crypto_reset();
 133    scc->load_normal(CPU(cpu));
 134    cpu_synchronize_all_post_reset();
 135    resume_all_vcpus();
 136    return 0;
 137}
 138
 139static int load_normal_reset(S390CPU *cpu)
 140{
 141    S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 142    CPUState *t;
 143
 144    pause_all_vcpus();
 145    cpu_synchronize_all_states();
 146    CPU_FOREACH(t) {
 147        run_on_cpu(t, s390_do_cpu_reset, t);
 148    }
 149    s390_cmma_reset();
 150    subsystem_reset();
 151    scc->initial_cpu_reset(CPU(cpu));
 152    scc->load_normal(CPU(cpu));
 153    cpu_synchronize_all_post_reset();
 154    resume_all_vcpus();
 155    return 0;
 156}
 157
 158int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
 159{
 160    uint64_t func = env->regs[r1];
 161    uint64_t timeout = env->regs[r1 + 1];
 162    uint64_t action = env->regs[r3];
 163    Object *obj;
 164    DIAG288State *diag288;
 165    DIAG288Class *diag288_class;
 166
 167    if (r1 % 2 || action != 0) {
 168        return -1;
 169    }
 170
 171    /* Timeout must be more than 15 seconds except for timer deletion */
 172    if (func != WDT_DIAG288_CANCEL && timeout < 15) {
 173        return -1;
 174    }
 175
 176    obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
 177    if (!obj) {
 178        return -1;
 179    }
 180
 181    diag288 = DIAG288(obj);
 182    diag288_class = DIAG288_GET_CLASS(diag288);
 183    return diag288_class->handle_timer(diag288, func, timeout);
 184}
 185
 186#define DIAG_308_RC_OK              0x0001
 187#define DIAG_308_RC_NO_CONF         0x0102
 188#define DIAG_308_RC_INVALID         0x0402
 189
 190void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 191{
 192    uint64_t addr =  env->regs[r1];
 193    uint64_t subcode = env->regs[r3];
 194    IplParameterBlock *iplb;
 195
 196    if (env->psw.mask & PSW_MASK_PSTATE) {
 197        program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
 198        return;
 199    }
 200
 201    if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 202        program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 203        return;
 204    }
 205
 206    switch (subcode) {
 207    case 0:
 208        modified_clear_reset(s390_env_get_cpu(env));
 209        if (tcg_enabled()) {
 210            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 211        }
 212        break;
 213    case 1:
 214        load_normal_reset(s390_env_get_cpu(env));
 215        if (tcg_enabled()) {
 216            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 217        }
 218        break;
 219    case 3:
 220        s390_reipl_request();
 221        if (tcg_enabled()) {
 222            cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 223        }
 224        break;
 225    case 5:
 226        if ((r1 & 1) || (addr & 0x0fffULL)) {
 227            program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 228            return;
 229        }
 230        if (!address_space_access_valid(&address_space_memory, addr,
 231                                        sizeof(IplParameterBlock), false,
 232                                        MEMTXATTRS_UNSPECIFIED)) {
 233            program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 234            return;
 235        }
 236        iplb = g_malloc0(sizeof(struct IplParameterBlock));
 237        cpu_physical_memory_read(addr, iplb, sizeof(struct IplParameterBlock));
 238        s390_ipl_update_diag308(iplb);
 239        env->regs[r1 + 1] = DIAG_308_RC_OK;
 240        g_free(iplb);
 241        return;
 242    case 6:
 243        if ((r1 & 1) || (addr & 0x0fffULL)) {
 244            program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 245            return;
 246        }
 247        if (!address_space_access_valid(&address_space_memory, addr,
 248                                        sizeof(IplParameterBlock), true,
 249                                        MEMTXATTRS_UNSPECIFIED)) {
 250            program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 251            return;
 252        }
 253        iplb = s390_ipl_get_iplb();
 254        if (iplb) {
 255            cpu_physical_memory_write(addr, iplb,
 256                                      sizeof(struct IplParameterBlock));
 257            env->regs[r1 + 1] = DIAG_308_RC_OK;
 258        } else {
 259            env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
 260        }
 261        return;
 262    default:
 263        hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 264        break;
 265    }
 266}
 267#endif
 268
 269void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
 270{
 271    uint64_t r;
 272
 273    switch (num) {
 274    case 0x500:
 275        /* KVM hypercall */
 276        r = s390_virtio_hypercall(env);
 277        break;
 278    case 0x44:
 279        /* yield */
 280        r = 0;
 281        break;
 282    case 0x308:
 283        /* ipl */
 284        handle_diag_308(env, r1, r3);
 285        r = 0;
 286        break;
 287    default:
 288        r = -1;
 289        break;
 290    }
 291
 292    if (r) {
 293        program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 294    }
 295}
 296
 297/* Set Prefix */
 298void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 299{
 300    CPUState *cs = CPU(s390_env_get_cpu(env));
 301    uint32_t prefix = a1 & 0x7fffe000;
 302
 303    env->psa = prefix;
 304    HELPER_LOG("prefix: %#x\n", prefix);
 305    tlb_flush_page(cs, 0);
 306    tlb_flush_page(cs, TARGET_PAGE_SIZE);
 307}
 308
 309/* Store Clock */
 310uint64_t HELPER(stck)(CPUS390XState *env)
 311{
 312    uint64_t time;
 313
 314    time = env->tod_offset +
 315        time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 316
 317    return time;
 318}
 319
 320/* Set Clock Comparator */
 321void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 322{
 323    if (time == -1ULL) {
 324        return;
 325    }
 326
 327    env->ckc = time;
 328
 329    /* difference between origins */
 330    time -= env->tod_offset;
 331
 332    /* nanoseconds */
 333    time = tod2time(time);
 334
 335    timer_mod(env->tod_timer, env->tod_basetime + time);
 336}
 337
 338/* Store Clock Comparator */
 339uint64_t HELPER(stckc)(CPUS390XState *env)
 340{
 341    return env->ckc;
 342}
 343
 344/* Set CPU Timer */
 345void HELPER(spt)(CPUS390XState *env, uint64_t time)
 346{
 347    if (time == -1ULL) {
 348        return;
 349    }
 350
 351    /* nanoseconds */
 352    time = tod2time(time);
 353
 354    env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
 355
 356    timer_mod(env->cpu_timer, env->cputm);
 357}
 358
 359/* Store CPU Timer */
 360uint64_t HELPER(stpt)(CPUS390XState *env)
 361{
 362    return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 363}
 364
 365/* Store System Information */
 366uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 367                      uint64_t r0, uint64_t r1)
 368{
 369    int cc = 0;
 370    int sel1, sel2;
 371
 372    if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 373        ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 374        /* valid function code, invalid reserved bits */
 375        program_interrupt(env, PGM_SPECIFICATION, 2);
 376    }
 377
 378    sel1 = r0 & STSI_R0_SEL1_MASK;
 379    sel2 = r1 & STSI_R1_SEL2_MASK;
 380
 381    /* XXX: spec exception if sysib is not 4k-aligned */
 382
 383    switch (r0 & STSI_LEVEL_MASK) {
 384    case STSI_LEVEL_1:
 385        if ((sel1 == 1) && (sel2 == 1)) {
 386            /* Basic Machine Configuration */
 387            struct sysib_111 sysib;
 388
 389            memset(&sysib, 0, sizeof(sysib));
 390            ebcdic_put(sysib.manuf, "QEMU            ", 16);
 391            /* same as machine type number in STORE CPU ID */
 392            ebcdic_put(sysib.type, "QEMU", 4);
 393            /* same as model number in STORE CPU ID */
 394            ebcdic_put(sysib.model, "QEMU            ", 16);
 395            ebcdic_put(sysib.sequence, "QEMU            ", 16);
 396            ebcdic_put(sysib.plant, "QEMU", 4);
 397            cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 398        } else if ((sel1 == 2) && (sel2 == 1)) {
 399            /* Basic Machine CPU */
 400            struct sysib_121 sysib;
 401
 402            memset(&sysib, 0, sizeof(sysib));
 403            /* XXX make different for different CPUs? */
 404            ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 405            ebcdic_put(sysib.plant, "QEMU", 4);
 406            stw_p(&sysib.cpu_addr, env->cpu_num);
 407            cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 408        } else if ((sel1 == 2) && (sel2 == 2)) {
 409            /* Basic Machine CPUs */
 410            struct sysib_122 sysib;
 411
 412            memset(&sysib, 0, sizeof(sysib));
 413            stl_p(&sysib.capability, 0x443afc29);
 414            /* XXX change when SMP comes */
 415            stw_p(&sysib.total_cpus, 1);
 416            stw_p(&sysib.active_cpus, 1);
 417            stw_p(&sysib.standby_cpus, 0);
 418            stw_p(&sysib.reserved_cpus, 0);
 419            cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 420        } else {
 421            cc = 3;
 422        }
 423        break;
 424    case STSI_LEVEL_2:
 425        {
 426            if ((sel1 == 2) && (sel2 == 1)) {
 427                /* LPAR CPU */
 428                struct sysib_221 sysib;
 429
 430                memset(&sysib, 0, sizeof(sysib));
 431                /* XXX make different for different CPUs? */
 432                ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 433                ebcdic_put(sysib.plant, "QEMU", 4);
 434                stw_p(&sysib.cpu_addr, env->cpu_num);
 435                stw_p(&sysib.cpu_id, 0);
 436                cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 437            } else if ((sel1 == 2) && (sel2 == 2)) {
 438                /* LPAR CPUs */
 439                struct sysib_222 sysib;
 440
 441                memset(&sysib, 0, sizeof(sysib));
 442                stw_p(&sysib.lpar_num, 0);
 443                sysib.lcpuc = 0;
 444                /* XXX change when SMP comes */
 445                stw_p(&sysib.total_cpus, 1);
 446                stw_p(&sysib.conf_cpus, 1);
 447                stw_p(&sysib.standby_cpus, 0);
 448                stw_p(&sysib.reserved_cpus, 0);
 449                ebcdic_put(sysib.name, "QEMU    ", 8);
 450                stl_p(&sysib.caf, 1000);
 451                stw_p(&sysib.dedicated_cpus, 0);
 452                stw_p(&sysib.shared_cpus, 0);
 453                cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 454            } else {
 455                cc = 3;
 456            }
 457            break;
 458        }
 459    case STSI_LEVEL_3:
 460        {
 461            if ((sel1 == 2) && (sel2 == 2)) {
 462                /* VM CPUs */
 463                struct sysib_322 sysib;
 464
 465                memset(&sysib, 0, sizeof(sysib));
 466                sysib.count = 1;
 467                /* XXX change when SMP comes */
 468                stw_p(&sysib.vm[0].total_cpus, 1);
 469                stw_p(&sysib.vm[0].conf_cpus, 1);
 470                stw_p(&sysib.vm[0].standby_cpus, 0);
 471                stw_p(&sysib.vm[0].reserved_cpus, 0);
 472                ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 473                stl_p(&sysib.vm[0].caf, 1000);
 474                ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 475                cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 476            } else {
 477                cc = 3;
 478            }
 479            break;
 480        }
 481    case STSI_LEVEL_CURRENT:
 482        env->regs[0] = STSI_LEVEL_3;
 483        break;
 484    default:
 485        cc = 3;
 486        break;
 487    }
 488
 489    return cc;
 490}
 491
 492uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 493                      uint64_t cpu_addr)
 494{
 495    int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 496
 497    HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 498               __func__, order_code, r1, cpu_addr);
 499
 500    /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 501       as parameter (input). Status (output) is always R1. */
 502
 503    switch (order_code) {
 504    case SIGP_SET_ARCH:
 505        /* switch arch */
 506        break;
 507    case SIGP_SENSE:
 508        /* enumerate CPU status */
 509        if (cpu_addr) {
 510            /* XXX implement when SMP comes */
 511            return 3;
 512        }
 513        env->regs[r1] &= 0xffffffff00000000ULL;
 514        cc = 1;
 515        break;
 516#if !defined(CONFIG_USER_ONLY)
 517    case SIGP_RESTART:
 518        qemu_system_reset_request();
 519        cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 520        break;
 521    case SIGP_STOP:
 522        qemu_system_shutdown_request();
 523        cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 524        break;
 525#endif
 526    default:
 527        /* unknown sigp */
 528        fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 529        cc = SIGP_CC_NOT_OPERATIONAL;
 530    }
 531
 532    return cc;
 533}
 534#endif
 535
 536#ifndef CONFIG_USER_ONLY
 537void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
 538{
 539    S390CPU *cpu = s390_env_get_cpu(env);
 540    ioinst_handle_xsch(cpu, r1);
 541}
 542
 543void HELPER(csch)(CPUS390XState *env, uint64_t r1)
 544{
 545    S390CPU *cpu = s390_env_get_cpu(env);
 546    ioinst_handle_csch(cpu, r1);
 547}
 548
 549void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
 550{
 551    S390CPU *cpu = s390_env_get_cpu(env);
 552    ioinst_handle_hsch(cpu, r1);
 553}
 554
 555void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 556{
 557    S390CPU *cpu = s390_env_get_cpu(env);
 558    ioinst_handle_msch(cpu, r1, inst >> 16);
 559}
 560
 561void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
 562{
 563    S390CPU *cpu = s390_env_get_cpu(env);
 564    ioinst_handle_rchp(cpu, r1);
 565}
 566
 567void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
 568{
 569    S390CPU *cpu = s390_env_get_cpu(env);
 570    ioinst_handle_rsch(cpu, r1);
 571}
 572
 573void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 574{
 575    S390CPU *cpu = s390_env_get_cpu(env);
 576    ioinst_handle_ssch(cpu, r1, inst >> 16);
 577}
 578
 579void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 580{
 581    S390CPU *cpu = s390_env_get_cpu(env);
 582    ioinst_handle_stsch(cpu, r1, inst >> 16);
 583}
 584
 585void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 586{
 587    S390CPU *cpu = s390_env_get_cpu(env);
 588    ioinst_handle_tsch(cpu, r1, inst >> 16);
 589}
 590
 591void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
 592{
 593    S390CPU *cpu = s390_env_get_cpu(env);
 594    ioinst_handle_chsc(cpu, inst >> 16);
 595}
 596#endif
 597
 598#ifndef CONFIG_USER_ONLY
 599void HELPER(per_check_exception)(CPUS390XState *env)
 600{
 601    CPUState *cs = CPU(s390_env_get_cpu(env));
 602
 603    if (env->per_perc_atmid) {
 604        env->int_pgm_code = PGM_PER;
 605        env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
 606
 607        cs->exception_index = EXCP_PGM;
 608        cpu_loop_exit(cs);
 609    }
 610}
 611
 612void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
 613{
 614    if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
 615        if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
 616            || get_per_in_range(env, to)) {
 617            env->per_address = from;
 618            env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
 619        }
 620    }
 621}
 622
 623void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
 624{
 625    if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
 626        env->per_address = addr;
 627        env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
 628
 629        /* If the instruction has to be nullified, trigger the
 630           exception immediately. */
 631        if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
 632            CPUState *cs = CPU(s390_env_get_cpu(env));
 633
 634            env->int_pgm_code = PGM_PER;
 635            env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
 636
 637            cs->exception_index = EXCP_PGM;
 638            cpu_loop_exit(cs);
 639        }
 640    }
 641}
 642#endif
 643